1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
4 */
5
6/dts-v1/;
7#include "sparx5_pcb_common.dtsi"
8
9/{
10	aliases {
11	    i2c0   = &i2c0;
12	    i2c152 = &i2c152;
13	    i2c153 = &i2c153;
14	    i2c154 = &i2c154;
15	    i2c155 = &i2c155;
16	};
17
18	gpio-restart {
19		compatible = "gpio-restart";
20		gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
21		priority = <200>;
22	};
23
24	leds {
25		compatible = "gpio-leds";
26		led@0 {
27			label = "eth60:yellow";
28			gpios = <&sgpio_out1 28 0 GPIO_ACTIVE_LOW>;
29			default-state = "off";
30		};
31		led@1 {
32			label = "eth60:green";
33			gpios = <&sgpio_out1 28 1 GPIO_ACTIVE_LOW>;
34			default-state = "off";
35		};
36		led@2 {
37			label = "eth61:yellow";
38			gpios = <&sgpio_out1 29 0 GPIO_ACTIVE_LOW>;
39			default-state = "off";
40		};
41		led@3 {
42			label = "eth61:green";
43			gpios = <&sgpio_out1 29 1 GPIO_ACTIVE_LOW>;
44			default-state = "off";
45		};
46		led@4 {
47			label = "eth62:yellow";
48			gpios = <&sgpio_out1 30 0 GPIO_ACTIVE_LOW>;
49			default-state = "off";
50		};
51		led@5 {
52			label = "eth62:green";
53			gpios = <&sgpio_out1 30 1 GPIO_ACTIVE_LOW>;
54			default-state = "off";
55		};
56		led@6 {
57			label = "eth63:yellow";
58			gpios = <&sgpio_out1 31 0 GPIO_ACTIVE_LOW>;
59			default-state = "off";
60		};
61		led@7 {
62			label = "eth63:green";
63			gpios = <&sgpio_out1 31 1 GPIO_ACTIVE_LOW>;
64			default-state = "off";
65		};
66	};
67};
68
69&gpio {
70	i2cmux_pins_i: i2cmux-pins-i {
71	       pins = "GPIO_35", "GPIO_36",
72		      "GPIO_50", "GPIO_51";
73		function = "twi_scl_m";
74		output-low;
75	};
76	i2cmux_s29: i2cmux-0 {
77		pins = "GPIO_35";
78		function = "twi_scl_m";
79		output-high;
80	};
81	i2cmux_s30: i2cmux-1 {
82		pins = "GPIO_36";
83		function = "twi_scl_m";
84		output-high;
85	};
86	i2cmux_s31: i2cmux-2 {
87		pins = "GPIO_50";
88		function = "twi_scl_m";
89		output-high;
90	};
91	i2cmux_s32: i2cmux-3 {
92		pins = "GPIO_51";
93		function = "twi_scl_m";
94		output-high;
95	};
96};
97
98&spi0 {
99	status = "okay";
100	spi@0 {
101		compatible = "spi-mux";
102		mux-controls = <&mux>;
103		#address-cells = <1>;
104		#size-cells = <0>;
105		reg = <0>; /* CS0 */
106		spi-flash@9 {
107			compatible = "jedec,spi-nor";
108			spi-max-frequency = <8000000>;
109			reg = <0x9>; /* SPI */
110		};
111	};
112};
113
114&spi0 {
115	status = "okay";
116	spi@0 {
117		compatible = "spi-mux";
118		mux-controls = <&mux>;
119		#address-cells = <1>;
120		#size-cells = <0>;
121		reg = <0>; /* CS0 */
122		spi-flash@9 {
123			compatible = "jedec,spi-nor";
124			spi-max-frequency = <8000000>;
125			reg = <0x9>; /* SPI */
126		};
127	};
128};
129
130&sgpio1 {
131	status = "okay";
132	microchip,sgpio-port-ranges = <24 31>;
133	gpio@0 {
134		ngpios = <64>;
135	};
136	gpio@1 {
137		ngpios = <64>;
138	};
139};
140
141&axi {
142	i2c0_imux: i2c0-imux@0 {
143		compatible = "i2c-mux-pinctrl";
144		#address-cells = <1>;
145		#size-cells = <0>;
146		i2c-parent = <&i2c0>;
147	};
148};
149
150&i2c0_imux {
151	pinctrl-names =
152		"i2c152", "i2c153", "i2c154", "i2c155",
153		"idle";
154	pinctrl-0 = <&i2cmux_s29>;
155	pinctrl-1 = <&i2cmux_s30>;
156	pinctrl-2 = <&i2cmux_s31>;
157	pinctrl-3 = <&i2cmux_s32>;
158	pinctrl-4 = <&i2cmux_pins_i>;
159	i2c152: i2c_sfp1 {
160		reg = <0x0>;
161		#address-cells = <1>;
162		#size-cells = <0>;
163	};
164	i2c153: i2c_sfp2 {
165		reg = <0x1>;
166		#address-cells = <1>;
167		#size-cells = <0>;
168	};
169	i2c154: i2c_sfp3 {
170		reg = <0x2>;
171		#address-cells = <1>;
172		#size-cells = <0>;
173	};
174	i2c155: i2c_sfp4 {
175		reg = <0x3>;
176		#address-cells = <1>;
177		#size-cells = <0>;
178	};
179};
180