1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
4 */
5
6/dts-v1/;
7#include "sparx5_pcb_common.dtsi"
8
9/{
10	aliases {
11	    i2c0   = &i2c0;
12	    i2c100 = &i2c100;
13	    i2c101 = &i2c101;
14	    i2c102 = &i2c102;
15	    i2c103 = &i2c103;
16	    i2c104 = &i2c104;
17	    i2c105 = &i2c105;
18	    i2c106 = &i2c106;
19	    i2c107 = &i2c107;
20	    i2c108 = &i2c108;
21	    i2c109 = &i2c109;
22	    i2c110 = &i2c110;
23	    i2c111 = &i2c111;
24	    i2c112 = &i2c112;
25	    i2c113 = &i2c113;
26	    i2c114 = &i2c114;
27	    i2c115 = &i2c115;
28	    i2c116 = &i2c116;
29	    i2c117 = &i2c117;
30	    i2c118 = &i2c118;
31	    i2c119 = &i2c119;
32	};
33
34	gpio-restart {
35		compatible = "gpio-restart";
36		gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
37		priority = <200>;
38	};
39};
40
41&gpio {
42	i2cmux_pins_i: i2cmux-pins-i {
43	       pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19",
44		      "GPIO_20", "GPIO_22", "GPIO_36", "GPIO_35",
45		      "GPIO_50", "GPIO_51", "GPIO_56", "GPIO_57";
46		function = "twi_scl_m";
47		output-low;
48	};
49	i2cmux_0: i2cmux-0 {
50		pins = "GPIO_16";
51		function = "twi_scl_m";
52		output-high;
53	};
54	i2cmux_1: i2cmux-1 {
55		pins = "GPIO_17";
56		function = "twi_scl_m";
57		output-high;
58	};
59	i2cmux_2: i2cmux-2 {
60		pins = "GPIO_18";
61		function = "twi_scl_m";
62		output-high;
63	};
64	i2cmux_3: i2cmux-3 {
65		pins = "GPIO_19";
66		function = "twi_scl_m";
67		output-high;
68	};
69	i2cmux_4: i2cmux-4 {
70		pins = "GPIO_20";
71		function = "twi_scl_m";
72		output-high;
73	};
74	i2cmux_5: i2cmux-5 {
75		pins = "GPIO_22";
76		function = "twi_scl_m";
77		output-high;
78	};
79	i2cmux_6: i2cmux-6 {
80		pins = "GPIO_36";
81		function = "twi_scl_m";
82		output-high;
83	};
84	i2cmux_7: i2cmux-7 {
85		pins = "GPIO_35";
86		function = "twi_scl_m";
87		output-high;
88	};
89	i2cmux_8: i2cmux-8 {
90		pins = "GPIO_50";
91		function = "twi_scl_m";
92		output-high;
93	};
94	i2cmux_9: i2cmux-9 {
95		pins = "GPIO_51";
96		function = "twi_scl_m";
97		output-high;
98	};
99	i2cmux_10: i2cmux-10 {
100		pins = "GPIO_56";
101		function = "twi_scl_m";
102		output-high;
103	};
104	i2cmux_11: i2cmux-11 {
105		pins = "GPIO_57";
106		function = "twi_scl_m";
107		output-high;
108	};
109};
110
111&axi {
112	i2c0_imux: i2c0-imux@0 {
113		compatible = "i2c-mux-pinctrl";
114		#address-cells = <1>;
115		#size-cells = <0>;
116		i2c-parent = <&i2c0>;
117	};
118	i2c0_emux: i2c0-emux@0 {
119		compatible = "i2c-mux-gpio";
120		#address-cells = <1>;
121		#size-cells = <0>;
122		i2c-parent = <&i2c0>;
123	};
124};
125
126&i2c0_imux {
127	pinctrl-names =
128		"i2c100", "i2c101", "i2c102", "i2c103",
129		"i2c104", "i2c105", "i2c106", "i2c107",
130		"i2c108", "i2c109", "i2c110", "i2c111", "idle";
131	pinctrl-0 = <&i2cmux_0>;
132	pinctrl-1 = <&i2cmux_1>;
133	pinctrl-2 = <&i2cmux_2>;
134	pinctrl-3 = <&i2cmux_3>;
135	pinctrl-4 = <&i2cmux_4>;
136	pinctrl-5 = <&i2cmux_5>;
137	pinctrl-6 = <&i2cmux_6>;
138	pinctrl-7 = <&i2cmux_7>;
139	pinctrl-8 = <&i2cmux_8>;
140	pinctrl-9 = <&i2cmux_9>;
141	pinctrl-10 = <&i2cmux_10>;
142	pinctrl-11 = <&i2cmux_11>;
143	pinctrl-12 = <&i2cmux_pins_i>;
144	i2c100: i2c_sfp1 {
145		reg = <0x0>;
146		#address-cells = <1>;
147		#size-cells = <0>;
148	};
149	i2c101: i2c_sfp2 {
150		reg = <0x1>;
151		#address-cells = <1>;
152		#size-cells = <0>;
153	};
154	i2c102: i2c_sfp3 {
155		reg = <0x2>;
156		#address-cells = <1>;
157		#size-cells = <0>;
158	};
159	i2c103: i2c_sfp4 {
160		reg = <0x3>;
161		#address-cells = <1>;
162		#size-cells = <0>;
163	};
164	i2c104: i2c_sfp5 {
165		reg = <0x4>;
166		#address-cells = <1>;
167		#size-cells = <0>;
168	};
169	i2c105: i2c_sfp6 {
170		reg = <0x5>;
171		#address-cells = <1>;
172		#size-cells = <0>;
173	};
174	i2c106: i2c_sfp7 {
175		reg = <0x6>;
176		#address-cells = <1>;
177		#size-cells = <0>;
178	};
179	i2c107: i2c_sfp8 {
180		reg = <0x7>;
181		#address-cells = <1>;
182		#size-cells = <0>;
183	};
184	i2c108: i2c_sfp9 {
185		reg = <0x8>;
186		#address-cells = <1>;
187		#size-cells = <0>;
188	};
189	i2c109: i2c_sfp10 {
190		reg = <0x9>;
191		#address-cells = <1>;
192		#size-cells = <0>;
193	};
194	i2c110: i2c_sfp11 {
195		reg = <0xa>;
196		#address-cells = <1>;
197		#size-cells = <0>;
198	};
199	i2c111: i2c_sfp12 {
200		reg = <0xb>;
201		#address-cells = <1>;
202		#size-cells = <0>;
203	};
204};
205
206&i2c0_emux {
207	mux-gpios = <&gpio 55 GPIO_ACTIVE_HIGH
208		     &gpio 60 GPIO_ACTIVE_HIGH
209		     &gpio 61 GPIO_ACTIVE_HIGH
210		     &gpio 54 GPIO_ACTIVE_HIGH>;
211	idle-state = <0x8>;
212	i2c112: i2c_sfp13 {
213		reg = <0x0>;
214		#address-cells = <1>;
215		#size-cells = <0>;
216	};
217	i2c113: i2c_sfp14 {
218		reg = <0x1>;
219		#address-cells = <1>;
220		#size-cells = <0>;
221	};
222	i2c114: i2c_sfp15 {
223		reg = <0x2>;
224		#address-cells = <1>;
225		#size-cells = <0>;
226	};
227	i2c115: i2c_sfp16 {
228		reg = <0x3>;
229		#address-cells = <1>;
230		#size-cells = <0>;
231	};
232	i2c116: i2c_sfp17 {
233		reg = <0x4>;
234		#address-cells = <1>;
235		#size-cells = <0>;
236	};
237	i2c117: i2c_sfp18 {
238		reg = <0x5>;
239		#address-cells = <1>;
240		#size-cells = <0>;
241	};
242	i2c118: i2c_sfp19 {
243		reg = <0x6>;
244		#address-cells = <1>;
245		#size-cells = <0>;
246	};
247	i2c119: i2c_sfp20 {
248		reg = <0x7>;
249		#address-cells = <1>;
250		#size-cells = <0>;
251	};
252};
253