1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2019 BayLibre, SAS.
4 * Author: Fabien Parent <fparent@baylibre.com>
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8
9/ {
10	aliases {
11		serial0 = &uart0;
12		ethernet0 = &ethernet;
13	};
14
15	chosen {
16		stdout-path = "serial0:921600n8";
17	};
18
19	firmware {
20		optee: optee@4fd00000 {
21			compatible = "linaro,optee-tz";
22			method = "smc";
23		};
24	};
25
26	gpio-keys {
27		compatible = "gpio-keys";
28		input-name = "gpio-keys";
29		pinctrl-names = "default";
30		pinctrl-0 = <&gpio_keys_default>;
31
32		volume-up {
33			gpios = <&pio 42 GPIO_ACTIVE_LOW>;
34			label = "volume_up";
35			linux,code = <115>;
36			wakeup-source;
37			debounce-interval = <15>;
38		};
39
40		volume-down {
41			gpios = <&pio 43 GPIO_ACTIVE_LOW>;
42			label = "volume_down";
43			linux,code = <114>;
44			wakeup-source;
45			debounce-interval = <15>;
46		};
47	};
48};
49
50&i2c0 {
51	clock-div = <2>;
52	pinctrl-names = "default";
53	pinctrl-0 = <&i2c0_pins_a>;
54	status = "okay";
55
56	tca6416: gpio@20 {
57		compatible = "ti,tca6416";
58		reg = <0x20>;
59		rst-gpio = <&pio 65 GPIO_ACTIVE_HIGH>;
60		pinctrl-names = "default";
61		pinctrl-0 = <&tca6416_pins>;
62
63		gpio-controller;
64		#gpio-cells = <2>;
65
66		eint20_mux_sel0 {
67			gpio-hog;
68			gpios = <0 0>;
69			input;
70			line-name = "eint20_mux_sel0";
71		};
72
73		expcon_mux_sel1 {
74			gpio-hog;
75			gpios = <1 0>;
76			input;
77			line-name = "expcon_mux_sel1";
78		};
79
80		mrg_di_mux_sel2 {
81			gpio-hog;
82			gpios = <2 0>;
83			input;
84			line-name = "mrg_di_mux_sel2";
85		};
86
87		sd_sdio_mux_sel3 {
88			gpio-hog;
89			gpios = <3 0>;
90			input;
91			line-name = "sd_sdio_mux_sel3";
92		};
93
94		sd_sdio_mux_ctrl7 {
95			gpio-hog;
96			gpios = <7 0>;
97			output-low;
98			line-name = "sd_sdio_mux_ctrl7";
99		};
100
101		hw_id0 {
102			gpio-hog;
103			gpios = <8 0>;
104			input;
105			line-name = "hw_id0";
106		};
107
108		hw_id1 {
109			gpio-hog;
110			gpios = <9 0>;
111			input;
112			line-name = "hw_id1";
113		};
114
115		hw_id2 {
116			gpio-hog;
117			gpios = <10 0>;
118			input;
119			line-name = "hw_id2";
120		};
121
122		fg_int_n {
123			gpio-hog;
124			gpios = <11 0>;
125			input;
126			line-name = "fg_int_n";
127		};
128
129		usba_pwr_en {
130			gpio-hog;
131			gpios = <12 0>;
132			output-high;
133			line-name = "usba_pwr_en";
134		};
135
136		wifi_3v3_pg {
137			gpio-hog;
138			gpios = <13 0>;
139			input;
140			line-name = "wifi_3v3_pg";
141		};
142
143		cam_rst {
144			gpio-hog;
145			gpios = <14 0>;
146			output-low;
147			line-name = "cam_rst";
148		};
149
150		cam_pwdn {
151			gpio-hog;
152			gpios = <15 0>;
153			output-low;
154			line-name = "cam_pwdn";
155		};
156	};
157};
158
159&i2c2 {
160	clock-div = <2>;
161	pinctrl-names = "default";
162	pinctrl-0 = <&i2c2_pins_a>;
163	status = "okay";
164};
165
166&uart0 {
167	status = "okay";
168};
169
170&usb0 {
171	status = "okay";
172	dr_mode = "peripheral";
173
174	usb_con: connector {
175		compatible = "usb-c-connector";
176		label = "USB-C";
177	};
178};
179
180&usb0_phy {
181	status = "okay";
182};
183
184&pio {
185	gpio_keys_default: gpiodefault {
186		pins_cmd_dat {
187			pinmux = <MT8516_PIN_42_KPCOL0__FUNC_GPIO42>,
188				 <MT8516_PIN_43_KPCOL1__FUNC_GPIO43>;
189			bias-pull-up;
190			input-enable;
191		};
192	};
193
194	i2c0_pins_a: i2c0@0 {
195		pins1 {
196			pinmux = <MT8516_PIN_58_SDA0__FUNC_SDA0_0>,
197				 <MT8516_PIN_59_SCL0__FUNC_SCL0_0>;
198			bias-disable;
199		};
200	};
201
202	i2c2_pins_a: i2c2@0 {
203		pins1 {
204			pinmux = <MT8516_PIN_60_SDA2__FUNC_SDA2_0>,
205				 <MT8516_PIN_61_SCL2__FUNC_SCL2_0>;
206			bias-disable;
207		};
208	};
209
210	tca6416_pins: pinmux_tca6416_pins {
211		gpio_mux_rst_n_pin {
212			pinmux = <MT8516_PIN_65_UTXD1__FUNC_GPIO65>;
213			output-high;
214		};
215
216		gpio_mux_int_n_pin {
217			pinmux = <MT8516_PIN_64_URXD1__FUNC_GPIO64>;
218			input-enable;
219			bias-pull-up;
220		};
221	};
222
223	ethernet_pins_default: ethernet {
224		pins_ethernet {
225			pinmux = <MT8516_PIN_0_EINT0__FUNC_EXT_TXD0>,
226				 <MT8516_PIN_1_EINT1__FUNC_EXT_TXD1>,
227				 <MT8516_PIN_5_EINT5__FUNC_EXT_RXER>,
228				 <MT8516_PIN_6_EINT6__FUNC_EXT_RXC>,
229				 <MT8516_PIN_7_EINT7__FUNC_EXT_RXDV>,
230				 <MT8516_PIN_8_EINT8__FUNC_EXT_RXD0>,
231				 <MT8516_PIN_9_EINT9__FUNC_EXT_RXD1>,
232				 <MT8516_PIN_12_EINT12__FUNC_EXT_TXEN>,
233				 <MT8516_PIN_38_MRG_DI__FUNC_EXT_MDIO>,
234				 <MT8516_PIN_39_MRG_DO__FUNC_EXT_MDC>;
235		};
236	};
237};
238