1/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Eddie Huang <eddie.huang@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 */
14
15/dts-v1/;
16#include <dt-bindings/gpio/gpio.h>
17#include "mt8173.dtsi"
18
19/ {
20	model = "MediaTek MT8173 evaluation board";
21	compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
22
23	aliases {
24		serial0 = &uart0;
25		serial1 = &uart1;
26		serial2 = &uart2;
27		serial3 = &uart3;
28	};
29
30	memory@40000000 {
31		device_type = "memory";
32		reg = <0 0x40000000 0 0x80000000>;
33	};
34
35	chosen { };
36
37	usb_p1_vbus: regulator@0 {
38		compatible = "regulator-fixed";
39		regulator-name = "usb_vbus";
40		regulator-min-microvolt = <5000000>;
41		regulator-max-microvolt = <5000000>;
42		gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
43		enable-active-high;
44	};
45};
46
47&i2c1 {
48	status = "okay";
49
50	buck: da9211@68 {
51		compatible = "dlg,da9211";
52		reg = <0x68>;
53
54		regulators {
55			da9211_vcpu_reg: BUCKA {
56				regulator-name = "VBUCKA";
57				regulator-min-microvolt = < 700000>;
58				regulator-max-microvolt = <1310000>;
59				regulator-min-microamp	= <2000000>;
60				regulator-max-microamp	= <4400000>;
61				regulator-ramp-delay = <10000>;
62				regulator-always-on;
63			};
64
65			da9211_vgpu_reg: BUCKB {
66				regulator-name = "VBUCKB";
67				regulator-min-microvolt = < 700000>;
68				regulator-max-microvolt = <1310000>;
69				regulator-min-microamp	= <2000000>;
70				regulator-max-microamp	= <3000000>;
71				regulator-ramp-delay = <10000>;
72			};
73		};
74	};
75};
76
77&mmc0 {
78	status = "okay";
79	pinctrl-names = "default", "state_uhs";
80	pinctrl-0 = <&mmc0_pins_default>;
81	pinctrl-1 = <&mmc0_pins_uhs>;
82	bus-width = <8>;
83	max-frequency = <50000000>;
84	cap-mmc-highspeed;
85	vmmc-supply = <&mt6397_vemc_3v3_reg>;
86	vqmmc-supply = <&mt6397_vio18_reg>;
87	non-removable;
88};
89
90&mmc1 {
91	status = "okay";
92	pinctrl-names = "default", "state_uhs";
93	pinctrl-0 = <&mmc1_pins_default>;
94	pinctrl-1 = <&mmc1_pins_uhs>;
95	bus-width = <4>;
96	max-frequency = <50000000>;
97	cap-sd-highspeed;
98	sd-uhs-sdr25;
99	cd-gpios = <&pio 132 0>;
100	vmmc-supply = <&mt6397_vmch_reg>;
101	vqmmc-supply = <&mt6397_vmc_reg>;
102};
103
104&pio {
105	disp_pwm0_pins: disp_pwm0_pins {
106		pins1 {
107			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
108			output-low;
109		};
110	};
111
112	mmc0_pins_default: mmc0default {
113		pins_cmd_dat {
114			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
115				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
116				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
117				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
118				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
119				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
120				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
121				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
122				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
123			input-enable;
124			bias-pull-up;
125		};
126
127		pins_clk {
128			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
129			bias-pull-down;
130		};
131
132		pins_rst {
133			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
134			bias-pull-up;
135		};
136	};
137
138	mmc1_pins_default: mmc1default {
139		pins_cmd_dat {
140			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
141				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
142				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
143				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
144				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
145			input-enable;
146			drive-strength = <MTK_DRIVE_4mA>;
147			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
148		};
149
150		pins_clk {
151			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
152			bias-pull-down;
153			drive-strength = <MTK_DRIVE_4mA>;
154		};
155
156		pins_insert {
157			pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
158			bias-pull-up;
159		};
160	};
161
162	mmc0_pins_uhs: mmc0 {
163		pins_cmd_dat {
164			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
165				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
166				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
167				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
168				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
169				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
170				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
171				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
172				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
173			input-enable;
174			drive-strength = <MTK_DRIVE_2mA>;
175			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
176		};
177
178		pins_clk {
179			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
180			drive-strength = <MTK_DRIVE_2mA>;
181			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
182		};
183
184		pins_rst {
185			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
186			bias-pull-up;
187		};
188	};
189
190	mmc1_pins_uhs: mmc1 {
191		pins_cmd_dat {
192			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
193				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
194				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
195				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
196				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
197			input-enable;
198			drive-strength = <MTK_DRIVE_4mA>;
199			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
200		};
201
202		pins_clk {
203			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
204			drive-strength = <MTK_DRIVE_4mA>;
205			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
206		};
207	};
208};
209
210&pwm0 {
211	pinctrl-names = "default";
212	pinctrl-0 = <&disp_pwm0_pins>;
213	status = "okay";
214};
215
216&pwrap {
217	pmic: mt6397 {
218		compatible = "mediatek,mt6397";
219		interrupt-parent = <&pio>;
220		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
221		interrupt-controller;
222		#interrupt-cells = <2>;
223
224		mt6397regulator: mt6397regulator {
225			compatible = "mediatek,mt6397-regulator";
226
227			mt6397_vpca15_reg: buck_vpca15 {
228				regulator-compatible = "buck_vpca15";
229				regulator-name = "vpca15";
230				regulator-min-microvolt = < 700000>;
231				regulator-max-microvolt = <1350000>;
232				regulator-ramp-delay = <12500>;
233				regulator-always-on;
234			};
235
236			mt6397_vpca7_reg: buck_vpca7 {
237				regulator-compatible = "buck_vpca7";
238				regulator-name = "vpca7";
239				regulator-min-microvolt = < 700000>;
240				regulator-max-microvolt = <1350000>;
241				regulator-ramp-delay = <12500>;
242				regulator-enable-ramp-delay = <115>;
243			};
244
245			mt6397_vsramca15_reg: buck_vsramca15 {
246				regulator-compatible = "buck_vsramca15";
247				regulator-name = "vsramca15";
248				regulator-min-microvolt = < 700000>;
249				regulator-max-microvolt = <1350000>;
250				regulator-ramp-delay = <12500>;
251				regulator-always-on;
252			};
253
254			mt6397_vsramca7_reg: buck_vsramca7 {
255				regulator-compatible = "buck_vsramca7";
256				regulator-name = "vsramca7";
257				regulator-min-microvolt = < 700000>;
258				regulator-max-microvolt = <1350000>;
259				regulator-ramp-delay = <12500>;
260				regulator-always-on;
261			};
262
263			mt6397_vcore_reg: buck_vcore {
264				regulator-compatible = "buck_vcore";
265				regulator-name = "vcore";
266				regulator-min-microvolt = < 700000>;
267				regulator-max-microvolt = <1350000>;
268				regulator-ramp-delay = <12500>;
269				regulator-always-on;
270			};
271
272			mt6397_vgpu_reg: buck_vgpu {
273				regulator-compatible = "buck_vgpu";
274				regulator-name = "vgpu";
275				regulator-min-microvolt = < 700000>;
276				regulator-max-microvolt = <1350000>;
277				regulator-ramp-delay = <12500>;
278				regulator-enable-ramp-delay = <115>;
279			};
280
281			mt6397_vdrm_reg: buck_vdrm {
282				regulator-compatible = "buck_vdrm";
283				regulator-name = "vdrm";
284				regulator-min-microvolt = <1200000>;
285				regulator-max-microvolt = <1400000>;
286				regulator-ramp-delay = <12500>;
287				regulator-always-on;
288			};
289
290			mt6397_vio18_reg: buck_vio18 {
291				regulator-compatible = "buck_vio18";
292				regulator-name = "vio18";
293				regulator-min-microvolt = <1620000>;
294				regulator-max-microvolt = <1980000>;
295				regulator-ramp-delay = <12500>;
296				regulator-always-on;
297			};
298
299			mt6397_vtcxo_reg: ldo_vtcxo {
300				regulator-compatible = "ldo_vtcxo";
301				regulator-name = "vtcxo";
302				regulator-always-on;
303			};
304
305			mt6397_va28_reg: ldo_va28 {
306				regulator-compatible = "ldo_va28";
307				regulator-name = "va28";
308				regulator-always-on;
309			};
310
311			mt6397_vcama_reg: ldo_vcama {
312				regulator-compatible = "ldo_vcama";
313				regulator-name = "vcama";
314				regulator-min-microvolt = <1500000>;
315				regulator-max-microvolt = <2800000>;
316				regulator-enable-ramp-delay = <218>;
317			};
318
319			mt6397_vio28_reg: ldo_vio28 {
320				regulator-compatible = "ldo_vio28";
321				regulator-name = "vio28";
322				regulator-always-on;
323			};
324
325			mt6397_vusb_reg: ldo_vusb {
326				regulator-compatible = "ldo_vusb";
327				regulator-name = "vusb";
328			};
329
330			mt6397_vmc_reg: ldo_vmc {
331				regulator-compatible = "ldo_vmc";
332				regulator-name = "vmc";
333				regulator-min-microvolt = <1800000>;
334				regulator-max-microvolt = <3300000>;
335				regulator-enable-ramp-delay = <218>;
336			};
337
338			mt6397_vmch_reg: ldo_vmch {
339				regulator-compatible = "ldo_vmch";
340				regulator-name = "vmch";
341				regulator-min-microvolt = <3000000>;
342				regulator-max-microvolt = <3300000>;
343				regulator-enable-ramp-delay = <218>;
344			};
345
346			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
347				regulator-compatible = "ldo_vemc3v3";
348				regulator-name = "vemc_3v3";
349				regulator-min-microvolt = <3000000>;
350				regulator-max-microvolt = <3300000>;
351				regulator-enable-ramp-delay = <218>;
352			};
353
354			mt6397_vgp1_reg: ldo_vgp1 {
355				regulator-compatible = "ldo_vgp1";
356				regulator-name = "vcamd";
357				regulator-min-microvolt = <1220000>;
358				regulator-max-microvolt = <3300000>;
359				regulator-enable-ramp-delay = <240>;
360			};
361
362			mt6397_vgp2_reg: ldo_vgp2 {
363				regulator-compatible = "ldo_vgp2";
364				regulator-name = "vcamio";
365				regulator-min-microvolt = <1000000>;
366				regulator-max-microvolt = <3300000>;
367				regulator-enable-ramp-delay = <218>;
368			};
369
370			mt6397_vgp3_reg: ldo_vgp3 {
371				regulator-compatible = "ldo_vgp3";
372				regulator-name = "vcamaf";
373				regulator-min-microvolt = <1200000>;
374				regulator-max-microvolt = <3300000>;
375				regulator-enable-ramp-delay = <218>;
376			};
377
378			mt6397_vgp4_reg: ldo_vgp4 {
379				regulator-compatible = "ldo_vgp4";
380				regulator-name = "vgp4";
381				regulator-min-microvolt = <1200000>;
382				regulator-max-microvolt = <3300000>;
383				regulator-enable-ramp-delay = <218>;
384			};
385
386			mt6397_vgp5_reg: ldo_vgp5 {
387				regulator-compatible = "ldo_vgp5";
388				regulator-name = "vgp5";
389				regulator-min-microvolt = <1200000>;
390				regulator-max-microvolt = <3000000>;
391				regulator-enable-ramp-delay = <218>;
392			};
393
394			mt6397_vgp6_reg: ldo_vgp6 {
395				regulator-compatible = "ldo_vgp6";
396				regulator-name = "vgp6";
397				regulator-min-microvolt = <1200000>;
398				regulator-max-microvolt = <3300000>;
399				regulator-enable-ramp-delay = <218>;
400			};
401
402			mt6397_vibr_reg: ldo_vibr {
403				regulator-compatible = "ldo_vibr";
404				regulator-name = "vibr";
405				regulator-min-microvolt = <1300000>;
406				regulator-max-microvolt = <3300000>;
407				regulator-enable-ramp-delay = <218>;
408			};
409		};
410	};
411};
412
413&pio {
414	spi_pins_a: spi0 {
415		pins_spi {
416			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
417				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
418				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
419				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
420		};
421	};
422};
423
424&spi {
425	pinctrl-names = "default";
426	pinctrl-0 = <&spi_pins_a>;
427	mediatek,pad-select = <0>;
428	status = "okay";
429};
430
431&uart0 {
432	status = "okay";
433};
434
435&usb30 {
436	vusb33-supply = <&mt6397_vusb_reg>;
437	vbus-supply = <&usb_p1_vbus>;
438	mediatek,wakeup-src = <1>;
439};
440