1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Eddie Huang <eddie.huang@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include "mt8173.dtsi"
10
11/ {
12	model = "MediaTek MT8173 evaluation board";
13	chassis-type = "embedded";
14	compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
15
16	aliases {
17		serial0 = &uart0;
18		serial1 = &uart1;
19		serial2 = &uart2;
20		serial3 = &uart3;
21	};
22
23	memory@40000000 {
24		device_type = "memory";
25		reg = <0 0x40000000 0 0x80000000>;
26	};
27
28	chosen { };
29
30	connector {
31		compatible = "hdmi-connector";
32		label = "hdmi";
33		type = "d";
34
35		port {
36			hdmi_connector_in: endpoint {
37				remote-endpoint = <&hdmi0_out>;
38			};
39		};
40	};
41
42	extcon_usb: extcon_iddig {
43		compatible = "linux,extcon-usb-gpio";
44		id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
45	};
46
47	usb_p1_vbus: regulator-usb-p1 {
48		compatible = "regulator-fixed";
49		regulator-name = "usb_vbus";
50		regulator-min-microvolt = <5000000>;
51		regulator-max-microvolt = <5000000>;
52		gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
53		enable-active-high;
54	};
55
56	usb_p0_vbus: regulator-usb-p0 {
57		compatible = "regulator-fixed";
58		regulator-name = "vbus";
59		regulator-min-microvolt = <5000000>;
60		regulator-max-microvolt = <5000000>;
61		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
62		enable-active-high;
63	};
64};
65
66&mfg_async {
67	domain-supply = <&da9211_vgpu_reg>;
68};
69
70&cec {
71	status = "okay";
72};
73
74&cpu0 {
75	proc-supply = <&mt6397_vpca15_reg>;
76};
77
78&cpu1 {
79	proc-supply = <&mt6397_vpca15_reg>;
80};
81
82&cpu2 {
83	proc-supply = <&da9211_vcpu_reg>;
84	sram-supply = <&mt6397_vsramca7_reg>;
85};
86
87&cpu3 {
88	proc-supply = <&da9211_vcpu_reg>;
89	sram-supply = <&mt6397_vsramca7_reg>;
90};
91
92&dpi0 {
93	status = "okay";
94};
95
96&hdmi_phy {
97	status = "okay";
98};
99
100&hdmi0 {
101	status = "okay";
102
103	ports {
104		port@1 {
105			reg = <1>;
106
107			hdmi0_out: endpoint {
108				remote-endpoint = <&hdmi_connector_in>;
109			};
110		};
111	};
112};
113
114&i2c1 {
115	status = "okay";
116
117	buck: da9211@68 {
118		compatible = "dlg,da9211";
119		reg = <0x68>;
120
121		regulators {
122			da9211_vcpu_reg: BUCKA {
123				regulator-name = "VBUCKA";
124				regulator-min-microvolt = < 700000>;
125				regulator-max-microvolt = <1310000>;
126				regulator-min-microamp = <2000000>;
127				regulator-max-microamp = <4400000>;
128				regulator-ramp-delay = <10000>;
129				regulator-always-on;
130			};
131
132			da9211_vgpu_reg: BUCKB {
133				regulator-name = "VBUCKB";
134				regulator-min-microvolt = < 700000>;
135				regulator-max-microvolt = <1310000>;
136				regulator-min-microamp = <2000000>;
137				regulator-max-microamp = <3000000>;
138				regulator-ramp-delay = <10000>;
139			};
140		};
141	};
142};
143
144&mmc0 {
145	status = "okay";
146	pinctrl-names = "default", "state_uhs";
147	pinctrl-0 = <&mmc0_pins_default>;
148	pinctrl-1 = <&mmc0_pins_uhs>;
149	bus-width = <8>;
150	max-frequency = <50000000>;
151	cap-mmc-highspeed;
152	mediatek,hs200-cmd-int-delay = <26>;
153	mediatek,hs400-cmd-int-delay = <14>;
154	mediatek,hs400-cmd-resp-sel-rising;
155	vmmc-supply = <&mt6397_vemc_3v3_reg>;
156	vqmmc-supply = <&mt6397_vio18_reg>;
157	non-removable;
158};
159
160&mmc1 {
161	status = "okay";
162	pinctrl-names = "default", "state_uhs";
163	pinctrl-0 = <&mmc1_pins_default>;
164	pinctrl-1 = <&mmc1_pins_uhs>;
165	bus-width = <4>;
166	max-frequency = <50000000>;
167	cap-sd-highspeed;
168	sd-uhs-sdr25;
169	cd-gpios = <&pio 132 0>;
170	vmmc-supply = <&mt6397_vmch_reg>;
171	vqmmc-supply = <&mt6397_vmc_reg>;
172};
173
174&pio {
175	disp_pwm0_pins: disp_pwm0_pins {
176		pins1 {
177			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
178			output-low;
179		};
180	};
181
182	mmc0_pins_default: mmc0default {
183		pins_cmd_dat {
184			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
185				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
186				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
187				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
188				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
189				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
190				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
191				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
192				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
193			input-enable;
194			bias-pull-up;
195		};
196
197		pins_clk {
198			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
199			bias-pull-down;
200		};
201
202		pins_rst {
203			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
204			bias-pull-up;
205		};
206	};
207
208	mmc1_pins_default: mmc1default {
209		pins_cmd_dat {
210			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
211				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
212				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
213				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
214				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
215			input-enable;
216			drive-strength = <MTK_DRIVE_4mA>;
217			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
218		};
219
220		pins_clk {
221			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
222			bias-pull-down;
223			drive-strength = <MTK_DRIVE_4mA>;
224		};
225
226		pins_insert {
227			pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
228			bias-pull-up;
229		};
230	};
231
232	mmc0_pins_uhs: mmc0 {
233		pins_cmd_dat {
234			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
235				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
236				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
237				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
238				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
239				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
240				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
241				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
242				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
243			input-enable;
244			drive-strength = <MTK_DRIVE_2mA>;
245			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
246		};
247
248		pins_clk {
249			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
250			drive-strength = <MTK_DRIVE_2mA>;
251			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
252		};
253
254		pins_rst {
255			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
256			bias-pull-up;
257		};
258	};
259
260	mmc1_pins_uhs: mmc1 {
261		pins_cmd_dat {
262			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
263				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
264				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
265				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
266				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
267			input-enable;
268			drive-strength = <MTK_DRIVE_4mA>;
269			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
270		};
271
272		pins_clk {
273			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
274			drive-strength = <MTK_DRIVE_4mA>;
275			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
276		};
277	};
278
279	usb_id_pins_float: usb_iddig_pull_up {
280		pins_iddig {
281			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
282			bias-pull-up;
283		};
284	};
285
286	usb_id_pins_ground: usb_iddig_pull_down {
287		pins_iddig {
288			pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
289			bias-pull-down;
290		};
291	};
292};
293
294&pwm0 {
295	pinctrl-names = "default";
296	pinctrl-0 = <&disp_pwm0_pins>;
297	status = "okay";
298};
299
300&pwrap {
301	/* Only MT8173 E1 needs USB power domain */
302	power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
303
304	pmic: pmic {
305		compatible = "mediatek,mt6397";
306		interrupt-parent = <&pio>;
307		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
308		interrupt-controller;
309		#interrupt-cells = <2>;
310
311		mt6397regulator: mt6397regulator {
312			compatible = "mediatek,mt6397-regulator";
313
314			mt6397_vpca15_reg: buck_vpca15 {
315				regulator-compatible = "buck_vpca15";
316				regulator-name = "vpca15";
317				regulator-min-microvolt = < 700000>;
318				regulator-max-microvolt = <1350000>;
319				regulator-ramp-delay = <12500>;
320				regulator-always-on;
321			};
322
323			mt6397_vpca7_reg: buck_vpca7 {
324				regulator-compatible = "buck_vpca7";
325				regulator-name = "vpca7";
326				regulator-min-microvolt = < 700000>;
327				regulator-max-microvolt = <1350000>;
328				regulator-ramp-delay = <12500>;
329				regulator-enable-ramp-delay = <115>;
330			};
331
332			mt6397_vsramca15_reg: buck_vsramca15 {
333				regulator-compatible = "buck_vsramca15";
334				regulator-name = "vsramca15";
335				regulator-min-microvolt = < 700000>;
336				regulator-max-microvolt = <1350000>;
337				regulator-ramp-delay = <12500>;
338				regulator-always-on;
339			};
340
341			mt6397_vsramca7_reg: buck_vsramca7 {
342				regulator-compatible = "buck_vsramca7";
343				regulator-name = "vsramca7";
344				regulator-min-microvolt = < 700000>;
345				regulator-max-microvolt = <1350000>;
346				regulator-ramp-delay = <12500>;
347				regulator-always-on;
348			};
349
350			mt6397_vcore_reg: buck_vcore {
351				regulator-compatible = "buck_vcore";
352				regulator-name = "vcore";
353				regulator-min-microvolt = < 700000>;
354				regulator-max-microvolt = <1350000>;
355				regulator-ramp-delay = <12500>;
356				regulator-always-on;
357			};
358
359			mt6397_vgpu_reg: buck_vgpu {
360				regulator-compatible = "buck_vgpu";
361				regulator-name = "vgpu";
362				regulator-min-microvolt = < 700000>;
363				regulator-max-microvolt = <1350000>;
364				regulator-ramp-delay = <12500>;
365				regulator-enable-ramp-delay = <115>;
366			};
367
368			mt6397_vdrm_reg: buck_vdrm {
369				regulator-compatible = "buck_vdrm";
370				regulator-name = "vdrm";
371				regulator-min-microvolt = <1200000>;
372				regulator-max-microvolt = <1400000>;
373				regulator-ramp-delay = <12500>;
374				regulator-always-on;
375			};
376
377			mt6397_vio18_reg: buck_vio18 {
378				regulator-compatible = "buck_vio18";
379				regulator-name = "vio18";
380				regulator-min-microvolt = <1620000>;
381				regulator-max-microvolt = <1980000>;
382				regulator-ramp-delay = <12500>;
383				regulator-always-on;
384			};
385
386			mt6397_vtcxo_reg: ldo_vtcxo {
387				regulator-compatible = "ldo_vtcxo";
388				regulator-name = "vtcxo";
389				regulator-always-on;
390			};
391
392			mt6397_va28_reg: ldo_va28 {
393				regulator-compatible = "ldo_va28";
394				regulator-name = "va28";
395				regulator-always-on;
396			};
397
398			mt6397_vcama_reg: ldo_vcama {
399				regulator-compatible = "ldo_vcama";
400				regulator-name = "vcama";
401				regulator-min-microvolt = <1500000>;
402				regulator-max-microvolt = <2800000>;
403				regulator-enable-ramp-delay = <218>;
404			};
405
406			mt6397_vio28_reg: ldo_vio28 {
407				regulator-compatible = "ldo_vio28";
408				regulator-name = "vio28";
409				regulator-always-on;
410			};
411
412			mt6397_vusb_reg: ldo_vusb {
413				regulator-compatible = "ldo_vusb";
414				regulator-name = "vusb";
415			};
416
417			mt6397_vmc_reg: ldo_vmc {
418				regulator-compatible = "ldo_vmc";
419				regulator-name = "vmc";
420				regulator-min-microvolt = <1800000>;
421				regulator-max-microvolt = <3300000>;
422				regulator-enable-ramp-delay = <218>;
423			};
424
425			mt6397_vmch_reg: ldo_vmch {
426				regulator-compatible = "ldo_vmch";
427				regulator-name = "vmch";
428				regulator-min-microvolt = <3000000>;
429				regulator-max-microvolt = <3300000>;
430				regulator-enable-ramp-delay = <218>;
431			};
432
433			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
434				regulator-compatible = "ldo_vemc3v3";
435				regulator-name = "vemc_3v3";
436				regulator-min-microvolt = <3000000>;
437				regulator-max-microvolt = <3300000>;
438				regulator-enable-ramp-delay = <218>;
439			};
440
441			mt6397_vgp1_reg: ldo_vgp1 {
442				regulator-compatible = "ldo_vgp1";
443				regulator-name = "vcamd";
444				regulator-min-microvolt = <1220000>;
445				regulator-max-microvolt = <3300000>;
446				regulator-enable-ramp-delay = <240>;
447			};
448
449			mt6397_vgp2_reg: ldo_vgp2 {
450				regulator-compatible = "ldo_vgp2";
451				regulator-name = "vcamio";
452				regulator-min-microvolt = <1000000>;
453				regulator-max-microvolt = <3300000>;
454				regulator-enable-ramp-delay = <218>;
455			};
456
457			mt6397_vgp3_reg: ldo_vgp3 {
458				regulator-compatible = "ldo_vgp3";
459				regulator-name = "vcamaf";
460				regulator-min-microvolt = <1200000>;
461				regulator-max-microvolt = <3300000>;
462				regulator-enable-ramp-delay = <218>;
463			};
464
465			mt6397_vgp4_reg: ldo_vgp4 {
466				regulator-compatible = "ldo_vgp4";
467				regulator-name = "vgp4";
468				regulator-min-microvolt = <1200000>;
469				regulator-max-microvolt = <3300000>;
470				regulator-enable-ramp-delay = <218>;
471			};
472
473			mt6397_vgp5_reg: ldo_vgp5 {
474				regulator-compatible = "ldo_vgp5";
475				regulator-name = "vgp5";
476				regulator-min-microvolt = <1200000>;
477				regulator-max-microvolt = <3000000>;
478				regulator-enable-ramp-delay = <218>;
479			};
480
481			mt6397_vgp6_reg: ldo_vgp6 {
482				regulator-compatible = "ldo_vgp6";
483				regulator-name = "vgp6";
484				regulator-min-microvolt = <1200000>;
485				regulator-max-microvolt = <3300000>;
486				regulator-enable-ramp-delay = <218>;
487			};
488
489			mt6397_vibr_reg: ldo_vibr {
490				regulator-compatible = "ldo_vibr";
491				regulator-name = "vibr";
492				regulator-min-microvolt = <1300000>;
493				regulator-max-microvolt = <3300000>;
494				regulator-enable-ramp-delay = <218>;
495			};
496		};
497	};
498};
499
500&pio {
501	spi_pins_a: spi0 {
502		pins_spi {
503			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
504				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
505				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
506				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
507		};
508	};
509};
510
511&spi {
512	pinctrl-names = "default";
513	pinctrl-0 = <&spi_pins_a>;
514	mediatek,pad-select = <0>;
515	status = "okay";
516};
517
518&ssusb {
519	vusb33-supply = <&mt6397_vusb_reg>;
520	vbus-supply = <&usb_p0_vbus>;
521	extcon = <&extcon_usb>;
522	dr_mode = "otg";
523	wakeup-source;
524	pinctrl-names = "default";
525	pinctrl-0 = <&usb_id_pins_float>;
526	status = "okay";
527};
528
529&uart0 {
530	status = "okay";
531};
532
533&usb_host {
534	vusb33-supply = <&mt6397_vusb_reg>;
535	vbus-supply = <&usb_p1_vbus>;
536	status = "okay";
537};
538