1/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Eddie Huang <eddie.huang@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 */
14
15/dts-v1/;
16#include <dt-bindings/gpio/gpio.h>
17#include "mt8173.dtsi"
18
19/ {
20	model = "MediaTek MT8173 evaluation board";
21	compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
22
23	aliases {
24		serial0 = &uart0;
25		serial1 = &uart1;
26		serial2 = &uart2;
27		serial3 = &uart3;
28	};
29
30	memory@40000000 {
31		device_type = "memory";
32		reg = <0 0x40000000 0 0x80000000>;
33	};
34
35	chosen { };
36
37	usb_p1_vbus: regulator@0 {
38		compatible = "regulator-fixed";
39		regulator-name = "usb_vbus";
40		regulator-min-microvolt = <5000000>;
41		regulator-max-microvolt = <5000000>;
42		gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
43		enable-active-high;
44	};
45
46	connector {
47		compatible = "hdmi-connector";
48		label = "hdmi";
49		type = "d";
50
51		port {
52			hdmi_connector_in: endpoint {
53				remote-endpoint = <&hdmi0_out>;
54			};
55		};
56	};
57};
58
59&cec {
60	status = "okay";
61};
62
63&dpi0 {
64	status = "okay";
65};
66
67&hdmi_phy {
68	status = "okay";
69};
70
71&hdmi0 {
72	status = "okay";
73
74	ports {
75		port@1 {
76			reg = <1>;
77
78			hdmi0_out: endpoint {
79				remote-endpoint = <&hdmi_connector_in>;
80			};
81		};
82	};
83};
84
85&i2c1 {
86	status = "okay";
87
88	buck: da9211@68 {
89		compatible = "dlg,da9211";
90		reg = <0x68>;
91
92		regulators {
93			da9211_vcpu_reg: BUCKA {
94				regulator-name = "VBUCKA";
95				regulator-min-microvolt = < 700000>;
96				regulator-max-microvolt = <1310000>;
97				regulator-min-microamp	= <2000000>;
98				regulator-max-microamp	= <4400000>;
99				regulator-ramp-delay = <10000>;
100				regulator-always-on;
101			};
102
103			da9211_vgpu_reg: BUCKB {
104				regulator-name = "VBUCKB";
105				regulator-min-microvolt = < 700000>;
106				regulator-max-microvolt = <1310000>;
107				regulator-min-microamp	= <2000000>;
108				regulator-max-microamp	= <3000000>;
109				regulator-ramp-delay = <10000>;
110			};
111		};
112	};
113};
114
115&mmc0 {
116	status = "okay";
117	pinctrl-names = "default", "state_uhs";
118	pinctrl-0 = <&mmc0_pins_default>;
119	pinctrl-1 = <&mmc0_pins_uhs>;
120	bus-width = <8>;
121	max-frequency = <50000000>;
122	cap-mmc-highspeed;
123	vmmc-supply = <&mt6397_vemc_3v3_reg>;
124	vqmmc-supply = <&mt6397_vio18_reg>;
125	non-removable;
126};
127
128&mmc1 {
129	status = "okay";
130	pinctrl-names = "default", "state_uhs";
131	pinctrl-0 = <&mmc1_pins_default>;
132	pinctrl-1 = <&mmc1_pins_uhs>;
133	bus-width = <4>;
134	max-frequency = <50000000>;
135	cap-sd-highspeed;
136	sd-uhs-sdr25;
137	cd-gpios = <&pio 132 0>;
138	vmmc-supply = <&mt6397_vmch_reg>;
139	vqmmc-supply = <&mt6397_vmc_reg>;
140};
141
142&pio {
143	disp_pwm0_pins: disp_pwm0_pins {
144		pins1 {
145			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
146			output-low;
147		};
148	};
149
150	mmc0_pins_default: mmc0default {
151		pins_cmd_dat {
152			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
153				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
154				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
155				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
156				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
157				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
158				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
159				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
160				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
161			input-enable;
162			bias-pull-up;
163		};
164
165		pins_clk {
166			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
167			bias-pull-down;
168		};
169
170		pins_rst {
171			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
172			bias-pull-up;
173		};
174	};
175
176	mmc1_pins_default: mmc1default {
177		pins_cmd_dat {
178			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
179				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
180				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
181				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
182				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
183			input-enable;
184			drive-strength = <MTK_DRIVE_4mA>;
185			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
186		};
187
188		pins_clk {
189			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
190			bias-pull-down;
191			drive-strength = <MTK_DRIVE_4mA>;
192		};
193
194		pins_insert {
195			pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
196			bias-pull-up;
197		};
198	};
199
200	mmc0_pins_uhs: mmc0 {
201		pins_cmd_dat {
202			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
203				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
204				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
205				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
206				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
207				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
208				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
209				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
210				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
211			input-enable;
212			drive-strength = <MTK_DRIVE_2mA>;
213			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
214		};
215
216		pins_clk {
217			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
218			drive-strength = <MTK_DRIVE_2mA>;
219			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
220		};
221
222		pins_rst {
223			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
224			bias-pull-up;
225		};
226	};
227
228	mmc1_pins_uhs: mmc1 {
229		pins_cmd_dat {
230			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
231				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
232				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
233				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
234				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
235			input-enable;
236			drive-strength = <MTK_DRIVE_4mA>;
237			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
238		};
239
240		pins_clk {
241			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
242			drive-strength = <MTK_DRIVE_4mA>;
243			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
244		};
245	};
246};
247
248&pwm0 {
249	pinctrl-names = "default";
250	pinctrl-0 = <&disp_pwm0_pins>;
251	status = "okay";
252};
253
254&pwrap {
255	/* Only MT8173 E1 needs USB power domain */
256	power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
257
258	pmic: mt6397 {
259		compatible = "mediatek,mt6397";
260		interrupt-parent = <&pio>;
261		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
262		interrupt-controller;
263		#interrupt-cells = <2>;
264
265		mt6397regulator: mt6397regulator {
266			compatible = "mediatek,mt6397-regulator";
267
268			mt6397_vpca15_reg: buck_vpca15 {
269				regulator-compatible = "buck_vpca15";
270				regulator-name = "vpca15";
271				regulator-min-microvolt = < 700000>;
272				regulator-max-microvolt = <1350000>;
273				regulator-ramp-delay = <12500>;
274				regulator-always-on;
275			};
276
277			mt6397_vpca7_reg: buck_vpca7 {
278				regulator-compatible = "buck_vpca7";
279				regulator-name = "vpca7";
280				regulator-min-microvolt = < 700000>;
281				regulator-max-microvolt = <1350000>;
282				regulator-ramp-delay = <12500>;
283				regulator-enable-ramp-delay = <115>;
284			};
285
286			mt6397_vsramca15_reg: buck_vsramca15 {
287				regulator-compatible = "buck_vsramca15";
288				regulator-name = "vsramca15";
289				regulator-min-microvolt = < 700000>;
290				regulator-max-microvolt = <1350000>;
291				regulator-ramp-delay = <12500>;
292				regulator-always-on;
293			};
294
295			mt6397_vsramca7_reg: buck_vsramca7 {
296				regulator-compatible = "buck_vsramca7";
297				regulator-name = "vsramca7";
298				regulator-min-microvolt = < 700000>;
299				regulator-max-microvolt = <1350000>;
300				regulator-ramp-delay = <12500>;
301				regulator-always-on;
302			};
303
304			mt6397_vcore_reg: buck_vcore {
305				regulator-compatible = "buck_vcore";
306				regulator-name = "vcore";
307				regulator-min-microvolt = < 700000>;
308				regulator-max-microvolt = <1350000>;
309				regulator-ramp-delay = <12500>;
310				regulator-always-on;
311			};
312
313			mt6397_vgpu_reg: buck_vgpu {
314				regulator-compatible = "buck_vgpu";
315				regulator-name = "vgpu";
316				regulator-min-microvolt = < 700000>;
317				regulator-max-microvolt = <1350000>;
318				regulator-ramp-delay = <12500>;
319				regulator-enable-ramp-delay = <115>;
320			};
321
322			mt6397_vdrm_reg: buck_vdrm {
323				regulator-compatible = "buck_vdrm";
324				regulator-name = "vdrm";
325				regulator-min-microvolt = <1200000>;
326				regulator-max-microvolt = <1400000>;
327				regulator-ramp-delay = <12500>;
328				regulator-always-on;
329			};
330
331			mt6397_vio18_reg: buck_vio18 {
332				regulator-compatible = "buck_vio18";
333				regulator-name = "vio18";
334				regulator-min-microvolt = <1620000>;
335				regulator-max-microvolt = <1980000>;
336				regulator-ramp-delay = <12500>;
337				regulator-always-on;
338			};
339
340			mt6397_vtcxo_reg: ldo_vtcxo {
341				regulator-compatible = "ldo_vtcxo";
342				regulator-name = "vtcxo";
343				regulator-always-on;
344			};
345
346			mt6397_va28_reg: ldo_va28 {
347				regulator-compatible = "ldo_va28";
348				regulator-name = "va28";
349				regulator-always-on;
350			};
351
352			mt6397_vcama_reg: ldo_vcama {
353				regulator-compatible = "ldo_vcama";
354				regulator-name = "vcama";
355				regulator-min-microvolt = <1500000>;
356				regulator-max-microvolt = <2800000>;
357				regulator-enable-ramp-delay = <218>;
358			};
359
360			mt6397_vio28_reg: ldo_vio28 {
361				regulator-compatible = "ldo_vio28";
362				regulator-name = "vio28";
363				regulator-always-on;
364			};
365
366			mt6397_vusb_reg: ldo_vusb {
367				regulator-compatible = "ldo_vusb";
368				regulator-name = "vusb";
369			};
370
371			mt6397_vmc_reg: ldo_vmc {
372				regulator-compatible = "ldo_vmc";
373				regulator-name = "vmc";
374				regulator-min-microvolt = <1800000>;
375				regulator-max-microvolt = <3300000>;
376				regulator-enable-ramp-delay = <218>;
377			};
378
379			mt6397_vmch_reg: ldo_vmch {
380				regulator-compatible = "ldo_vmch";
381				regulator-name = "vmch";
382				regulator-min-microvolt = <3000000>;
383				regulator-max-microvolt = <3300000>;
384				regulator-enable-ramp-delay = <218>;
385			};
386
387			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
388				regulator-compatible = "ldo_vemc3v3";
389				regulator-name = "vemc_3v3";
390				regulator-min-microvolt = <3000000>;
391				regulator-max-microvolt = <3300000>;
392				regulator-enable-ramp-delay = <218>;
393			};
394
395			mt6397_vgp1_reg: ldo_vgp1 {
396				regulator-compatible = "ldo_vgp1";
397				regulator-name = "vcamd";
398				regulator-min-microvolt = <1220000>;
399				regulator-max-microvolt = <3300000>;
400				regulator-enable-ramp-delay = <240>;
401			};
402
403			mt6397_vgp2_reg: ldo_vgp2 {
404				regulator-compatible = "ldo_vgp2";
405				regulator-name = "vcamio";
406				regulator-min-microvolt = <1000000>;
407				regulator-max-microvolt = <3300000>;
408				regulator-enable-ramp-delay = <218>;
409			};
410
411			mt6397_vgp3_reg: ldo_vgp3 {
412				regulator-compatible = "ldo_vgp3";
413				regulator-name = "vcamaf";
414				regulator-min-microvolt = <1200000>;
415				regulator-max-microvolt = <3300000>;
416				regulator-enable-ramp-delay = <218>;
417			};
418
419			mt6397_vgp4_reg: ldo_vgp4 {
420				regulator-compatible = "ldo_vgp4";
421				regulator-name = "vgp4";
422				regulator-min-microvolt = <1200000>;
423				regulator-max-microvolt = <3300000>;
424				regulator-enable-ramp-delay = <218>;
425			};
426
427			mt6397_vgp5_reg: ldo_vgp5 {
428				regulator-compatible = "ldo_vgp5";
429				regulator-name = "vgp5";
430				regulator-min-microvolt = <1200000>;
431				regulator-max-microvolt = <3000000>;
432				regulator-enable-ramp-delay = <218>;
433			};
434
435			mt6397_vgp6_reg: ldo_vgp6 {
436				regulator-compatible = "ldo_vgp6";
437				regulator-name = "vgp6";
438				regulator-min-microvolt = <1200000>;
439				regulator-max-microvolt = <3300000>;
440				regulator-enable-ramp-delay = <218>;
441			};
442
443			mt6397_vibr_reg: ldo_vibr {
444				regulator-compatible = "ldo_vibr";
445				regulator-name = "vibr";
446				regulator-min-microvolt = <1300000>;
447				regulator-max-microvolt = <3300000>;
448				regulator-enable-ramp-delay = <218>;
449			};
450		};
451	};
452};
453
454&pio {
455	spi_pins_a: spi0 {
456		pins_spi {
457			pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
458				<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
459				<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
460				<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
461		};
462	};
463};
464
465&spi {
466	pinctrl-names = "default";
467	pinctrl-0 = <&spi_pins_a>;
468	mediatek,pad-select = <0>;
469	status = "okay";
470};
471
472&uart0 {
473	status = "okay";
474};
475
476&usb30 {
477	vusb33-supply = <&mt6397_vusb_reg>;
478	vbus-supply = <&usb_p1_vbus>;
479	mediatek,wakeup-src = <1>;
480};
481