1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Authors: Sam.Shih <sam.shih@mediatek.com>
5 *          Frank Wunderlich <frank-w@public-files.de>
6 *          Daniel Golle <daniel@makrotopia.org>
7 */
8
9/dts-v1/;
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/input/input.h>
12#include <dt-bindings/leds/common.h>
13#include <dt-bindings/pinctrl/mt65xx.h>
14
15#include "mt7986a.dtsi"
16
17/ {
18	model = "Bananapi BPI-R3";
19	chassis-type = "embedded";
20	compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
21
22	aliases {
23		serial0 = &uart0;
24		ethernet0 = &gmac0;
25		ethernet1 = &gmac1;
26	};
27
28	chosen {
29		stdout-path = "serial0:115200n8";
30	};
31
32	dcin: regulator-12vd {
33		compatible = "regulator-fixed";
34		regulator-name = "12vd";
35		regulator-min-microvolt = <12000000>;
36		regulator-max-microvolt = <12000000>;
37		regulator-boot-on;
38		regulator-always-on;
39	};
40
41	fan: pwm-fan {
42		compatible = "pwm-fan";
43		#cooling-cells = <2>;
44		/* cooling level (0, 1, 2) - pwm inverted */
45		cooling-levels = <255 96 0>;
46		pwms = <&pwm 0 10000 0>;
47		status = "okay";
48	};
49
50	gpio-keys {
51		compatible = "gpio-keys";
52
53		reset-key {
54			label = "reset";
55			linux,code = <KEY_RESTART>;
56			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
57		};
58
59		wps-key {
60			label = "wps";
61			linux,code = <KEY_WPS_BUTTON>;
62			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
63		};
64	};
65
66	/* i2c of the left SFP cage (wan) */
67	i2c_sfp1: i2c-gpio-0 {
68		compatible = "i2c-gpio";
69		sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
70		scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
71		i2c-gpio,delay-us = <2>;
72		#address-cells = <1>;
73		#size-cells = <0>;
74	};
75
76	/* i2c of the right SFP cage (lan) */
77	i2c_sfp2: i2c-gpio-1 {
78		compatible = "i2c-gpio";
79		sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
80		scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
81		i2c-gpio,delay-us = <2>;
82		#address-cells = <1>;
83		#size-cells = <0>;
84	};
85
86	leds {
87		compatible = "gpio-leds";
88
89		green_led: led-0 {
90			color = <LED_COLOR_ID_GREEN>;
91			function = LED_FUNCTION_POWER;
92			gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
93			default-state = "on";
94		};
95
96		blue_led: led-1 {
97			color = <LED_COLOR_ID_BLUE>;
98			function = LED_FUNCTION_STATUS;
99			gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
100			default-state = "off";
101		};
102	};
103
104	reg_1p8v: regulator-1p8v {
105		compatible = "regulator-fixed";
106		regulator-name = "1.8vd";
107		regulator-min-microvolt = <1800000>;
108		regulator-max-microvolt = <1800000>;
109		regulator-boot-on;
110		regulator-always-on;
111		vin-supply = <&dcin>;
112	};
113
114	reg_3p3v: regulator-3p3v {
115		compatible = "regulator-fixed";
116		regulator-name = "3.3vd";
117		regulator-min-microvolt = <3300000>;
118		regulator-max-microvolt = <3300000>;
119		regulator-boot-on;
120		regulator-always-on;
121		vin-supply = <&dcin>;
122	};
123
124	/* left SFP cage (wan) */
125	sfp1: sfp-1 {
126		compatible = "sff,sfp";
127		i2c-bus = <&i2c_sfp1>;
128		los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
129		mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
130		tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
131		tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
132	};
133
134	/* right SFP cage (lan) */
135	sfp2: sfp-2 {
136		compatible = "sff,sfp";
137		i2c-bus = <&i2c_sfp2>;
138		los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
139		mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
140		tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
141		tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
142	};
143};
144
145&cpu_thermal {
146	cooling-maps {
147		cpu-active-high {
148			/* active: set fan to cooling level 2 */
149			cooling-device = <&fan 2 2>;
150			trip = <&cpu_trip_active_high>;
151		};
152
153		cpu-active-low {
154			/* active: set fan to cooling level 1 */
155			cooling-device = <&fan 1 1>;
156			trip = <&cpu_trip_active_low>;
157		};
158
159		cpu-passive {
160			/* passive: set fan to cooling level 0 */
161			cooling-device = <&fan 0 0>;
162			trip = <&cpu_trip_passive>;
163		};
164	};
165};
166
167&crypto {
168	status = "okay";
169};
170
171&eth {
172	status = "okay";
173
174	gmac0: mac@0 {
175		compatible = "mediatek,eth-mac";
176		reg = <0>;
177		phy-mode = "2500base-x";
178
179		fixed-link {
180			speed = <2500>;
181			full-duplex;
182			pause;
183		};
184	};
185
186	gmac1: mac@1 {
187		compatible = "mediatek,eth-mac";
188		reg = <1>;
189		phy-mode = "2500base-x";
190		sfp = <&sfp1>;
191		managed = "in-band-status";
192	};
193
194	mdio: mdio-bus {
195		#address-cells = <1>;
196		#size-cells = <0>;
197	};
198};
199
200&mdio {
201	switch: switch@31 {
202		compatible = "mediatek,mt7531";
203		reg = <31>;
204		interrupt-controller;
205		#interrupt-cells = <1>;
206		interrupt-parent = <&pio>;
207		interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
208		reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
209	};
210};
211
212&mmc0 {
213	pinctrl-names = "default", "state_uhs";
214	pinctrl-0 = <&mmc0_pins_default>;
215	pinctrl-1 = <&mmc0_pins_uhs>;
216	vmmc-supply = <&reg_3p3v>;
217	vqmmc-supply = <&reg_1p8v>;
218};
219
220&i2c0 {
221	pinctrl-names = "default";
222	pinctrl-0 = <&i2c_pins>;
223	status = "okay";
224};
225
226&pcie {
227	pinctrl-names = "default";
228	pinctrl-0 = <&pcie_pins>;
229	status = "okay";
230};
231
232&pcie_phy {
233	status = "okay";
234};
235
236&pio {
237	i2c_pins: i2c-pins {
238		mux {
239			function = "i2c";
240			groups = "i2c";
241		};
242	};
243
244	mmc0_pins_default: mmc0-pins {
245		mux {
246			function = "emmc";
247			groups = "emmc_51";
248		};
249		conf-cmd-dat {
250			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
251			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
252			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
253			input-enable;
254			drive-strength = <4>;
255			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
256		};
257		conf-clk {
258			pins = "EMMC_CK";
259			drive-strength = <6>;
260			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
261		};
262		conf-ds {
263			pins = "EMMC_DSL";
264			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
265		};
266		conf-rst {
267			pins = "EMMC_RSTB";
268			drive-strength = <4>;
269			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
270		};
271	};
272
273	mmc0_pins_uhs: mmc0-uhs-pins {
274		mux {
275			function = "emmc";
276			groups = "emmc_51";
277		};
278		conf-cmd-dat {
279			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
280			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
281			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
282			input-enable;
283			drive-strength = <4>;
284			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
285		};
286		conf-clk {
287			pins = "EMMC_CK";
288			drive-strength = <6>;
289			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
290		};
291		conf-ds {
292			pins = "EMMC_DSL";
293			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
294		};
295		conf-rst {
296			pins = "EMMC_RSTB";
297			drive-strength = <4>;
298			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
299		};
300	};
301
302	pcie_pins: pcie-pins {
303		mux {
304			function = "pcie";
305			groups = "pcie_clk", "pcie_pereset";
306		};
307	};
308
309	pwm_pins: pwm-pins {
310		mux {
311			function = "pwm";
312			groups = "pwm0", "pwm1_0";
313		};
314	};
315
316	spi_flash_pins: spi-flash-pins {
317		mux {
318			function = "spi";
319			groups = "spi0", "spi0_wp_hold";
320		};
321	};
322
323	spic_pins: spic-pins {
324		mux {
325			function = "spi";
326			groups = "spi1_0";
327		};
328	};
329
330	uart1_pins: uart1-pins {
331		mux {
332			function = "uart";
333			groups = "uart1_rx_tx";
334		};
335	};
336
337	uart2_pins: uart2-pins {
338		mux {
339			function = "uart";
340			groups = "uart2_0_rx_tx";
341		};
342	};
343
344	wf_2g_5g_pins: wf-2g-5g-pins {
345		mux {
346			function = "wifi";
347			groups = "wf_2g", "wf_5g";
348		};
349		conf {
350			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
351			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
352			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
353			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
354			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
355			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
356			       "WF1_TOP_CLK", "WF1_TOP_DATA";
357			drive-strength = <4>;
358		};
359	};
360
361	wf_dbdc_pins: wf-dbdc-pins {
362		mux {
363			function = "wifi";
364			groups = "wf_dbdc";
365		};
366		conf {
367			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
368			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
369			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
370			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
371			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
372			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
373			       "WF1_TOP_CLK", "WF1_TOP_DATA";
374			drive-strength = <4>;
375		};
376	};
377
378	wf_led_pins: wf-led-pins {
379		mux {
380			function = "led";
381			groups = "wifi_led";
382		};
383	};
384};
385
386&pwm {
387	pinctrl-names = "default";
388	pinctrl-0 = <&pwm_pins>;
389	status = "okay";
390};
391
392&spi0 {
393	pinctrl-names = "default";
394	pinctrl-0 = <&spi_flash_pins>;
395	status = "okay";
396};
397
398&spi1 {
399	pinctrl-names = "default";
400	pinctrl-0 = <&spic_pins>;
401	status = "okay";
402};
403
404&ssusb {
405	status = "okay";
406};
407
408&switch {
409	ports {
410		#address-cells = <1>;
411		#size-cells = <0>;
412
413		port@0 {
414			reg = <0>;
415			label = "wan";
416		};
417
418		port@1 {
419			reg = <1>;
420			label = "lan0";
421		};
422
423		port@2 {
424			reg = <2>;
425			label = "lan1";
426		};
427
428		port@3 {
429			reg = <3>;
430			label = "lan2";
431		};
432
433		port@4 {
434			reg = <4>;
435			label = "lan3";
436		};
437
438		port5: port@5 {
439			reg = <5>;
440			label = "lan4";
441			phy-mode = "2500base-x";
442			sfp = <&sfp2>;
443			managed = "in-band-status";
444		};
445
446		port@6 {
447			reg = <6>;
448			label = "cpu";
449			ethernet = <&gmac0>;
450			phy-mode = "2500base-x";
451
452			fixed-link {
453				speed = <2500>;
454				full-duplex;
455				pause;
456			};
457		};
458	};
459};
460
461&trng {
462	status = "okay";
463};
464
465&uart0 {
466	status = "okay";
467};
468
469&uart1 {
470	pinctrl-names = "default";
471	pinctrl-0 = <&uart1_pins>;
472	status = "okay";
473};
474
475&uart2 {
476	pinctrl-names = "default";
477	pinctrl-0 = <&uart2_pins>;
478	status = "okay";
479};
480
481&usb_phy {
482	status = "okay";
483};
484
485&watchdog {
486	status = "okay";
487};
488
489&wifi {
490	status = "okay";
491	pinctrl-names = "default", "dbdc";
492	pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
493	pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
494
495	led {
496		led-active-low;
497	};
498};
499
500