11802d0beSThomas Gleixner// SPDX-License-Identifier: GPL-2.0-only 2e2694524SMars Cheng/* 3e2694524SMars Cheng * Copyright (c) 2015 MediaTek Inc. 4e2694524SMars Cheng * Author: Mars.C <mars.cheng@mediatek.com> 5e2694524SMars Cheng */ 6e2694524SMars Cheng 7e2694524SMars Cheng/dts-v1/; 8e2694524SMars Cheng#include "mt6795.dtsi" 9e2694524SMars Cheng 10e2694524SMars Cheng/ { 11e2694524SMars Cheng model = "MediaTek MT6795 Evaluation Board"; 12e2694524SMars Cheng compatible = "mediatek,mt6795-evb", "mediatek,mt6795"; 13e2694524SMars Cheng 14e2694524SMars Cheng aliases { 15e2694524SMars Cheng serial0 = &uart0; 16e2694524SMars Cheng serial1 = &uart1; 17e2694524SMars Cheng serial2 = &uart2; 18e2694524SMars Cheng serial3 = &uart3; 19e2694524SMars Cheng }; 20e2694524SMars Cheng 21e2694524SMars Cheng memory@40000000 { 22e2694524SMars Cheng device_type = "memory"; 23e2694524SMars Cheng reg = <0 0x40000000 0 0x1e800000>; 24e2694524SMars Cheng }; 25e2694524SMars Cheng 26e2694524SMars Cheng chosen { 27e2694524SMars Cheng stdout-path = "serial0:921600n8"; 28e2694524SMars Cheng }; 29e2694524SMars Cheng}; 30e2694524SMars Cheng 31e2694524SMars Cheng&uart0 { 32e2694524SMars Cheng status = "okay"; 33e2694524SMars Cheng}; 34