1/*
2 * Copyright (c) 2017 MediaTek Inc.
3 * Author: YT Shen <yt.shen@mediatek.com>
4 *
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 */
7
8/dts-v1/;
9#include <dt-bindings/gpio/gpio.h>
10#include "mt2712e.dtsi"
11
12/ {
13	model = "MediaTek MT2712 evaluation board";
14	compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
15
16	aliases {
17		serial0 = &uart0;
18	};
19
20	memory@40000000 {
21		device_type = "memory";
22		reg = <0 0x40000000 0 0x80000000>;
23	};
24
25	chosen {
26		stdout-path = "serial0:921600n8";
27	};
28
29	cpus_fixed_vproc0: fixedregulator@0 {
30		compatible = "regulator-fixed";
31		regulator-name = "vproc_buck0";
32		regulator-min-microvolt = <1000000>;
33		regulator-max-microvolt = <1000000>;
34	};
35
36	cpus_fixed_vproc1: fixedregulator@1 {
37		compatible = "regulator-fixed";
38		regulator-name = "vproc_buck1";
39		regulator-min-microvolt = <1000000>;
40		regulator-max-microvolt = <1000000>;
41	};
42
43	extcon_usb: extcon_iddig {
44		compatible = "linux,extcon-usb-gpio";
45		id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
46	};
47
48	extcon_usb1: extcon_iddig1 {
49		compatible = "linux,extcon-usb-gpio";
50		id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>;
51	};
52
53	usb_p0_vbus: regulator@2 {
54		compatible = "regulator-fixed";
55		regulator-name = "p0_vbus";
56		regulator-min-microvolt = <5000000>;
57		regulator-max-microvolt = <5000000>;
58		gpio = <&pio 13 GPIO_ACTIVE_HIGH>;
59		enable-active-high;
60	};
61
62	usb_p1_vbus: regulator@3 {
63		compatible = "regulator-fixed";
64		regulator-name = "p1_vbus";
65		regulator-min-microvolt = <5000000>;
66		regulator-max-microvolt = <5000000>;
67		gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
68		enable-active-high;
69	};
70
71	usb_p2_vbus: regulator@4 {
72		compatible = "regulator-fixed";
73		regulator-name = "p2_vbus";
74		regulator-min-microvolt = <5000000>;
75		regulator-max-microvolt = <5000000>;
76		gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
77		enable-active-high;
78	};
79
80	usb_p3_vbus: regulator@5 {
81		compatible = "regulator-fixed";
82		regulator-name = "p3_vbus";
83		regulator-min-microvolt = <5000000>;
84		regulator-max-microvolt = <5000000>;
85		gpio = <&pio 17 GPIO_ACTIVE_HIGH>;
86		enable-active-high;
87		regulator-always-on;
88	};
89
90};
91
92&auxadc {
93	status = "okay";
94};
95
96&cpu0 {
97	proc-supply = <&cpus_fixed_vproc0>;
98};
99
100&cpu1 {
101	proc-supply = <&cpus_fixed_vproc0>;
102};
103
104&cpu2 {
105	proc-supply = <&cpus_fixed_vproc1>;
106};
107
108&eth {
109	phy-mode ="rgmii-rxid";
110	phy-handle = <&ethernet_phy0>;
111	mediatek,tx-delay-ps = <1530>;
112	snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;
113	pinctrl-names = "default", "sleep";
114	pinctrl-0 = <&eth_default>;
115	pinctrl-1 = <&eth_sleep>;
116	status = "okay";
117
118	mdio {
119		compatible = "snps,dwmac-mdio";
120		#address-cells = <1>;
121		#size-cells = <0>;
122		ethernet_phy0: ethernet-phy@5 {
123			compatible = "ethernet-phy-id0243.0d90";
124			reg = <0x5>;
125		};
126	};
127};
128
129&pio {
130	eth_default: eth_default {
131		tx_pins {
132			pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
133				 <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
134				 <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>,
135				 <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>,
136				 <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>,
137				 <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>;
138			drive-strength = <MTK_DRIVE_8mA>;
139		};
140		rx_pins {
141			pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>,
142				 <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>,
143				 <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>,
144				 <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>,
145				 <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>,
146				 <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>;
147			input-enable;
148		};
149		mdio_pins {
150			pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>,
151				 <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>;
152			drive-strength = <MTK_DRIVE_8mA>;
153			input-enable;
154		};
155	};
156
157	eth_sleep: eth_sleep {
158		tx_pins {
159			pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
160				 <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
161				 <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>,
162				 <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>,
163				 <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>,
164				 <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>;
165		};
166		rx_pins {
167			pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>,
168				 <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>,
169				 <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>,
170				 <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>,
171				 <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>,
172				 <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>;
173			input-disable;
174		};
175		mdio_pins {
176			pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>,
177				 <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>;
178			input-disable;
179			bias-disable;
180		};
181	};
182
183	usb0_id_pins_float: usb0_iddig {
184		pins_iddig {
185			pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
186			bias-pull-up;
187		};
188	};
189
190	usb1_id_pins_float: usb1_iddig {
191		pins_iddig {
192			pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
193			bias-pull-up;
194		};
195	};
196};
197
198&ssusb {
199	vbus-supply = <&usb_p0_vbus>;
200	extcon = <&extcon_usb>;
201	dr_mode = "otg";
202	wakeup-source;
203	mediatek,u3p-dis-msk = <0x1>;
204	//enable-manual-drd;
205	//maximum-speed = "full-speed";
206	pinctrl-names = "default";
207	pinctrl-0 = <&usb0_id_pins_float>;
208	status = "okay";
209};
210
211&ssusb1 {
212	vbus-supply = <&usb_p1_vbus>;
213	extcon = <&extcon_usb1>;
214	dr_mode = "otg";
215	//mediatek,u3p-dis-msk = <0x1>;
216	enable-manual-drd;
217	wakeup-source;
218	//maximum-speed = "full-speed";
219	pinctrl-names = "default";
220	pinctrl-0 = <&usb1_id_pins_float>;
221	status = "okay";
222};
223
224&uart0 {
225	status = "okay";
226};
227
228&usb_host0 {
229	vbus-supply = <&usb_p2_vbus>;
230	status = "okay";
231};
232
233&usb_host1 {
234	status = "okay";
235};
236