14c43a41eSKonstantin Porotchkin// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 24c43a41eSKonstantin Porotchkin/* 34c43a41eSKonstantin Porotchkin * Copyright (C) 2020 Marvell International Ltd. 44c43a41eSKonstantin Porotchkin * 54c43a41eSKonstantin Porotchkin * Device tree for the CN9132-DB board. 64c43a41eSKonstantin Porotchkin */ 74c43a41eSKonstantin Porotchkin 84c43a41eSKonstantin Porotchkin#include "cn9131-db.dtsi" 94c43a41eSKonstantin Porotchkin 104c43a41eSKonstantin Porotchkin/ { 114c43a41eSKonstantin Porotchkin compatible = "marvell,cn9132", "marvell,cn9131", "marvell,cn9130", 124c43a41eSKonstantin Porotchkin "marvell,armada-ap807-quad", "marvell,armada-ap807"; 134c43a41eSKonstantin Porotchkin 144c43a41eSKonstantin Porotchkin aliases { 154c43a41eSKonstantin Porotchkin gpio5 = &cp2_gpio1; 164c43a41eSKonstantin Porotchkin gpio6 = &cp2_gpio2; 174c43a41eSKonstantin Porotchkin ethernet5 = &cp2_eth0; 184c43a41eSKonstantin Porotchkin }; 194c43a41eSKonstantin Porotchkin 204c43a41eSKonstantin Porotchkin cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 { 214c43a41eSKonstantin Porotchkin compatible = "regulator-fixed"; 224c43a41eSKonstantin Porotchkin regulator-name = "cp2-xhci0-vbus"; 234c43a41eSKonstantin Porotchkin regulator-min-microvolt = <5000000>; 244c43a41eSKonstantin Porotchkin regulator-max-microvolt = <5000000>; 254c43a41eSKonstantin Porotchkin enable-active-high; 264c43a41eSKonstantin Porotchkin gpio = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>; 274c43a41eSKonstantin Porotchkin }; 284c43a41eSKonstantin Porotchkin 294c43a41eSKonstantin Porotchkin cp2_usb3_0_phy0: cp2_usb3_phy0 { 304c43a41eSKonstantin Porotchkin compatible = "usb-nop-xceiv"; 314c43a41eSKonstantin Porotchkin vcc-supply = <&cp2_reg_usb3_vbus0>; 324c43a41eSKonstantin Porotchkin }; 334c43a41eSKonstantin Porotchkin 344c43a41eSKonstantin Porotchkin cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 { 354c43a41eSKonstantin Porotchkin compatible = "regulator-fixed"; 364c43a41eSKonstantin Porotchkin regulator-name = "cp2-xhci1-vbus"; 374c43a41eSKonstantin Porotchkin regulator-min-microvolt = <5000000>; 384c43a41eSKonstantin Porotchkin regulator-max-microvolt = <5000000>; 394c43a41eSKonstantin Porotchkin enable-active-high; 404c43a41eSKonstantin Porotchkin gpio = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>; 414c43a41eSKonstantin Porotchkin }; 424c43a41eSKonstantin Porotchkin 434c43a41eSKonstantin Porotchkin cp2_usb3_0_phy1: cp2_usb3_phy1 { 444c43a41eSKonstantin Porotchkin compatible = "usb-nop-xceiv"; 454c43a41eSKonstantin Porotchkin vcc-supply = <&cp2_reg_usb3_vbus1>; 464c43a41eSKonstantin Porotchkin }; 474c43a41eSKonstantin Porotchkin 484c43a41eSKonstantin Porotchkin cp2_reg_sd_vccq: cp2_sd_vccq@0 { 494c43a41eSKonstantin Porotchkin compatible = "regulator-gpio"; 504c43a41eSKonstantin Porotchkin regulator-name = "cp2_sd_vcc"; 514c43a41eSKonstantin Porotchkin regulator-min-microvolt = <1800000>; 524c43a41eSKonstantin Porotchkin regulator-max-microvolt = <3300000>; 534c43a41eSKonstantin Porotchkin gpios = <&cp2_gpio2 17 GPIO_ACTIVE_HIGH>; 544c43a41eSKonstantin Porotchkin states = <1800000 0x1 3300000 0x0>; 554c43a41eSKonstantin Porotchkin }; 564c43a41eSKonstantin Porotchkin 574c43a41eSKonstantin Porotchkin cp2_sfp_eth0: sfp-eth0 { 584c43a41eSKonstantin Porotchkin compatible = "sff,sfp"; 594c43a41eSKonstantin Porotchkin i2c-bus = <&cp2_sfpp0_i2c>; 604c43a41eSKonstantin Porotchkin los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>; 614c43a41eSKonstantin Porotchkin mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>; 624c43a41eSKonstantin Porotchkin tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>; 634c43a41eSKonstantin Porotchkin tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>; 644c43a41eSKonstantin Porotchkin /* 654c43a41eSKonstantin Porotchkin * SFP cages are unconnected on early PCBs because of an the I2C 664c43a41eSKonstantin Porotchkin * lanes not being connected. Prevent the port for being 674c43a41eSKonstantin Porotchkin * unusable by disabling the SFP node. 684c43a41eSKonstantin Porotchkin */ 694c43a41eSKonstantin Porotchkin status = "disabled"; 704c43a41eSKonstantin Porotchkin }; 714c43a41eSKonstantin Porotchkin}; 724c43a41eSKonstantin Porotchkin 734c43a41eSKonstantin Porotchkin/* 744c43a41eSKonstantin Porotchkin * Instantiate the second slave CP115 754c43a41eSKonstantin Porotchkin */ 764c43a41eSKonstantin Porotchkin 774c43a41eSKonstantin Porotchkin#define CP11X_NAME cp2 784c43a41eSKonstantin Porotchkin#define CP11X_BASE f6000000 794c43a41eSKonstantin Porotchkin#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000)) 804c43a41eSKonstantin Porotchkin#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 814c43a41eSKonstantin Porotchkin#define CP11X_PCIE0_BASE f6600000 824c43a41eSKonstantin Porotchkin#define CP11X_PCIE1_BASE f6620000 834c43a41eSKonstantin Porotchkin#define CP11X_PCIE2_BASE f6640000 844c43a41eSKonstantin Porotchkin 854c43a41eSKonstantin Porotchkin#include "armada-cp115.dtsi" 864c43a41eSKonstantin Porotchkin 874c43a41eSKonstantin Porotchkin#undef CP11X_NAME 884c43a41eSKonstantin Porotchkin#undef CP11X_BASE 894c43a41eSKonstantin Porotchkin#undef CP11X_PCIEx_MEM_BASE 904c43a41eSKonstantin Porotchkin#undef CP11X_PCIEx_MEM_SIZE 914c43a41eSKonstantin Porotchkin#undef CP11X_PCIE0_BASE 924c43a41eSKonstantin Porotchkin#undef CP11X_PCIE1_BASE 934c43a41eSKonstantin Porotchkin#undef CP11X_PCIE2_BASE 944c43a41eSKonstantin Porotchkin 954c43a41eSKonstantin Porotchkin&cp2_crypto { 964c43a41eSKonstantin Porotchkin status = "disabled"; 974c43a41eSKonstantin Porotchkin}; 984c43a41eSKonstantin Porotchkin 994c43a41eSKonstantin Porotchkin&cp2_ethernet { 1004c43a41eSKonstantin Porotchkin status = "okay"; 1014c43a41eSKonstantin Porotchkin}; 1024c43a41eSKonstantin Porotchkin 1034c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON9 */ 1044c43a41eSKonstantin Porotchkin&cp2_eth0 { 1054c43a41eSKonstantin Porotchkin status = "disabled"; 106*45b25653SKonstantin Porotchkin phy-mode = "10gbase-r"; 1074c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 1084c43a41eSKonstantin Porotchkin phys = <&cp2_comphy4 0>; 1094c43a41eSKonstantin Porotchkin managed = "in-band-status"; 1104c43a41eSKonstantin Porotchkin sfp = <&cp2_sfp_eth0>; 1114c43a41eSKonstantin Porotchkin}; 1124c43a41eSKonstantin Porotchkin 1134c43a41eSKonstantin Porotchkin&cp2_gpio1 { 1144c43a41eSKonstantin Porotchkin status = "okay"; 1154c43a41eSKonstantin Porotchkin}; 1164c43a41eSKonstantin Porotchkin 1174c43a41eSKonstantin Porotchkin&cp2_gpio2 { 1184c43a41eSKonstantin Porotchkin status = "okay"; 1194c43a41eSKonstantin Porotchkin}; 1204c43a41eSKonstantin Porotchkin 1214c43a41eSKonstantin Porotchkin&cp2_i2c0 { 1224c43a41eSKonstantin Porotchkin clock-frequency = <100000>; 1234c43a41eSKonstantin Porotchkin 1244c43a41eSKonstantin Porotchkin /* SLM-1521-V2 - U3 */ 1254c43a41eSKonstantin Porotchkin i2c-mux@72 { 1264c43a41eSKonstantin Porotchkin compatible = "nxp,pca9544"; 1274c43a41eSKonstantin Porotchkin #address-cells = <1>; 1284c43a41eSKonstantin Porotchkin #size-cells = <0>; 1294c43a41eSKonstantin Porotchkin reg = <0x72>; 1304c43a41eSKonstantin Porotchkin cp2_sfpp0_i2c: i2c@0 { 1314c43a41eSKonstantin Porotchkin #address-cells = <1>; 1324c43a41eSKonstantin Porotchkin #size-cells = <0>; 1334c43a41eSKonstantin Porotchkin reg = <0>; 1344c43a41eSKonstantin Porotchkin }; 1354c43a41eSKonstantin Porotchkin 1364c43a41eSKonstantin Porotchkin i2c@1 { 1374c43a41eSKonstantin Porotchkin #address-cells = <1>; 1384c43a41eSKonstantin Porotchkin #size-cells = <0>; 1394c43a41eSKonstantin Porotchkin reg = <1>; 1404c43a41eSKonstantin Porotchkin /* U12 */ 1414c43a41eSKonstantin Porotchkin cp2_module_expander1: pca9555@21 { 1424c43a41eSKonstantin Porotchkin compatible = "nxp,pca9555"; 1434c43a41eSKonstantin Porotchkin pinctrl-names = "default"; 1444c43a41eSKonstantin Porotchkin gpio-controller; 1454c43a41eSKonstantin Porotchkin #gpio-cells = <2>; 1464c43a41eSKonstantin Porotchkin reg = <0x21>; 1474c43a41eSKonstantin Porotchkin }; 1484c43a41eSKonstantin Porotchkin }; 1494c43a41eSKonstantin Porotchkin }; 1504c43a41eSKonstantin Porotchkin}; 1514c43a41eSKonstantin Porotchkin 1524c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON6 */ 1534c43a41eSKonstantin Porotchkin&cp2_pcie0 { 1544c43a41eSKonstantin Porotchkin status = "okay"; 1554c43a41eSKonstantin Porotchkin num-lanes = <2>; 1564c43a41eSKonstantin Porotchkin num-viewport = <8>; 1574c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 1584c43a41eSKonstantin Porotchkin phys = <&cp2_comphy0 0 1594c43a41eSKonstantin Porotchkin &cp2_comphy1 0>; 1604c43a41eSKonstantin Porotchkin}; 1614c43a41eSKonstantin Porotchkin 1624c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON8 */ 1634c43a41eSKonstantin Porotchkin&cp2_pcie2 { 1644c43a41eSKonstantin Porotchkin status = "okay"; 1654c43a41eSKonstantin Porotchkin num-lanes = <1>; 1664c43a41eSKonstantin Porotchkin num-viewport = <8>; 1674c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 1684c43a41eSKonstantin Porotchkin phys = <&cp2_comphy5 2>; 1694c43a41eSKonstantin Porotchkin}; 1704c43a41eSKonstantin Porotchkin 1714c43a41eSKonstantin Porotchkin&cp2_sata0 { 1724c43a41eSKonstantin Porotchkin status = "okay"; 1734c43a41eSKonstantin Porotchkin 1744c43a41eSKonstantin Porotchkin /* SLM-1521-V2, CON4 */ 1754c43a41eSKonstantin Porotchkin sata-port@0 { 1764c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 1774c43a41eSKonstantin Porotchkin phys = <&cp2_comphy2 0>; 1784c43a41eSKonstantin Porotchkin }; 1794c43a41eSKonstantin Porotchkin}; 1804c43a41eSKonstantin Porotchkin 1814c43a41eSKonstantin Porotchkin/* CON 2 on SLM-1683 - microSD */ 1824c43a41eSKonstantin Porotchkin&cp2_sdhci0 { 1834c43a41eSKonstantin Porotchkin status = "okay"; 1844c43a41eSKonstantin Porotchkin pinctrl-names = "default"; 1854c43a41eSKonstantin Porotchkin pinctrl-0 = <&cp2_sdhci_pins>; 1864c43a41eSKonstantin Porotchkin bus-width = <4>; 1874c43a41eSKonstantin Porotchkin cd-gpios = <&cp2_gpio2 23 GPIO_ACTIVE_LOW>; 1884c43a41eSKonstantin Porotchkin vqmmc-supply = <&cp2_reg_sd_vccq>; 1894c43a41eSKonstantin Porotchkin}; 1904c43a41eSKonstantin Porotchkin 1914c43a41eSKonstantin Porotchkin&cp2_syscon0 { 1924c43a41eSKonstantin Porotchkin cp2_pinctrl: pinctrl { 1934c43a41eSKonstantin Porotchkin compatible = "marvell,cp115-standalone-pinctrl"; 1944c43a41eSKonstantin Porotchkin 1954c43a41eSKonstantin Porotchkin cp2_i2c0_pins: cp2-i2c-pins-0 { 1964c43a41eSKonstantin Porotchkin marvell,pins = "mpp37", "mpp38"; 1974c43a41eSKonstantin Porotchkin marvell,function = "i2c0"; 1984c43a41eSKonstantin Porotchkin }; 1994c43a41eSKonstantin Porotchkin cp2_sdhci_pins: cp2-sdhi-pins-0 { 2004c43a41eSKonstantin Porotchkin marvell,pins = "mpp56", "mpp57", "mpp58", 2014c43a41eSKonstantin Porotchkin "mpp59", "mpp60", "mpp61"; 2024c43a41eSKonstantin Porotchkin marvell,function = "sdio"; 2034c43a41eSKonstantin Porotchkin }; 2044c43a41eSKonstantin Porotchkin }; 2054c43a41eSKonstantin Porotchkin}; 2064c43a41eSKonstantin Porotchkin 2074c43a41eSKonstantin Porotchkin&cp2_utmi { 2084c43a41eSKonstantin Porotchkin status = "okay"; 2094c43a41eSKonstantin Porotchkin}; 2104c43a41eSKonstantin Porotchkin 2114c43a41eSKonstantin Porotchkin&cp2_usb3_0 { 2124c43a41eSKonstantin Porotchkin status = "okay"; 2134c43a41eSKonstantin Porotchkin usb-phy = <&cp2_usb3_0_phy0>; 2144c43a41eSKonstantin Porotchkin phys = <&cp2_utmi0>; 2154c43a41eSKonstantin Porotchkin phy-names = "usb"; 2164c43a41eSKonstantin Porotchkin dr_mode = "host"; 2174c43a41eSKonstantin Porotchkin}; 2184c43a41eSKonstantin Porotchkin 2194c43a41eSKonstantin Porotchkin/* SLM-1521-V2, CON11 */ 2204c43a41eSKonstantin Porotchkin&cp2_usb3_1 { 2214c43a41eSKonstantin Porotchkin status = "okay"; 2224c43a41eSKonstantin Porotchkin usb-phy = <&cp2_usb3_0_phy1>; 2234c43a41eSKonstantin Porotchkin /* Generic PHY, providing serdes lanes */ 2244c43a41eSKonstantin Porotchkin phys = <&cp2_comphy3 1>, <&cp2_utmi1>; 2254c43a41eSKonstantin Porotchkin phy-names = "usb", "utmi"; 2264c43a41eSKonstantin Porotchkin dr_mode = "host"; 2274c43a41eSKonstantin Porotchkin}; 228