1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2019 Marvell International Ltd.
4 *
5 * Device tree for the CN9130 SoC.
6 */
7
8#include "armada-ap807-quad.dtsi"
9
10/ {
11	model = "Marvell Armada CN9130 SoC";
12	compatible = "marvell,cn9130", "marvell,armada-ap807-quad",
13		     "marvell,armada-ap807";
14
15	aliases {
16		gpio1 = &cp0_gpio1;
17		gpio2 = &cp0_gpio2;
18		spi1 = &cp0_spi0;
19		spi2 = &cp0_spi1;
20	};
21};
22
23/*
24 * Instantiate the internal CP115
25 */
26
27#define CP11X_NAME		cp0
28#define CP11X_BASE		f2000000
29#define CP11X_PCIEx_MEM_BASE(iface) ((iface == 0) ? 0xc0000000 : \
30						    0xe0000000 + ((iface - 1) * 0x1000000))
31#define CP11X_PCIEx_MEM_SIZE(iface) ((iface == 0) ? 0x1ff00000 : 0xf00000)
32#define CP11X_PCIE0_BASE	f2600000
33#define CP11X_PCIE1_BASE	f2620000
34#define CP11X_PCIE2_BASE	f2640000
35
36#include "armada-cp115.dtsi"
37
38#undef CP11X_NAME
39#undef CP11X_BASE
40#undef CP11X_PCIEx_MEM_BASE
41#undef CP11X_PCIEx_MEM_SIZE
42#undef CP11X_PCIE0_BASE
43#undef CP11X_PCIE1_BASE
44#undef CP11X_PCIE2_BASE
45
46&cp0_gpio1 {
47	status = "okay";
48};
49
50&cp0_gpio2 {
51	status = "okay";
52};
53