xref: /openbmc/linux/arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi (revision 93707cbabcc8baf2b2b5f4a99c1f08ee83eb7abd)
1/*
2 * Copyright (C) 2017 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada AP810.
45 */
46
47#include <dt-bindings/interrupt-controller/arm-gic.h>
48
49/dts-v1/;
50
51/ {
52	model = "Marvell Armada AP810";
53	compatible = "marvell,armada-ap810";
54	#address-cells = <2>;
55	#size-cells = <2>;
56
57	aliases {
58		serial0 = &uart0_ap0;
59		serial1 = &uart1_ap0;
60	};
61
62	psci {
63		compatible = "arm,psci-0.2";
64		method = "smc";
65	};
66
67	ap810-ap0 {
68		#address-cells = <2>;
69		#size-cells = <2>;
70		compatible = "simple-bus";
71		interrupt-parent = <&gic>;
72		ranges;
73
74		config-space@e8000000 {
75			#address-cells = <1>;
76			#size-cells = <1>;
77			compatible = "simple-bus";
78			ranges = <0x0 0x0 0xe8000000 0x4000000>;
79			interrupt-parent = <&gic>;
80
81			gic: interrupt-controller@3000000 {
82				compatible = "arm,gic-v3";
83				#interrupt-cells = <3>;
84				#address-cells = <1>;
85				#size-cells = <1>;
86				interrupt-controller;
87				interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
88				ranges;
89
90				reg = <0x3000000 0x10000>,	/* GICD */
91				      <0x3060000 0x100000>,	/* GICR */
92				      <0x00c0000 0x2000>,	/* GICC */
93				      <0x00d0000 0x1000>,	/* GICH */
94				      <0x00e0000 0x2000>;	/* GICV */
95
96				gic_its_ap0: interrupt-controller@3040000 {
97					compatible = "arm,gic-v3-its";
98					msi-controller;
99					#msi-cells = <1>;
100					reg = <0x3040000 0x20000>;
101				};
102			};
103
104			timer {
105				compatible = "arm,armv8-timer";
106				interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
107					     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
108					     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
109					     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
110			};
111
112			xor@400000 {
113				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
114				reg = <0x400000 0x1000>,
115				      <0x410000 0x1000>;
116				msi-parent = <&gic_its_ap0 0xa0>;
117				dma-coherent;
118			};
119
120			xor@420000 {
121				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
122				reg = <0x420000 0x1000>,
123				      <0x430000 0x1000>;
124				msi-parent = <&gic_its_ap0 0xa1>;
125				dma-coherent;
126			};
127
128			xor@440000 {
129				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
130				reg = <0x440000 0x1000>,
131				      <0x450000 0x1000>;
132				msi-parent = <&gic_its_ap0 0xa2>;
133				dma-coherent;
134			};
135
136			xor@460000 {
137				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
138				reg = <0x460000 0x1000>,
139				      <0x470000 0x1000>;
140				msi-parent = <&gic_its_ap0 0xa3>;
141				dma-coherent;
142			};
143
144			uart0_ap0: serial@512000 {
145				compatible = "snps,dw-apb-uart";
146				reg = <0x512000 0x100>;
147				reg-shift = <2>;
148				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
149				reg-io-width = <1>;
150				status = "disabled";
151			};
152
153			uart1_ap0: serial@512100 {
154				compatible = "snps,dw-apb-uart";
155				reg = <0x512100 0x100>;
156				reg-shift = <2>;
157				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
158				reg-io-width = <1>;
159				status = "disabled";
160			};
161		};
162	};
163};
164