1/* 2 * Copyright (C) 2016 Marvell Technology Group Ltd. 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPLv2 or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43/* 44 * Device Tree file for MACCHIATOBin Armada 8040 community board platform 45 */ 46 47#include "armada-8040.dtsi" 48 49#include <dt-bindings/gpio/gpio.h> 50 51/ { 52 model = "Marvell 8040 MACHIATOBin"; 53 compatible = "marvell,armada8040-mcbin", "marvell,armada8040", 54 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 55 56 chosen { 57 stdout-path = "serial0:115200n8"; 58 }; 59 60 memory@0 { 61 device_type = "memory"; 62 reg = <0x0 0x0 0x0 0x80000000>; 63 }; 64 65 aliases { 66 ethernet0 = &cp0_eth0; 67 ethernet1 = &cp1_eth0; 68 ethernet2 = &cp1_eth1; 69 }; 70 71 /* Regulator labels correspond with schematics */ 72 v_3_3: regulator-3-3v { 73 compatible = "regulator-fixed"; 74 regulator-name = "v_3_3"; 75 regulator-min-microvolt = <3300000>; 76 regulator-max-microvolt = <3300000>; 77 regulator-always-on; 78 status = "okay"; 79 }; 80 81 v_vddo_h: regulator-1-8v { 82 compatible = "regulator-fixed"; 83 regulator-name = "v_vddo_h"; 84 regulator-min-microvolt = <1800000>; 85 regulator-max-microvolt = <1800000>; 86 regulator-always-on; 87 status = "okay"; 88 }; 89 90 v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 { 91 compatible = "regulator-fixed"; 92 enable-active-high; 93 gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&cp0_xhci_vbus_pins>; 96 regulator-name = "v_5v0_usb3_hst_vbus"; 97 regulator-min-microvolt = <5000000>; 98 regulator-max-microvolt = <5000000>; 99 status = "okay"; 100 }; 101 102 usb3h0_phy: usb3_phy0 { 103 compatible = "usb-nop-xceiv"; 104 vcc-supply = <&v_5v0_usb3_hst_vbus>; 105 }; 106}; 107 108&uart0 { 109 status = "okay"; 110 pinctrl-0 = <&uart0_pins>; 111 pinctrl-names = "default"; 112}; 113 114&ap_sdhci0 { 115 bus-width = <8>; 116 /* 117 * Not stable in HS modes - phy needs "more calibration", so add 118 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes. 119 */ 120 marvell,xenon-phy-slow-mode; 121 no-1-8-v; 122 no-sd; 123 no-sdio; 124 non-removable; 125 status = "okay"; 126 vqmmc-supply = <&v_vddo_h>; 127}; 128 129&cp0_i2c0 { 130 clock-frequency = <100000>; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&cp0_i2c0_pins>; 133 status = "okay"; 134}; 135 136&cp0_i2c1 { 137 clock-frequency = <100000>; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&cp0_i2c1_pins>; 140 status = "okay"; 141 142 i2c-switch@70 { 143 compatible = "nxp,pca9548"; 144 #address-cells = <1>; 145 #size-cells = <0>; 146 reg = <0x70>; 147 148 sfpp0_i2c: i2c@0 { 149 #address-cells = <1>; 150 #size-cells = <0>; 151 reg = <0>; 152 }; 153 sfpp1_i2c: i2c@1 { 154 #address-cells = <1>; 155 #size-cells = <0>; 156 reg = <1>; 157 }; 158 sfp_1g_i2c: i2c@2 { 159 #address-cells = <1>; 160 #size-cells = <0>; 161 reg = <2>; 162 }; 163 }; 164}; 165 166&cp0_mdio { 167 pinctrl-names = "default"; 168 pinctrl-0 = <&cp0_ge_mdio_pins>; 169 status = "okay"; 170 171 ge_phy: ethernet-phy@0 { 172 reg = <0>; 173 }; 174}; 175 176&cp0_pcie0 { 177 pinctrl-names = "default"; 178 pinctrl-0 = <&cp0_pcie_pins>; 179 num-lanes = <4>; 180 num-viewport = <8>; 181 reset-gpio = <&cp0_gpio1 20 GPIO_ACTIVE_LOW>; 182 status = "okay"; 183}; 184 185&cp0_pinctrl { 186 cp0_ge_mdio_pins: ge-mdio-pins { 187 marvell,pins = "mpp32", "mpp34"; 188 marvell,function = "ge"; 189 }; 190 cp0_i2c1_pins: i2c1-pins { 191 marvell,pins = "mpp35", "mpp36"; 192 marvell,function = "i2c1"; 193 }; 194 cp0_i2c0_pins: i2c0-pins { 195 marvell,pins = "mpp37", "mpp38"; 196 marvell,function = "i2c0"; 197 }; 198 cp0_xhci_vbus_pins: xhci0-vbus-pins { 199 marvell,pins = "mpp47"; 200 marvell,function = "gpio"; 201 }; 202 cp0_pcie_pins: pcie-pins { 203 marvell,pins = "mpp52"; 204 marvell,function = "gpio"; 205 }; 206 cp0_sdhci_pins: sdhci-pins { 207 marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59", 208 "mpp60", "mpp61"; 209 marvell,function = "sdio"; 210 }; 211}; 212 213&cp0_xmdio { 214 status = "okay"; 215 216 phy0: ethernet-phy@0 { 217 compatible = "ethernet-phy-ieee802.3-c45"; 218 reg = <0>; 219 }; 220 221 phy8: ethernet-phy@8 { 222 compatible = "ethernet-phy-ieee802.3-c45"; 223 reg = <8>; 224 }; 225}; 226 227&cp0_ethernet { 228 status = "okay"; 229}; 230 231&cp0_eth0 { 232 status = "okay"; 233 /* Network PHY */ 234 phy = <&phy0>; 235 phy-mode = "10gbase-kr"; 236 /* Generic PHY, providing serdes lanes */ 237 phys = <&cp0_comphy4 0>; 238}; 239 240&cp0_sata0 { 241 /* CPM Lane 0 - U29 */ 242 status = "okay"; 243}; 244 245&cp0_sdhci0 { 246 /* U6 */ 247 broken-cd; 248 bus-width = <4>; 249 pinctrl-names = "default"; 250 pinctrl-0 = <&cp0_sdhci_pins>; 251 status = "okay"; 252 vqmmc-supply = <&v_3_3>; 253}; 254 255&cp0_usb3_0 { 256 /* J38? - USB2.0 only */ 257 status = "okay"; 258}; 259 260&cp0_usb3_1 { 261 /* J38? - USB2.0 only */ 262 status = "okay"; 263}; 264 265&cp1_ethernet { 266 status = "okay"; 267}; 268 269&cp1_eth0 { 270 status = "okay"; 271 /* Network PHY */ 272 phy = <&phy8>; 273 phy-mode = "10gbase-kr"; 274 /* Generic PHY, providing serdes lanes */ 275 phys = <&cp1_comphy4 0>; 276}; 277 278&cp1_eth1 { 279 /* CPS Lane 0 - J5 (Gigabit RJ45) */ 280 status = "okay"; 281 /* Network PHY */ 282 phy = <&ge_phy>; 283 phy-mode = "sgmii"; 284 /* Generic PHY, providing serdes lanes */ 285 phys = <&cp1_comphy0 1>; 286}; 287 288&cp1_pinctrl { 289 cp1_spi1_pins: spi1-pins { 290 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16"; 291 marvell,function = "spi1"; 292 }; 293}; 294 295&cp1_sata0 { 296 /* CPS Lane 1 - U32 */ 297 /* CPS Lane 3 - U31 */ 298 status = "okay"; 299}; 300 301&cp1_spi1 { 302 pinctrl-names = "default"; 303 pinctrl-0 = <&cp1_spi1_pins>; 304 status = "okay"; 305 306 spi-flash@0 { 307 compatible = "st,w25q32"; 308 spi-max-frequency = <50000000>; 309 reg = <0>; 310 }; 311}; 312 313&cp1_usb3_0 { 314 /* CPS Lane 2 - CON7 */ 315 usb-phy = <&usb3h0_phy>; 316 status = "okay"; 317}; 318