1/* 2 * Copyright (C) 2016 Marvell Technology Group Ltd. 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPLv2 or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43/* 44 * Device Tree file for MACCHIATOBin Armada 8040 community board platform 45 */ 46 47#include "armada-8040.dtsi" 48 49#include <dt-bindings/gpio/gpio.h> 50 51/ { 52 model = "Marvell 8040 MACHIATOBin"; 53 compatible = "marvell,armada8040-mcbin", "marvell,armada8040", 54 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 55 56 chosen { 57 stdout-path = "serial0:115200n8"; 58 }; 59 60 memory@0 { 61 device_type = "memory"; 62 reg = <0x0 0x0 0x0 0x80000000>; 63 }; 64 65 /* Regulator labels correspond with schematics */ 66 v_3_3: regulator-3-3v { 67 compatible = "regulator-fixed"; 68 regulator-name = "v_3_3"; 69 regulator-min-microvolt = <3300000>; 70 regulator-max-microvolt = <3300000>; 71 regulator-always-on; 72 status = "okay"; 73 }; 74 75 v_vddo_h: regulator-1-8v { 76 compatible = "regulator-fixed"; 77 regulator-name = "v_vddo_h"; 78 regulator-min-microvolt = <1800000>; 79 regulator-max-microvolt = <1800000>; 80 regulator-always-on; 81 status = "okay"; 82 }; 83 84 v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 { 85 compatible = "regulator-fixed"; 86 enable-active-high; 87 gpio = <&cpm_gpio2 15 GPIO_ACTIVE_HIGH>; 88 pinctrl-names = "default"; 89 pinctrl-0 = <&cpm_xhci_vbus_pins>; 90 regulator-name = "v_5v0_usb3_hst_vbus"; 91 regulator-min-microvolt = <5000000>; 92 regulator-max-microvolt = <5000000>; 93 status = "okay"; 94 }; 95 96 usb3h0_phy: usb3_phy0 { 97 compatible = "usb-nop-xceiv"; 98 vcc-supply = <&v_5v0_usb3_hst_vbus>; 99 }; 100}; 101 102&uart0 { 103 status = "okay"; 104}; 105 106&ap_sdhci0 { 107 bus-width = <8>; 108 /* 109 * Not stable in HS modes - phy needs "more calibration", so add 110 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes. 111 */ 112 marvell,xenon-phy-slow-mode; 113 no-1-8-v; 114 no-sd; 115 no-sdio; 116 non-removable; 117 status = "okay"; 118 vqmmc-supply = <&v_vddo_h>; 119}; 120 121&cpm_i2c0 { 122 clock-frequency = <100000>; 123 pinctrl-names = "default"; 124 pinctrl-0 = <&cpm_i2c0_pins>; 125 status = "okay"; 126}; 127 128&cpm_i2c1 { 129 clock-frequency = <100000>; 130 pinctrl-names = "default"; 131 pinctrl-0 = <&cpm_i2c1_pins>; 132 status = "okay"; 133 134 i2c-switch@70 { 135 compatible = "nxp,pca9548"; 136 #address-cells = <1>; 137 #size-cells = <0>; 138 reg = <0x70>; 139 140 sfpp0_i2c: i2c@0 { 141 #address-cells = <1>; 142 #size-cells = <0>; 143 reg = <0>; 144 }; 145 sfpp1_i2c: i2c@1 { 146 #address-cells = <1>; 147 #size-cells = <0>; 148 reg = <1>; 149 }; 150 sfp_1g_i2c: i2c@2 { 151 #address-cells = <1>; 152 #size-cells = <0>; 153 reg = <2>; 154 }; 155 }; 156}; 157 158&cpm_mdio { 159 pinctrl-names = "default"; 160 pinctrl-0 = <&cpm_ge_mdio_pins>; 161 status = "okay"; 162 163 ge_phy: ethernet-phy@0 { 164 reg = <0>; 165 }; 166}; 167 168&cpm_pcie0 { 169 pinctrl-names = "default"; 170 pinctrl-0 = <&cpm_pcie_pins>; 171 num-lanes = <4>; 172 num-viewport = <8>; 173 reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_LOW>; 174 status = "okay"; 175}; 176 177&cpm_pinctrl { 178 cpm_ge_mdio_pins: ge-mdio-pins { 179 marvell,pins = "mpp32", "mpp34"; 180 marvell,function = "ge"; 181 }; 182 cpm_i2c1_pins: i2c1-pins { 183 marvell,pins = "mpp35", "mpp36"; 184 marvell,function = "i2c1"; 185 }; 186 cpm_i2c0_pins: i2c0-pins { 187 marvell,pins = "mpp37", "mpp38"; 188 marvell,function = "i2c0"; 189 }; 190 cpm_xhci_vbus_pins: xhci0-vbus-pins { 191 marvell,pins = "mpp47"; 192 marvell,function = "gpio"; 193 }; 194 cpm_pcie_pins: pcie-pins { 195 marvell,pins = "mpp52"; 196 marvell,function = "gpio"; 197 }; 198 cpm_sdhci_pins: sdhci-pins { 199 marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59", 200 "mpp60", "mpp61"; 201 marvell,function = "sdio"; 202 }; 203}; 204 205&cpm_xmdio { 206 status = "okay"; 207 208 phy0: ethernet-phy@0 { 209 compatible = "ethernet-phy-ieee802.3-c45"; 210 reg = <0>; 211 }; 212 213 phy8: ethernet-phy@8 { 214 compatible = "ethernet-phy-ieee802.3-c45"; 215 reg = <8>; 216 }; 217}; 218 219&cpm_ethernet { 220 status = "okay"; 221}; 222 223&cpm_eth0 { 224 status = "okay"; 225 phy = <&phy0>; 226 phy-mode = "10gbase-kr"; 227}; 228 229&cpm_sata0 { 230 /* CPM Lane 0 - U29 */ 231 status = "okay"; 232}; 233 234&cpm_sdhci0 { 235 /* U6 */ 236 broken-cd; 237 bus-width = <4>; 238 pinctrl-names = "default"; 239 pinctrl-0 = <&cpm_sdhci_pins>; 240 status = "okay"; 241 vqmmc-supply = <&v_3_3>; 242}; 243 244&cpm_usb3_0 { 245 /* J38? - USB2.0 only */ 246 status = "okay"; 247}; 248 249&cpm_usb3_1 { 250 /* J38? - USB2.0 only */ 251 status = "okay"; 252}; 253 254&cps_ethernet { 255 status = "okay"; 256}; 257 258&cps_eth0 { 259 status = "okay"; 260 phy = <&phy8>; 261 phy-mode = "10gbase-kr"; 262}; 263 264&cps_eth1 { 265 /* CPS Lane 0 - J5 (Gigabit RJ45) */ 266 status = "okay"; 267 phy = <&ge_phy>; 268 phy-mode = "sgmii"; 269}; 270 271&cps_pinctrl { 272 cps_spi1_pins: spi1-pins { 273 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16"; 274 marvell,function = "spi1"; 275 }; 276}; 277 278&cps_sata0 { 279 /* CPS Lane 1 - U32 */ 280 /* CPS Lane 3 - U31 */ 281 status = "okay"; 282}; 283 284&cps_spi1 { 285 pinctrl-names = "default"; 286 pinctrl-0 = <&cps_spi1_pins>; 287 status = "okay"; 288 289 spi-flash@0 { 290 compatible = "st,w25q32"; 291 spi-max-frequency = <50000000>; 292 reg = <0>; 293 }; 294}; 295 296&cps_usb3_0 { 297 /* CPS Lane 2 - CON7 */ 298 usb-phy = <&usb3h0_phy>; 299 status = "okay"; 300}; 301