1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for MACCHIATOBin Armada 8040 community board platform
45 */
46
47#include "armada-8040.dtsi"
48
49#include <dt-bindings/gpio/gpio.h>
50
51/ {
52	model = "Marvell 8040 MACHIATOBin";
53	compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
54			"marvell,armada-ap806-quad", "marvell,armada-ap806";
55
56	chosen {
57		stdout-path = "serial0:115200n8";
58	};
59
60	memory@0 {
61		device_type = "memory";
62		reg = <0x0 0x0 0x0 0x80000000>;
63	};
64
65	/* Regulator labels correspond with schematics */
66	v_3_3: regulator-3-3v {
67		compatible = "regulator-fixed";
68		regulator-name = "v_3_3";
69		regulator-min-microvolt = <3300000>;
70		regulator-max-microvolt = <3300000>;
71		regulator-always-on;
72		status = "okay";
73	};
74
75	v_vddo_h: regulator-1-8v {
76		compatible = "regulator-fixed";
77		regulator-name = "v_vddo_h";
78		regulator-min-microvolt = <1800000>;
79		regulator-max-microvolt = <1800000>;
80		regulator-always-on;
81		status = "okay";
82	};
83
84	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
85		compatible = "regulator-fixed";
86		enable-active-high;
87		gpio = <&cpm_gpio2 15 GPIO_ACTIVE_HIGH>;
88		pinctrl-names = "default";
89		pinctrl-0 = <&cpm_xhci_vbus_pins>;
90		regulator-name = "v_5v0_usb3_hst_vbus";
91		regulator-min-microvolt = <5000000>;
92		regulator-max-microvolt = <5000000>;
93		status = "okay";
94	};
95
96	usb3h0_phy: usb3_phy0 {
97		compatible = "usb-nop-xceiv";
98		vcc-supply = <&v_5v0_usb3_hst_vbus>;
99	};
100};
101
102&uart0 {
103	status = "okay";
104	pinctrl-0 = <&uart0_pins>;
105	pinctrl-names = "default";
106};
107
108&ap_sdhci0 {
109	bus-width = <8>;
110	/*
111	 * Not stable in HS modes - phy needs "more calibration", so add
112	 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
113	 */
114	marvell,xenon-phy-slow-mode;
115	no-1-8-v;
116	no-sd;
117	no-sdio;
118	non-removable;
119	status = "okay";
120	vqmmc-supply = <&v_vddo_h>;
121};
122
123&cpm_i2c0 {
124	clock-frequency = <100000>;
125	pinctrl-names = "default";
126	pinctrl-0 = <&cpm_i2c0_pins>;
127	status = "okay";
128};
129
130&cpm_i2c1 {
131	clock-frequency = <100000>;
132	pinctrl-names = "default";
133	pinctrl-0 = <&cpm_i2c1_pins>;
134	status = "okay";
135
136	i2c-switch@70 {
137		compatible = "nxp,pca9548";
138		#address-cells = <1>;
139		#size-cells = <0>;
140		reg = <0x70>;
141
142		sfpp0_i2c: i2c@0 {
143			#address-cells = <1>;
144			#size-cells = <0>;
145			reg = <0>;
146		};
147		sfpp1_i2c: i2c@1 {
148			#address-cells = <1>;
149			#size-cells = <0>;
150			reg = <1>;
151		};
152		sfp_1g_i2c: i2c@2 {
153			#address-cells = <1>;
154			#size-cells = <0>;
155			reg = <2>;
156		};
157	};
158};
159
160&cpm_mdio {
161	pinctrl-names = "default";
162	pinctrl-0 = <&cpm_ge_mdio_pins>;
163	status = "okay";
164
165	ge_phy: ethernet-phy@0 {
166		reg = <0>;
167	};
168};
169
170&cpm_pcie0 {
171	pinctrl-names = "default";
172	pinctrl-0 = <&cpm_pcie_pins>;
173	num-lanes = <4>;
174	num-viewport = <8>;
175	reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_LOW>;
176	status = "okay";
177};
178
179&cpm_pinctrl {
180	cpm_ge_mdio_pins: ge-mdio-pins {
181		marvell,pins = "mpp32", "mpp34";
182		marvell,function = "ge";
183	};
184	cpm_i2c1_pins: i2c1-pins {
185		marvell,pins = "mpp35", "mpp36";
186		marvell,function = "i2c1";
187	};
188	cpm_i2c0_pins: i2c0-pins {
189		marvell,pins = "mpp37", "mpp38";
190		marvell,function = "i2c0";
191	};
192	cpm_xhci_vbus_pins: xhci0-vbus-pins {
193		marvell,pins = "mpp47";
194		marvell,function = "gpio";
195	};
196	cpm_pcie_pins: pcie-pins {
197		marvell,pins = "mpp52";
198		marvell,function = "gpio";
199	};
200	cpm_sdhci_pins: sdhci-pins {
201		marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
202			       "mpp60", "mpp61";
203		marvell,function = "sdio";
204	};
205};
206
207&cpm_xmdio {
208	status = "okay";
209
210	phy0: ethernet-phy@0 {
211		compatible = "ethernet-phy-ieee802.3-c45";
212		reg = <0>;
213	};
214
215	phy8: ethernet-phy@8 {
216		compatible = "ethernet-phy-ieee802.3-c45";
217		reg = <8>;
218	};
219};
220
221&cpm_ethernet {
222	status = "okay";
223};
224
225&cpm_eth0 {
226	status = "okay";
227	/* Network PHY */
228	phy = <&phy0>;
229	phy-mode = "10gbase-kr";
230	/* Generic PHY, providing serdes lanes */
231	phys = <&cpm_comphy4 0>;
232};
233
234&cpm_sata0 {
235	/* CPM Lane 0 - U29 */
236	status = "okay";
237};
238
239&cpm_sdhci0 {
240	/* U6 */
241	broken-cd;
242	bus-width = <4>;
243	pinctrl-names = "default";
244	pinctrl-0 = <&cpm_sdhci_pins>;
245	status = "okay";
246	vqmmc-supply = <&v_3_3>;
247};
248
249&cpm_usb3_0 {
250	/* J38? - USB2.0 only */
251	status = "okay";
252};
253
254&cpm_usb3_1 {
255	/* J38? - USB2.0 only */
256	status = "okay";
257};
258
259&cps_ethernet {
260	status = "okay";
261};
262
263&cps_eth0 {
264	status = "okay";
265	/* Network PHY */
266	phy = <&phy8>;
267	phy-mode = "10gbase-kr";
268	/* Generic PHY, providing serdes lanes */
269	phys = <&cps_comphy4 0>;
270};
271
272&cps_eth1 {
273	/* CPS Lane 0 - J5 (Gigabit RJ45) */
274	status = "okay";
275	/* Network PHY */
276	phy = <&ge_phy>;
277	phy-mode = "sgmii";
278	/* Generic PHY, providing serdes lanes */
279	phys = <&cps_comphy0 1>;
280};
281
282&cps_pinctrl {
283	cps_spi1_pins: spi1-pins {
284		marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
285		marvell,function = "spi1";
286	};
287};
288
289&cps_sata0 {
290	/* CPS Lane 1 - U32 */
291	/* CPS Lane 3 - U31 */
292	status = "okay";
293};
294
295&cps_spi1 {
296	pinctrl-names = "default";
297	pinctrl-0 = <&cps_spi1_pins>;
298	status = "okay";
299
300	spi-flash@0 {
301		compatible = "st,w25q32";
302		spi-max-frequency = <50000000>;
303		reg = <0>;
304	};
305};
306
307&cps_usb3_0 {
308	/* CPS Lane 2 - CON7 */
309	usb-phy = <&usb3h0_phy>;
310	status = "okay";
311};
312