1d3f4759bSRussell King/*
2d3f4759bSRussell King * Copyright (C) 2016 Marvell Technology Group Ltd.
3d3f4759bSRussell King *
4d3f4759bSRussell King * This file is dual-licensed: you can use it either under the terms
5d3f4759bSRussell King * of the GPLv2 or the X11 license, at your option. Note that this dual
6d3f4759bSRussell King * licensing only applies to this file, and not this project as a
7d3f4759bSRussell King * whole.
8d3f4759bSRussell King *
9d3f4759bSRussell King *  a) This library is free software; you can redistribute it and/or
10d3f4759bSRussell King *     modify it under the terms of the GNU General Public License as
11d3f4759bSRussell King *     published by the Free Software Foundation; either version 2 of the
12d3f4759bSRussell King *     License, or (at your option) any later version.
13d3f4759bSRussell King *
14d3f4759bSRussell King *     This library is distributed in the hope that it will be useful,
15d3f4759bSRussell King *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16d3f4759bSRussell King *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17d3f4759bSRussell King *     GNU General Public License for more details.
18d3f4759bSRussell King *
19d3f4759bSRussell King * Or, alternatively,
20d3f4759bSRussell King *
21d3f4759bSRussell King *  b) Permission is hereby granted, free of charge, to any person
22d3f4759bSRussell King *     obtaining a copy of this software and associated documentation
23d3f4759bSRussell King *     files (the "Software"), to deal in the Software without
24d3f4759bSRussell King *     restriction, including without limitation the rights to use,
25d3f4759bSRussell King *     copy, modify, merge, publish, distribute, sublicense, and/or
26d3f4759bSRussell King *     sell copies of the Software, and to permit persons to whom the
27d3f4759bSRussell King *     Software is furnished to do so, subject to the following
28d3f4759bSRussell King *     conditions:
29d3f4759bSRussell King *
30d3f4759bSRussell King *     The above copyright notice and this permission notice shall be
31d3f4759bSRussell King *     included in all copies or substantial portions of the Software.
32d3f4759bSRussell King *
33d3f4759bSRussell King *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34d3f4759bSRussell King *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35d3f4759bSRussell King *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36d3f4759bSRussell King *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37d3f4759bSRussell King *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38d3f4759bSRussell King *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39d3f4759bSRussell King *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40d3f4759bSRussell King *     OTHER DEALINGS IN THE SOFTWARE.
41d3f4759bSRussell King */
42d3f4759bSRussell King
43d3f4759bSRussell King/*
44d3f4759bSRussell King * Device Tree file for MACCHIATOBin Armada 8040 community board platform
45d3f4759bSRussell King */
46d3f4759bSRussell King
47d3f4759bSRussell King#include "armada-8040.dtsi"
48d3f4759bSRussell King
4945df70cbSRussell King#include <dt-bindings/gpio/gpio.h>
5045df70cbSRussell King
51d3f4759bSRussell King/ {
52d3f4759bSRussell King	model = "Marvell 8040 MACHIATOBin";
53d3f4759bSRussell King	compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
54d3f4759bSRussell King			"marvell,armada-ap806-quad", "marvell,armada-ap806";
55d3f4759bSRussell King
56f8c19a88SAntoine Tenart	chosen {
57f8c19a88SAntoine Tenart		stdout-path = "serial0:115200n8";
58f8c19a88SAntoine Tenart	};
59f8c19a88SAntoine Tenart
60d8bcaabeSRob Herring	memory@0 {
61d3f4759bSRussell King		device_type = "memory";
62d3f4759bSRussell King		reg = <0x0 0x0 0x0 0x80000000>;
63d3f4759bSRussell King	};
64d3f4759bSRussell King
65474c5885SYan Markman	aliases {
66474c5885SYan Markman		ethernet0 = &cp0_eth0;
67474c5885SYan Markman		ethernet1 = &cp1_eth0;
68474c5885SYan Markman		ethernet2 = &cp1_eth1;
69474c5885SYan Markman	};
70474c5885SYan Markman
71d3f4759bSRussell King	/* Regulator labels correspond with schematics */
72d3f4759bSRussell King	v_3_3: regulator-3-3v {
73d3f4759bSRussell King		compatible = "regulator-fixed";
74d3f4759bSRussell King		regulator-name = "v_3_3";
75d3f4759bSRussell King		regulator-min-microvolt = <3300000>;
76d3f4759bSRussell King		regulator-max-microvolt = <3300000>;
77d3f4759bSRussell King		regulator-always-on;
78d3f4759bSRussell King		status = "okay";
79d3f4759bSRussell King	};
80d3f4759bSRussell King
81d3f4759bSRussell King	v_vddo_h: regulator-1-8v {
82d3f4759bSRussell King		compatible = "regulator-fixed";
83d3f4759bSRussell King		regulator-name = "v_vddo_h";
84d3f4759bSRussell King		regulator-min-microvolt = <1800000>;
85d3f4759bSRussell King		regulator-max-microvolt = <1800000>;
86d3f4759bSRussell King		regulator-always-on;
87d3f4759bSRussell King		status = "okay";
88d3f4759bSRussell King	};
89d3f4759bSRussell King
90d3f4759bSRussell King	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
91d3f4759bSRussell King		compatible = "regulator-fixed";
9245df70cbSRussell King		enable-active-high;
9391f1be92SThomas Petazzoni		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
9445df70cbSRussell King		pinctrl-names = "default";
9591f1be92SThomas Petazzoni		pinctrl-0 = <&cp0_xhci_vbus_pins>;
96d3f4759bSRussell King		regulator-name = "v_5v0_usb3_hst_vbus";
97d3f4759bSRussell King		regulator-min-microvolt = <5000000>;
98d3f4759bSRussell King		regulator-max-microvolt = <5000000>;
99d3f4759bSRussell King		status = "okay";
100d3f4759bSRussell King	};
101d3f4759bSRussell King
102d3f4759bSRussell King	usb3h0_phy: usb3_phy0 {
103d3f4759bSRussell King		compatible = "usb-nop-xceiv";
104d3f4759bSRussell King		vcc-supply = <&v_5v0_usb3_hst_vbus>;
105d3f4759bSRussell King	};
106d3f4759bSRussell King};
107d3f4759bSRussell King
108d3f4759bSRussell King&uart0 {
109d3f4759bSRussell King	status = "okay";
1109e83bbdbSThomas Petazzoni	pinctrl-0 = <&uart0_pins>;
1119e83bbdbSThomas Petazzoni	pinctrl-names = "default";
112d3f4759bSRussell King};
113d3f4759bSRussell King
11452983041SRussell King&ap_sdhci0 {
11552983041SRussell King	bus-width = <8>;
11652983041SRussell King	/*
11752983041SRussell King	 * Not stable in HS modes - phy needs "more calibration", so add
11852983041SRussell King	 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
11952983041SRussell King	 */
12052983041SRussell King	marvell,xenon-phy-slow-mode;
12152983041SRussell King	no-1-8-v;
12252983041SRussell King	no-sd;
12352983041SRussell King	no-sdio;
12452983041SRussell King	non-removable;
12552983041SRussell King	status = "okay";
12652983041SRussell King	vqmmc-supply = <&v_vddo_h>;
12752983041SRussell King};
12852983041SRussell King
12991f1be92SThomas Petazzoni&cp0_i2c0 {
130d3f4759bSRussell King	clock-frequency = <100000>;
13131ec18e0SRussell King	pinctrl-names = "default";
13291f1be92SThomas Petazzoni	pinctrl-0 = <&cp0_i2c0_pins>;
133d3f4759bSRussell King	status = "okay";
134d3f4759bSRussell King};
135d3f4759bSRussell King
13691f1be92SThomas Petazzoni&cp0_i2c1 {
1378a91e158SRussell King	clock-frequency = <100000>;
1388a91e158SRussell King	pinctrl-names = "default";
13991f1be92SThomas Petazzoni	pinctrl-0 = <&cp0_i2c1_pins>;
1408a91e158SRussell King	status = "okay";
1418a91e158SRussell King
1428a91e158SRussell King	i2c-switch@70 {
1438a91e158SRussell King		compatible = "nxp,pca9548";
1448a91e158SRussell King		#address-cells = <1>;
1458a91e158SRussell King		#size-cells = <0>;
1468a91e158SRussell King		reg = <0x70>;
1478a91e158SRussell King
1488a91e158SRussell King		sfpp0_i2c: i2c@0 {
1498a91e158SRussell King			#address-cells = <1>;
1508a91e158SRussell King			#size-cells = <0>;
1518a91e158SRussell King			reg = <0>;
1528a91e158SRussell King		};
1538a91e158SRussell King		sfpp1_i2c: i2c@1 {
1548a91e158SRussell King			#address-cells = <1>;
1558a91e158SRussell King			#size-cells = <0>;
1568a91e158SRussell King			reg = <1>;
1578a91e158SRussell King		};
1588a91e158SRussell King		sfp_1g_i2c: i2c@2 {
1598a91e158SRussell King			#address-cells = <1>;
1608a91e158SRussell King			#size-cells = <0>;
1618a91e158SRussell King			reg = <2>;
1628a91e158SRussell King		};
1638a91e158SRussell King	};
1648a91e158SRussell King};
1658a91e158SRussell King
16691f1be92SThomas Petazzoni&cp0_mdio {
16731ec18e0SRussell King	pinctrl-names = "default";
16891f1be92SThomas Petazzoni	pinctrl-0 = <&cp0_ge_mdio_pins>;
1696691565fSAntoine Tenart	status = "okay";
1706691565fSAntoine Tenart
1712a324659SMarc Zyngier	ge_phy: ethernet-phy@0 {
1722a324659SMarc Zyngier		reg = <0>;
1732a324659SMarc Zyngier	};
1742a324659SMarc Zyngier};
1752a324659SMarc Zyngier
17691f1be92SThomas Petazzoni&cp0_pcie0 {
177b83e1669SRussell King	pinctrl-names = "default";
17891f1be92SThomas Petazzoni	pinctrl-0 = <&cp0_pcie_pins>;
179b83e1669SRussell King	num-lanes = <4>;
180b83e1669SRussell King	num-viewport = <8>;
18191f1be92SThomas Petazzoni	reset-gpio = <&cp0_gpio1 20 GPIO_ACTIVE_LOW>;
182b83e1669SRussell King	status = "okay";
183b83e1669SRussell King};
184b83e1669SRussell King
18591f1be92SThomas Petazzoni&cp0_pinctrl {
18691f1be92SThomas Petazzoni	cp0_ge_mdio_pins: ge-mdio-pins {
18731ec18e0SRussell King		marvell,pins = "mpp32", "mpp34";
18831ec18e0SRussell King		marvell,function = "ge";
18931ec18e0SRussell King	};
19091f1be92SThomas Petazzoni	cp0_i2c1_pins: i2c1-pins {
1918a91e158SRussell King		marvell,pins = "mpp35", "mpp36";
1928a91e158SRussell King		marvell,function = "i2c1";
1938a91e158SRussell King	};
19491f1be92SThomas Petazzoni	cp0_i2c0_pins: i2c0-pins {
19531ec18e0SRussell King		marvell,pins = "mpp37", "mpp38";
19631ec18e0SRussell King		marvell,function = "i2c0";
19731ec18e0SRussell King	};
19891f1be92SThomas Petazzoni	cp0_xhci_vbus_pins: xhci0-vbus-pins {
19945df70cbSRussell King		marvell,pins = "mpp47";
20045df70cbSRussell King		marvell,function = "gpio";
20145df70cbSRussell King	};
20291f1be92SThomas Petazzoni	cp0_pcie_pins: pcie-pins {
203b83e1669SRussell King		marvell,pins = "mpp52";
204b83e1669SRussell King		marvell,function = "gpio";
205b83e1669SRussell King	};
20691f1be92SThomas Petazzoni	cp0_sdhci_pins: sdhci-pins {
20731ec18e0SRussell King		marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
20831ec18e0SRussell King			       "mpp60", "mpp61";
20931ec18e0SRussell King		marvell,function = "sdio";
21031ec18e0SRussell King	};
21131ec18e0SRussell King};
21231ec18e0SRussell King
21391f1be92SThomas Petazzoni&cp0_xmdio {
21472af17b9SAntoine Tenart	status = "okay";
21572af17b9SAntoine Tenart
21672af17b9SAntoine Tenart	phy0: ethernet-phy@0 {
21772af17b9SAntoine Tenart		compatible = "ethernet-phy-ieee802.3-c45";
21872af17b9SAntoine Tenart		reg = <0>;
21972af17b9SAntoine Tenart	};
22072af17b9SAntoine Tenart
22172af17b9SAntoine Tenart	phy8: ethernet-phy@8 {
22272af17b9SAntoine Tenart		compatible = "ethernet-phy-ieee802.3-c45";
22372af17b9SAntoine Tenart		reg = <8>;
22472af17b9SAntoine Tenart	};
22572af17b9SAntoine Tenart};
22672af17b9SAntoine Tenart
22791f1be92SThomas Petazzoni&cp0_ethernet {
22872af17b9SAntoine Tenart	status = "okay";
22972af17b9SAntoine Tenart};
23072af17b9SAntoine Tenart
23191f1be92SThomas Petazzoni&cp0_eth0 {
23272af17b9SAntoine Tenart	status = "okay";
233760b3843SAntoine Tenart	/* Network PHY */
23472af17b9SAntoine Tenart	phy = <&phy0>;
23572af17b9SAntoine Tenart	phy-mode = "10gbase-kr";
236760b3843SAntoine Tenart	/* Generic PHY, providing serdes lanes */
23791f1be92SThomas Petazzoni	phys = <&cp0_comphy4 0>;
23872af17b9SAntoine Tenart};
23972af17b9SAntoine Tenart
24091f1be92SThomas Petazzoni&cp0_sata0 {
241d3f4759bSRussell King	/* CPM Lane 0 - U29 */
242d3f4759bSRussell King	status = "okay";
243d3f4759bSRussell King};
244d3f4759bSRussell King
24591f1be92SThomas Petazzoni&cp0_sdhci0 {
24652983041SRussell King	/* U6 */
24752983041SRussell King	broken-cd;
24852983041SRussell King	bus-width = <4>;
24931ec18e0SRussell King	pinctrl-names = "default";
25091f1be92SThomas Petazzoni	pinctrl-0 = <&cp0_sdhci_pins>;
25152983041SRussell King	status = "okay";
25252983041SRussell King	vqmmc-supply = <&v_3_3>;
25352983041SRussell King};
25452983041SRussell King
25591f1be92SThomas Petazzoni&cp0_usb3_0 {
256d3f4759bSRussell King	/* J38? - USB2.0 only */
257d3f4759bSRussell King	status = "okay";
258d3f4759bSRussell King};
259d3f4759bSRussell King
26091f1be92SThomas Petazzoni&cp0_usb3_1 {
261d3f4759bSRussell King	/* J38? - USB2.0 only */
262d3f4759bSRussell King	status = "okay";
263d3f4759bSRussell King};
264d3f4759bSRussell King
26591f1be92SThomas Petazzoni&cp1_ethernet {
2662a324659SMarc Zyngier	status = "okay";
2672a324659SMarc Zyngier};
2682a324659SMarc Zyngier
26991f1be92SThomas Petazzoni&cp1_eth0 {
27072af17b9SAntoine Tenart	status = "okay";
271760b3843SAntoine Tenart	/* Network PHY */
27272af17b9SAntoine Tenart	phy = <&phy8>;
27372af17b9SAntoine Tenart	phy-mode = "10gbase-kr";
274760b3843SAntoine Tenart	/* Generic PHY, providing serdes lanes */
27591f1be92SThomas Petazzoni	phys = <&cp1_comphy4 0>;
27672af17b9SAntoine Tenart};
27772af17b9SAntoine Tenart
27891f1be92SThomas Petazzoni&cp1_eth1 {
2792a324659SMarc Zyngier	/* CPS Lane 0 - J5 (Gigabit RJ45) */
2802a324659SMarc Zyngier	status = "okay";
281760b3843SAntoine Tenart	/* Network PHY */
2822a324659SMarc Zyngier	phy = <&ge_phy>;
2832a324659SMarc Zyngier	phy-mode = "sgmii";
284760b3843SAntoine Tenart	/* Generic PHY, providing serdes lanes */
28591f1be92SThomas Petazzoni	phys = <&cp1_comphy0 1>;
2862a324659SMarc Zyngier};
2872a324659SMarc Zyngier
28891f1be92SThomas Petazzoni&cp1_pinctrl {
28991f1be92SThomas Petazzoni	cp1_spi1_pins: spi1-pins {
29031ec18e0SRussell King		marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
29131ec18e0SRussell King		marvell,function = "spi1";
29231ec18e0SRussell King	};
29331ec18e0SRussell King};
29431ec18e0SRussell King
29591f1be92SThomas Petazzoni&cp1_sata0 {
296d3f4759bSRussell King	/* CPS Lane 1 - U32 */
297d3f4759bSRussell King	/* CPS Lane 3 - U31 */
298d3f4759bSRussell King	status = "okay";
299d3f4759bSRussell King};
300d3f4759bSRussell King
30191f1be92SThomas Petazzoni&cp1_spi1 {
30231ec18e0SRussell King	pinctrl-names = "default";
30391f1be92SThomas Petazzoni	pinctrl-0 = <&cp1_spi1_pins>;
304d3f4759bSRussell King	status = "okay";
305d3f4759bSRussell King
306d3f4759bSRussell King	spi-flash@0 {
307d3f4759bSRussell King		compatible = "st,w25q32";
308d3f4759bSRussell King		spi-max-frequency = <50000000>;
309d3f4759bSRussell King		reg = <0>;
310d3f4759bSRussell King	};
311d3f4759bSRussell King};
312d3f4759bSRussell King
31391f1be92SThomas Petazzoni&cp1_usb3_0 {
314d3f4759bSRussell King	/* CPS Lane 2 - CON7 */
315d3f4759bSRussell King	usb-phy = <&usb3h0_phy>;
316d3f4759bSRussell King	status = "okay";
317d3f4759bSRussell King};
318