1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada 8040 Development board platform
45 */
46
47#include <dt-bindings/gpio/gpio.h>
48#include "armada-8040.dtsi"
49
50/ {
51	model = "Marvell Armada 8040 DB board";
52	compatible = "marvell,armada8040-db", "marvell,armada8040",
53		     "marvell,armada-ap806-quad", "marvell,armada-ap806";
54
55	chosen {
56		stdout-path = "serial0:115200n8";
57	};
58
59	memory@0 {
60		device_type = "memory";
61		reg = <0x0 0x0 0x0 0x80000000>;
62	};
63
64	cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus {
65		compatible = "regulator-fixed";
66		regulator-name = "cpm-usb3h0-vbus";
67		regulator-min-microvolt = <5000000>;
68		regulator-max-microvolt = <5000000>;
69		enable-active-high;
70		gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
71	};
72
73	cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus {
74		compatible = "regulator-fixed";
75		regulator-name = "cpm-usb3h1-vbus";
76		regulator-min-microvolt = <5000000>;
77		regulator-max-microvolt = <5000000>;
78		enable-active-high;
79		gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
80	};
81
82	cpm_usb3_0_phy: cpm-usb3-0-phy {
83		compatible = "usb-nop-xceiv";
84		vcc-supply = <&cpm_reg_usb3_0_vbus>;
85	};
86
87	cpm_usb3_1_phy: cpm-usb3-1-phy {
88		compatible = "usb-nop-xceiv";
89		vcc-supply = <&cpm_reg_usb3_1_vbus>;
90	};
91
92	cps_reg_usb3_0_vbus: cps-usb3-0-vbus {
93		compatible = "regulator-fixed";
94		regulator-name = "cps-usb3h0-vbus";
95		regulator-min-microvolt = <5000000>;
96		regulator-max-microvolt = <5000000>;
97		enable-active-high;
98		gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
99	};
100
101	cps_usb3_0_phy: cps-usb3-0-phy {
102		compatible = "usb-nop-xceiv";
103		vcc-supply = <&cps_reg_usb3_0_vbus>;
104	};
105};
106
107&i2c0 {
108	status = "okay";
109	clock-frequency = <100000>;
110};
111
112&spi0 {
113	status = "okay";
114
115	spi-flash@0 {
116		#address-cells = <1>;
117		#size-cells = <1>;
118		compatible = "jedec,spi-nor";
119		reg = <0>;
120		spi-max-frequency = <10000000>;
121
122		partitions {
123			compatible = "fixed-partitions";
124			#address-cells = <1>;
125			#size-cells = <1>;
126
127			partition@0 {
128				label = "U-Boot";
129				reg = <0 0x200000>;
130			};
131			partition@400000 {
132				label = "Filesystem";
133				reg = <0x200000 0xce0000>;
134			};
135		};
136	};
137};
138
139/* Accessible over the mini-USB CON9 connector on the main board */
140&uart0 {
141	status = "okay";
142	pinctrl-0 = <&uart0_pins>;
143	pinctrl-names = "default";
144};
145
146/* CON6 on CP0 expansion */
147&cpm_pcie0 {
148	status = "okay";
149};
150
151/* CON5 on CP0 expansion */
152&cpm_pcie2 {
153	status = "okay";
154};
155
156&cpm_i2c0 {
157	status = "okay";
158	clock-frequency = <100000>;
159
160	/* U31 */
161	expander0: pca9555@21 {
162		compatible = "nxp,pca9555";
163		pinctrl-names = "default";
164		gpio-controller;
165		#gpio-cells = <2>;
166		reg = <0x21>;
167	};
168
169	/* U25 */
170	expander1: pca9555@25 {
171		compatible = "nxp,pca9555";
172		pinctrl-names = "default";
173		gpio-controller;
174		#gpio-cells = <2>;
175		reg = <0x25>;
176	};
177
178};
179
180/* CON4 on CP0 expansion */
181&cpm_sata0 {
182	status = "okay";
183};
184
185/* CON9 on CP0 expansion */
186&cpm_usb3_0 {
187	usb-phy = <&cpm_usb3_0_phy>;
188	status = "okay";
189};
190
191/* CON10 on CP0 expansion */
192&cpm_usb3_1 {
193	usb-phy = <&cpm_usb3_1_phy>;
194	status = "okay";
195};
196
197&cpm_mdio {
198	status = "okay";
199
200	phy1: ethernet-phy@1 {
201		reg = <1>;
202	};
203};
204
205&cpm_ethernet {
206	status = "okay";
207};
208
209&cpm_eth0 {
210	status = "okay";
211	phy-mode = "10gbase-kr";
212};
213
214&cpm_eth2 {
215	status = "okay";
216	phy = <&phy1>;
217	phy-mode = "rgmii-id";
218};
219
220/* CON6 on CP1 expansion */
221&cps_pcie0 {
222	status = "okay";
223};
224
225/* CON7 on CP1 expansion */
226&cps_pcie1 {
227	status = "okay";
228};
229
230/* CON5 on CP1 expansion */
231&cps_pcie2 {
232	status = "okay";
233};
234
235&cps_i2c0 {
236	status = "okay";
237	clock-frequency = <100000>;
238};
239
240&cps_spi1 {
241	status = "okay";
242
243	spi-flash@0 {
244		#address-cells = <0x1>;
245		#size-cells = <0x1>;
246		compatible = "jedec,spi-nor";
247		reg = <0x0>;
248		spi-max-frequency = <20000000>;
249
250		partitions {
251			compatible = "fixed-partitions";
252			#address-cells = <1>;
253			#size-cells = <1>;
254
255			partition@0 {
256				label = "Boot";
257				reg = <0x0 0x200000>;
258			};
259			partition@200000 {
260				label = "Filesystem";
261				reg = <0x200000 0xd00000>;
262			};
263			partition@f00000 {
264				label = "Boot_2nd";
265				reg = <0xf00000 0x100000>;
266			};
267		};
268	};
269};
270
271/*
272 * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
273 * MDIO signal of CP1.
274 */
275&cps_nand {
276	num-cs = <1>;
277	pinctrl-0 = <&nand_pins>, <&nand_rb>;
278	pinctrl-names = "default";
279	nand-ecc-strength = <4>;
280	nand-ecc-step-size = <512>;
281	marvell,nand-enable-arbiter;
282	marvell,system-controller = <&cps_syscon0>;
283	nand-on-flash-bbt;
284
285	partition@0 {
286		label = "U-Boot";
287		reg = <0 0x200000>;
288	};
289	partition@200000 {
290		label = "Linux";
291		reg = <0x200000 0xe00000>;
292	};
293	partition@1000000 {
294		label = "Filesystem";
295		reg = <0x1000000 0x3f000000>;
296	};
297};
298
299/* CON4 on CP1 expansion */
300&cps_sata0 {
301	status = "okay";
302};
303
304/* CON9 on CP1 expansion */
305&cps_usb3_0 {
306	usb-phy = <&cps_usb3_0_phy>;
307	status = "okay";
308};
309
310/* CON10 on CP1 expansion */
311&cps_usb3_1 {
312	status = "okay";
313};
314
315&cps_mdio {
316	status = "okay";
317
318	phy0: ethernet-phy@0 {
319		reg = <0>;
320	};
321};
322
323&cps_ethernet {
324	status = "okay";
325};
326
327&cps_eth0 {
328	status = "okay";
329	phy-mode = "10gbase-kr";
330};
331
332&cps_eth1 {
333	status = "okay";
334	phy = <&phy0>;
335	phy-mode = "rgmii-id";
336};
337
338&ap_sdhci0 {
339	status = "okay";
340	bus-width = <4>;
341	non-removable;
342};
343
344&cpm_sdhci0 {
345	status = "okay";
346	bus-width = <8>;
347	non-removable;
348};
349