1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada 8040 Development board platform
45 */
46
47#include <dt-bindings/gpio/gpio.h>
48#include "armada-8040.dtsi"
49
50/ {
51	model = "Marvell Armada 8040 DB board";
52	compatible = "marvell,armada8040-db", "marvell,armada8040",
53		     "marvell,armada-ap806-quad", "marvell,armada-ap806";
54
55	chosen {
56		stdout-path = "serial0:115200n8";
57	};
58
59	memory@00000000 {
60		device_type = "memory";
61		reg = <0x0 0x0 0x0 0x80000000>;
62	};
63
64	cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus {
65		compatible = "regulator-fixed";
66		regulator-name = "cpm-usb3h0-vbus";
67		regulator-min-microvolt = <5000000>;
68		regulator-max-microvolt = <5000000>;
69		enable-active-high;
70		gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
71	};
72
73	cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus {
74		compatible = "regulator-fixed";
75		regulator-name = "cpm-usb3h1-vbus";
76		regulator-min-microvolt = <5000000>;
77		regulator-max-microvolt = <5000000>;
78		enable-active-high;
79		gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
80	};
81
82	cpm_usb3_0_phy: cpm-usb3-0-phy {
83		compatible = "usb-nop-xceiv";
84		vcc-supply = <&cpm_reg_usb3_0_vbus>;
85	};
86
87	cpm_usb3_1_phy: cpm-usb3-1-phy {
88		compatible = "usb-nop-xceiv";
89		vcc-supply = <&cpm_reg_usb3_1_vbus>;
90	};
91
92	cps_reg_usb3_0_vbus: cps-usb3-0-vbus {
93		compatible = "regulator-fixed";
94		regulator-name = "cps-usb3h0-vbus";
95		regulator-min-microvolt = <5000000>;
96		regulator-max-microvolt = <5000000>;
97		enable-active-high;
98		gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
99	};
100
101	cps_usb3_0_phy: cps-usb3-0-phy {
102		compatible = "usb-nop-xceiv";
103		vcc-supply = <&cps_reg_usb3_0_vbus>;
104	};
105};
106
107&i2c0 {
108	status = "okay";
109	clock-frequency = <100000>;
110};
111
112&spi0 {
113	status = "okay";
114
115	spi-flash@0 {
116		#address-cells = <1>;
117		#size-cells = <1>;
118		compatible = "jedec,spi-nor";
119		reg = <0>;
120		spi-max-frequency = <10000000>;
121
122		partitions {
123			compatible = "fixed-partitions";
124			#address-cells = <1>;
125			#size-cells = <1>;
126
127			partition@0 {
128				label = "U-Boot";
129				reg = <0 0x200000>;
130			};
131			partition@400000 {
132				label = "Filesystem";
133				reg = <0x200000 0xce0000>;
134			};
135		};
136	};
137};
138
139/* Accessible over the mini-USB CON9 connector on the main board */
140&uart0 {
141	status = "okay";
142	pinctrl-0 = <&uart0_pins>;
143	pinctrl-names = "default";
144};
145
146
147/* CON5 on CP0 expansion */
148&cpm_pcie2 {
149	status = "okay";
150};
151
152&cpm_i2c0 {
153	status = "okay";
154	clock-frequency = <100000>;
155
156	/* U31 */
157	expander0: pca9555@21 {
158		compatible = "nxp,pca9555";
159		pinctrl-names = "default";
160		gpio-controller;
161		#gpio-cells = <2>;
162		reg = <0x21>;
163	};
164
165	/* U25 */
166	expander1: pca9555@25 {
167		compatible = "nxp,pca9555";
168		pinctrl-names = "default";
169		gpio-controller;
170		#gpio-cells = <2>;
171		reg = <0x25>;
172	};
173
174};
175
176/* CON4 on CP0 expansion */
177&cpm_sata0 {
178	status = "okay";
179};
180
181/* CON9 on CP0 expansion */
182&cpm_usb3_0 {
183	usb-phy = <&cpm_usb3_0_phy>;
184	status = "okay";
185};
186
187/* CON10 on CP0 expansion */
188&cpm_usb3_1 {
189	usb-phy = <&cpm_usb3_1_phy>;
190	status = "okay";
191};
192
193&cpm_mdio {
194	status = "okay";
195
196	phy1: ethernet-phy@1 {
197		reg = <1>;
198	};
199};
200
201&cpm_ethernet {
202	status = "okay";
203};
204
205&cpm_eth0 {
206	status = "okay";
207	phy-mode = "10gbase-kr";
208};
209
210&cpm_eth2 {
211	status = "okay";
212	phy = <&phy1>;
213	phy-mode = "rgmii-id";
214};
215
216/* CON5 on CP1 expansion */
217&cps_pcie2 {
218	status = "okay";
219};
220
221&cps_i2c0 {
222	status = "okay";
223	clock-frequency = <100000>;
224};
225
226/* CON4 on CP1 expansion */
227&cps_sata0 {
228	status = "okay";
229};
230
231/* CON9 on CP1 expansion */
232&cps_usb3_0 {
233	usb-phy = <&cps_usb3_0_phy>;
234	status = "okay";
235};
236
237/* CON10 on CP1 expansion */
238&cps_usb3_1 {
239	status = "okay";
240};
241
242&cps_mdio {
243	status = "okay";
244
245	phy0: ethernet-phy@0 {
246		reg = <0>;
247	};
248};
249
250&cps_ethernet {
251	status = "okay";
252};
253
254&cps_eth0 {
255	status = "okay";
256	phy-mode = "10gbase-kr";
257};
258
259&cps_eth1 {
260	status = "okay";
261	phy = <&phy0>;
262	phy-mode = "rgmii-id";
263};
264
265&ap_sdhci0 {
266	status = "okay";
267	bus-width = <4>;
268	non-removable;
269};
270
271&cpm_sdhci0 {
272	status = "okay";
273	bus-width = <8>;
274	non-removable;
275};
276