1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board
4 * Copyright (C) 2016 Marvell
5 *
6 * Romain Perier <romain.perier@free-electrons.com>
7 *
8 */
9
10#include <dt-bindings/gpio/gpio.h>
11#include "armada-372x.dtsi"
12
13/ {
14	aliases {
15		ethernet0 = &eth0;
16		/* for dsa slave device */
17		ethernet1 = &switch0port1;
18		ethernet2 = &switch0port2;
19		ethernet3 = &switch0port3;
20	};
21
22	chosen {
23		stdout-path = "serial0:115200n8";
24	};
25
26	memory@0 {
27		device_type = "memory";
28		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
29	};
30
31	vcc_sd_reg1: regulator {
32		compatible = "regulator-gpio";
33		regulator-name = "vcc_sd1";
34		regulator-min-microvolt = <1800000>;
35		regulator-max-microvolt = <3300000>;
36		regulator-boot-on;
37
38		gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
39		gpios-states = <0>;
40		states = <1800000 0x1
41			  3300000 0x0>;
42		enable-active-high;
43	};
44
45	led2: gpio-led2 {
46		/* led2 is working only on v7 board */
47		status = "disabled";
48
49		compatible = "gpio-leds";
50
51		led2 {
52			label = "led2";
53			gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;
54			default-state = "off";
55		};
56	};
57};
58
59/* J9 */
60&pcie0 {
61	status = "okay";
62	pinctrl-names = "default";
63	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
64	reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
65};
66
67/* J6 */
68&sata {
69	status = "okay";
70	phys = <&comphy2 0>;
71	phy-names = "sata-phy";
72};
73
74/* U11 */
75&sdhci0 {
76	/* Main DTS file for Espressobin is without eMMC */
77	status = "disabled";
78
79	non-removable;
80	bus-width = <8>;
81	mmc-ddr-1_8v;
82	mmc-hs400-1_8v;
83	marvell,xenon-emmc;
84	marvell,xenon-tun-count = <9>;
85	marvell,pad-type = "fixed-1-8v";
86
87	pinctrl-names = "default";
88	pinctrl-0 = <&mmc_pins>;
89
90	#address-cells = <1>;
91	#size-cells = <0>;
92	mmccard: mmccard@0 {
93		compatible = "mmc-card";
94		reg = <0>;
95	};
96};
97
98/* J1 */
99&sdhci1 {
100	wp-inverted;
101	bus-width = <4>;
102	cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
103	marvell,pad-type = "sd";
104	vqmmc-supply = <&vcc_sd_reg1>;
105
106	pinctrl-names = "default";
107	pinctrl-0 = <&sdio_pins>;
108	status = "okay";
109};
110
111&spi0 {
112	status = "okay";
113
114	flash@0 {
115		reg = <0>;
116		compatible = "jedec,spi-nor";
117		spi-max-frequency = <104000000>;
118		m25p,fast-read;
119	};
120};
121
122/* Exported on the micro USB connector J5 through an FTDI */
123&uart0 {
124	pinctrl-names = "default";
125	pinctrl-0 = <&uart1_pins>;
126	status = "okay";
127};
128
129/*
130 * Connector J17 and J18 expose a number of different features. Some pins are
131 * multiplexed. This is the case for instance for the following features:
132 * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
133 *   how to enable it. Beware that the signals are 1.8V TTL.
134 * - I2C
135 * - SPI
136 * - MMC
137 */
138
139/* J7 */
140&usb3 {
141	status = "okay";
142};
143
144/* J8 */
145&usb2 {
146	status = "okay";
147};
148
149&mdio {
150	switch0: switch0@1 {
151		compatible = "marvell,mv88e6085";
152		#address-cells = <1>;
153		#size-cells = <0>;
154		reg = <1>;
155
156		dsa,member = <0 0>;
157
158		ports {
159			#address-cells = <1>;
160			#size-cells = <0>;
161
162			switch0port0: port@0 {
163				reg = <0>;
164				label = "cpu";
165				ethernet = <&eth0>;
166				phy-mode = "rgmii-id";
167				fixed-link {
168					speed = <1000>;
169					full-duplex;
170				};
171			};
172
173			switch0port1: port@1 {
174				reg = <1>;
175				label = "wan";
176				phy-handle = <&switch0phy0>;
177			};
178
179			switch0port2: port@2 {
180				reg = <2>;
181				label = "lan0";
182				phy-handle = <&switch0phy1>;
183			};
184
185			switch0port3: port@3 {
186				reg = <3>;
187				label = "lan1";
188				phy-handle = <&switch0phy2>;
189			};
190
191		};
192
193		mdio {
194			#address-cells = <1>;
195			#size-cells = <0>;
196
197			switch0phy0: switch0phy0@11 {
198				reg = <0x11>;
199			};
200			switch0phy1: switch0phy1@12 {
201				reg = <0x12>;
202			};
203			switch0phy2: switch0phy2@13 {
204				reg = <0x13>;
205			};
206		};
207	};
208};
209
210&eth0 {
211	pinctrl-names = "default";
212	pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
213	phy-mode = "rgmii-id";
214	status = "okay";
215
216	fixed-link {
217		speed = <1000>;
218		full-duplex;
219	};
220};
221