1// SPDX-License-Identifier:     GPL-2.0
2/*
3 * Copyright (C) 2019, Intel Corporation
4 */
5#include "socfpga_agilex.dtsi"
6
7/ {
8	model = "SoCFPGA Agilex SoCDK";
9
10	aliases {
11		serial0 = &uart0;
12		ethernet0 = &gmac0;
13		ethernet1 = &gmac1;
14		ethernet2 = &gmac2;
15	};
16
17	chosen {
18		stdout-path = "serial0:115200n8";
19	};
20
21	leds {
22		compatible = "gpio-leds";
23		hps0 {
24			label = "hps_led0";
25			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
26		};
27
28		hps1 {
29			label = "hps_led1";
30			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
31		};
32
33		hps2 {
34			label = "hps_led2";
35			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
36		};
37	};
38
39	memory {
40		device_type = "memory";
41		/* We expect the bootloader to fill in the reg */
42		reg = <0 0 0 0>;
43	};
44
45	soc {
46		clocks {
47			osc1 {
48				clock-frequency = <25000000>;
49			};
50		};
51	};
52};
53
54&gpio1 {
55	status = "okay";
56};
57
58&gmac0 {
59	status = "okay";
60	phy-mode = "rgmii";
61	phy-handle = <&phy0>;
62
63	max-frame-size = <9000>;
64
65	mdio0 {
66		#address-cells = <1>;
67		#size-cells = <0>;
68		compatible = "snps,dwmac-mdio";
69		phy0: ethernet-phy@0 {
70			reg = <4>;
71
72			txd0-skew-ps = <0>; /* -420ps */
73			txd1-skew-ps = <0>; /* -420ps */
74			txd2-skew-ps = <0>; /* -420ps */
75			txd3-skew-ps = <0>; /* -420ps */
76			rxd0-skew-ps = <420>; /* 0ps */
77			rxd1-skew-ps = <420>; /* 0ps */
78			rxd2-skew-ps = <420>; /* 0ps */
79			rxd3-skew-ps = <420>; /* 0ps */
80			txen-skew-ps = <0>; /* -420ps */
81			txc-skew-ps = <900>; /* 0ps */
82			rxdv-skew-ps = <420>; /* 0ps */
83			rxc-skew-ps = <1680>; /* 780ps */
84		};
85	};
86};
87
88&mmc {
89	status = "okay";
90	cap-sd-highspeed;
91	broken-cd;
92	bus-width = <4>;
93};
94
95&uart0 {
96	status = "okay";
97};
98
99&usb0 {
100	status = "okay";
101	disable-over-current;
102};
103
104&watchdog0 {
105	status = "okay";
106};
107
108&qspi {
109	status = "okay";
110	flash@0 {
111		#address-cells = <1>;
112		#size-cells = <1>;
113		compatible = "micron,mt25qu02g", "jedec,spi-nor";
114		reg = <0>;
115		spi-max-frequency = <100000000>;
116
117		m25p,fast-read;
118		cdns,page-size = <256>;
119		cdns,block-size = <16>;
120		cdns,read-delay = <1>;
121		cdns,tshsl-ns = <50>;
122		cdns,tsd2d-ns = <50>;
123		cdns,tchsh-ns = <4>;
124		cdns,tslch-ns = <4>;
125
126		partitions {
127			compatible = "fixed-partitions";
128			#address-cells = <1>;
129			#size-cells = <1>;
130
131			qspi_boot: partition@0 {
132				label = "Boot and fpga data";
133				reg = <0x0 0x03FE0000>;
134			};
135
136			qspi_rootfs: partition@3FE0000 {
137				label = "Root Filesystem - JFFS2";
138				reg = <0x03FE0000 0x0C020000>;
139			};
140		};
141	};
142};
143