1bb61c536SShawn Guo// SPDX-License-Identifier: GPL-2.0
2bb61c536SShawn Guo/*
3bb61c536SShawn Guo * Pinctrl dts file for HiSilicon Poplar board
4bb61c536SShawn Guo *
5bb61c536SShawn Guo * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
6bb61c536SShawn Guo */
7bb61c536SShawn Guo
8bb61c536SShawn Guo#include <dt-bindings/pinctrl/hisi.h>
9bb61c536SShawn Guo
10bb61c536SShawn Guo/* value, enable bits, disable bits, mask */
11bb61c536SShawn Guo#define PINCTRL_PULLDOWN(value, enable, disable, mask) \
12bb61c536SShawn Guo	(value << 13) (enable << 13) (disable << 13) (mask << 13)
13bb61c536SShawn Guo#define PINCTRL_PULLUP(value, enable, disable, mask) \
14bb61c536SShawn Guo	(value << 12) (enable << 12) (disable << 12) (mask << 12)
15bb61c536SShawn Guo#define PINCTRL_SLEW_RATE(value, mask)	  (value << 8) (mask << 8)
16bb61c536SShawn Guo#define PINCTRL_DRV_STRENGTH(value, mask) (value << 4) (mask << 4)
17bb61c536SShawn Guo
18bb61c536SShawn Guo&pmx0 {
19bb61c536SShawn Guo	emmc_pins_1: emmc-pins-1 {
20bb61c536SShawn Guo		pinctrl-single,pins = <
21bb61c536SShawn Guo			0x000 MUX_M2
22bb61c536SShawn Guo			0x004 MUX_M2
23bb61c536SShawn Guo			0x008 MUX_M2
24bb61c536SShawn Guo			0x00c MUX_M2
25bb61c536SShawn Guo			0x010 MUX_M2
26bb61c536SShawn Guo			0x014 MUX_M2
27bb61c536SShawn Guo			0x018 MUX_M2
28bb61c536SShawn Guo			0x01c MUX_M2
29bb61c536SShawn Guo			0x024 MUX_M2
30bb61c536SShawn Guo		>;
31bb61c536SShawn Guo		pinctrl-single,bias-pulldown = <
32bb61c536SShawn Guo			PINCTRL_PULLDOWN(0, 1, 0, 1)
33bb61c536SShawn Guo		>;
34bb61c536SShawn Guo		pinctrl-single,bias-pullup = <
35bb61c536SShawn Guo			PINCTRL_PULLUP(0, 1, 0, 1)
36bb61c536SShawn Guo		>;
37bb61c536SShawn Guo		pinctrl-single,slew-rate = <
38bb61c536SShawn Guo			PINCTRL_SLEW_RATE(1, 1)
39bb61c536SShawn Guo		>;
40bb61c536SShawn Guo		pinctrl-single,drive-strength = <
41bb61c536SShawn Guo			PINCTRL_DRV_STRENGTH(0xb, 0xf)
42bb61c536SShawn Guo		>;
43bb61c536SShawn Guo	};
44bb61c536SShawn Guo
45bb61c536SShawn Guo	emmc_pins_2: emmc-pins-2 {
46bb61c536SShawn Guo		pinctrl-single,pins = <
47bb61c536SShawn Guo			0x028 MUX_M2
48bb61c536SShawn Guo		>;
49bb61c536SShawn Guo		pinctrl-single,bias-pulldown = <
50bb61c536SShawn Guo			PINCTRL_PULLDOWN(0, 1, 0, 1)
51bb61c536SShawn Guo		>;
52bb61c536SShawn Guo		pinctrl-single,bias-pullup = <
53bb61c536SShawn Guo			PINCTRL_PULLUP(0, 1, 0, 1)
54bb61c536SShawn Guo		>;
55bb61c536SShawn Guo		pinctrl-single,slew-rate = <
56bb61c536SShawn Guo			PINCTRL_SLEW_RATE(1, 1)
57bb61c536SShawn Guo		>;
58bb61c536SShawn Guo		pinctrl-single,drive-strength = <
59bb61c536SShawn Guo			PINCTRL_DRV_STRENGTH(0x9, 0xf)
60bb61c536SShawn Guo		>;
61bb61c536SShawn Guo	};
62bb61c536SShawn Guo
63bb61c536SShawn Guo	emmc_pins_3: emmc-pins-3 {
64bb61c536SShawn Guo		pinctrl-single,pins = <
65bb61c536SShawn Guo			0x02c MUX_M2
66bb61c536SShawn Guo		>;
67bb61c536SShawn Guo		pinctrl-single,bias-pulldown = <
68bb61c536SShawn Guo			PINCTRL_PULLDOWN(0, 1, 0, 1)
69bb61c536SShawn Guo		>;
70bb61c536SShawn Guo		pinctrl-single,bias-pullup = <
71bb61c536SShawn Guo			PINCTRL_PULLUP(0, 1, 0, 1)
72bb61c536SShawn Guo		>;
73bb61c536SShawn Guo		pinctrl-single,slew-rate = <
74bb61c536SShawn Guo			PINCTRL_SLEW_RATE(1, 1)
75bb61c536SShawn Guo		>;
76bb61c536SShawn Guo		pinctrl-single,drive-strength = <
77bb61c536SShawn Guo			PINCTRL_DRV_STRENGTH(3, 3)
78bb61c536SShawn Guo		>;
79bb61c536SShawn Guo	};
80bb61c536SShawn Guo
81bb61c536SShawn Guo	emmc_pins_4: emmc-pins-4 {
82bb61c536SShawn Guo		pinctrl-single,pins = <
83bb61c536SShawn Guo			0x030 MUX_M2
84bb61c536SShawn Guo		>;
85bb61c536SShawn Guo		pinctrl-single,bias-pulldown = <
86bb61c536SShawn Guo			PINCTRL_PULLDOWN(1, 1, 0, 1)
87bb61c536SShawn Guo		>;
88bb61c536SShawn Guo		pinctrl-single,bias-pullup = <
89bb61c536SShawn Guo			PINCTRL_PULLUP(0, 1, 0, 1)
90bb61c536SShawn Guo		>;
91bb61c536SShawn Guo		pinctrl-single,slew-rate = <
92bb61c536SShawn Guo			PINCTRL_SLEW_RATE(1, 1)
93bb61c536SShawn Guo		>;
94bb61c536SShawn Guo		pinctrl-single,drive-strength = <
95bb61c536SShawn Guo			PINCTRL_DRV_STRENGTH(3, 3)
96bb61c536SShawn Guo		>;
97bb61c536SShawn Guo	};
98bb61c536SShawn Guo};
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