1/**
2 * dts file for Hisilicon D05 Development Board
3 *
4 * Copyright (C) 2016 Hisilicon Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14/ {
15	compatible = "hisilicon,hip07-d05";
16	interrupt-parent = <&gic>;
17	#address-cells = <2>;
18	#size-cells = <2>;
19
20	psci {
21		compatible = "arm,psci-0.2";
22		method = "smc";
23	};
24
25	cpus {
26		#address-cells = <1>;
27		#size-cells = <0>;
28
29		cpu-map {
30			cluster0 {
31				core0 {
32					cpu = <&cpu0>;
33				};
34				core1 {
35					cpu = <&cpu1>;
36				};
37				core2 {
38					cpu = <&cpu2>;
39				};
40				core3 {
41					cpu = <&cpu3>;
42				};
43			};
44
45			cluster1 {
46				core0 {
47					cpu = <&cpu4>;
48				};
49				core1 {
50					cpu = <&cpu5>;
51				};
52				core2 {
53					cpu = <&cpu6>;
54				};
55				core3 {
56					cpu = <&cpu7>;
57				};
58			};
59
60			cluster2 {
61				core0 {
62					cpu = <&cpu8>;
63				};
64				core1 {
65					cpu = <&cpu9>;
66				};
67				core2 {
68					cpu = <&cpu10>;
69				};
70				core3 {
71					cpu = <&cpu11>;
72				};
73			};
74
75			cluster3 {
76				core0 {
77					cpu = <&cpu12>;
78				};
79				core1 {
80					cpu = <&cpu13>;
81				};
82				core2 {
83					cpu = <&cpu14>;
84				};
85				core3 {
86					cpu = <&cpu15>;
87				};
88			};
89
90			cluster4 {
91				core0 {
92					cpu = <&cpu16>;
93				};
94				core1 {
95					cpu = <&cpu17>;
96				};
97				core2 {
98					cpu = <&cpu18>;
99				};
100				core3 {
101					cpu = <&cpu19>;
102				};
103			};
104
105			cluster5 {
106				core0 {
107					cpu = <&cpu20>;
108				};
109				core1 {
110					cpu = <&cpu21>;
111				};
112				core2 {
113					cpu = <&cpu22>;
114				};
115				core3 {
116					cpu = <&cpu23>;
117				};
118			};
119
120			cluster6 {
121				core0 {
122					cpu = <&cpu24>;
123				};
124				core1 {
125					cpu = <&cpu25>;
126				};
127				core2 {
128					cpu = <&cpu26>;
129				};
130				core3 {
131					cpu = <&cpu27>;
132				};
133			};
134
135			cluster7 {
136				core0 {
137					cpu = <&cpu28>;
138				};
139				core1 {
140					cpu = <&cpu29>;
141				};
142				core2 {
143					cpu = <&cpu30>;
144				};
145				core3 {
146					cpu = <&cpu31>;
147				};
148			};
149
150			cluster8 {
151				core0 {
152					cpu = <&cpu32>;
153				};
154				core1 {
155					cpu = <&cpu33>;
156				};
157				core2 {
158					cpu = <&cpu34>;
159				};
160				core3 {
161					cpu = <&cpu35>;
162				};
163			};
164
165			cluster9 {
166				core0 {
167					cpu = <&cpu36>;
168				};
169				core1 {
170					cpu = <&cpu37>;
171				};
172				core2 {
173					cpu = <&cpu38>;
174				};
175				core3 {
176					cpu = <&cpu39>;
177				};
178			};
179
180			cluster10 {
181				core0 {
182					cpu = <&cpu40>;
183				};
184				core1 {
185					cpu = <&cpu41>;
186				};
187				core2 {
188					cpu = <&cpu42>;
189				};
190				core3 {
191					cpu = <&cpu43>;
192				};
193			};
194
195			cluster11 {
196				core0 {
197					cpu = <&cpu44>;
198				};
199				core1 {
200					cpu = <&cpu45>;
201				};
202				core2 {
203					cpu = <&cpu46>;
204				};
205				core3 {
206					cpu = <&cpu47>;
207				};
208			};
209
210			cluster12 {
211				core0 {
212					cpu = <&cpu48>;
213				};
214				core1 {
215					cpu = <&cpu49>;
216				};
217				core2 {
218					cpu = <&cpu50>;
219				};
220				core3 {
221					cpu = <&cpu51>;
222				};
223			};
224
225			cluster13 {
226				core0 {
227					cpu = <&cpu52>;
228				};
229				core1 {
230					cpu = <&cpu53>;
231				};
232				core2 {
233					cpu = <&cpu54>;
234				};
235				core3 {
236					cpu = <&cpu55>;
237				};
238			};
239
240			cluster14 {
241				core0 {
242					cpu = <&cpu56>;
243				};
244				core1 {
245					cpu = <&cpu57>;
246				};
247				core2 {
248					cpu = <&cpu58>;
249				};
250				core3 {
251					cpu = <&cpu59>;
252				};
253			};
254
255			cluster15 {
256				core0 {
257					cpu = <&cpu60>;
258				};
259				core1 {
260					cpu = <&cpu61>;
261				};
262				core2 {
263					cpu = <&cpu62>;
264				};
265				core3 {
266					cpu = <&cpu63>;
267				};
268			};
269		};
270
271		cpu0: cpu@10000 {
272			device_type = "cpu";
273			compatible = "arm,cortex-a72", "arm,armv8";
274			reg = <0x10000>;
275			enable-method = "psci";
276			next-level-cache = <&cluster0_l2>;
277			numa-node-id = <0>;
278		};
279
280		cpu1: cpu@10001 {
281			device_type = "cpu";
282			compatible = "arm,cortex-a72", "arm,armv8";
283			reg = <0x10001>;
284			enable-method = "psci";
285			next-level-cache = <&cluster0_l2>;
286			numa-node-id = <0>;
287		};
288
289		cpu2: cpu@10002 {
290			device_type = "cpu";
291			compatible = "arm,cortex-a72", "arm,armv8";
292			reg = <0x10002>;
293			enable-method = "psci";
294			next-level-cache = <&cluster0_l2>;
295			numa-node-id = <0>;
296		};
297
298		cpu3: cpu@10003 {
299			device_type = "cpu";
300			compatible = "arm,cortex-a72", "arm,armv8";
301			reg = <0x10003>;
302			enable-method = "psci";
303			next-level-cache = <&cluster0_l2>;
304			numa-node-id = <0>;
305		};
306
307		cpu4: cpu@10100 {
308			device_type = "cpu";
309			compatible = "arm,cortex-a72", "arm,armv8";
310			reg = <0x10100>;
311			enable-method = "psci";
312			next-level-cache = <&cluster1_l2>;
313			numa-node-id = <0>;
314		};
315
316		cpu5: cpu@10101 {
317			device_type = "cpu";
318			compatible = "arm,cortex-a72", "arm,armv8";
319			reg = <0x10101>;
320			enable-method = "psci";
321			next-level-cache = <&cluster1_l2>;
322			numa-node-id = <0>;
323		};
324
325		cpu6: cpu@10102 {
326			device_type = "cpu";
327			compatible = "arm,cortex-a72", "arm,armv8";
328			reg = <0x10102>;
329			enable-method = "psci";
330			next-level-cache = <&cluster1_l2>;
331			numa-node-id = <0>;
332		};
333
334		cpu7: cpu@10103 {
335			device_type = "cpu";
336			compatible = "arm,cortex-a72", "arm,armv8";
337			reg = <0x10103>;
338			enable-method = "psci";
339			next-level-cache = <&cluster1_l2>;
340			numa-node-id = <0>;
341		};
342
343		cpu8: cpu@10200 {
344			device_type = "cpu";
345			compatible = "arm,cortex-a72", "arm,armv8";
346			reg = <0x10200>;
347			enable-method = "psci";
348			next-level-cache = <&cluster2_l2>;
349			numa-node-id = <0>;
350		};
351
352		cpu9: cpu@10201 {
353			device_type = "cpu";
354			compatible = "arm,cortex-a72", "arm,armv8";
355			reg = <0x10201>;
356			enable-method = "psci";
357			next-level-cache = <&cluster2_l2>;
358			numa-node-id = <0>;
359		};
360
361		cpu10: cpu@10202 {
362			device_type = "cpu";
363			compatible = "arm,cortex-a72", "arm,armv8";
364			reg = <0x10202>;
365			enable-method = "psci";
366			next-level-cache = <&cluster2_l2>;
367			numa-node-id = <0>;
368		};
369
370		cpu11: cpu@10203 {
371			device_type = "cpu";
372			compatible = "arm,cortex-a72", "arm,armv8";
373			reg = <0x10203>;
374			enable-method = "psci";
375			next-level-cache = <&cluster2_l2>;
376			numa-node-id = <0>;
377		};
378
379		cpu12: cpu@10300 {
380			device_type = "cpu";
381			compatible = "arm,cortex-a72", "arm,armv8";
382			reg = <0x10300>;
383			enable-method = "psci";
384			next-level-cache = <&cluster3_l2>;
385			numa-node-id = <0>;
386		};
387
388		cpu13: cpu@10301 {
389			device_type = "cpu";
390			compatible = "arm,cortex-a72", "arm,armv8";
391			reg = <0x10301>;
392			enable-method = "psci";
393			next-level-cache = <&cluster3_l2>;
394			numa-node-id = <0>;
395		};
396
397		cpu14: cpu@10302 {
398			device_type = "cpu";
399			compatible = "arm,cortex-a72", "arm,armv8";
400			reg = <0x10302>;
401			enable-method = "psci";
402			next-level-cache = <&cluster3_l2>;
403			numa-node-id = <0>;
404		};
405
406		cpu15: cpu@10303 {
407			device_type = "cpu";
408			compatible = "arm,cortex-a72", "arm,armv8";
409			reg = <0x10303>;
410			enable-method = "psci";
411			next-level-cache = <&cluster3_l2>;
412			numa-node-id = <0>;
413		};
414
415		cpu16: cpu@30000 {
416			device_type = "cpu";
417			compatible = "arm,cortex-a72", "arm,armv8";
418			reg = <0x30000>;
419			enable-method = "psci";
420			next-level-cache = <&cluster4_l2>;
421			numa-node-id = <1>;
422		};
423
424		cpu17: cpu@30001 {
425			device_type = "cpu";
426			compatible = "arm,cortex-a72", "arm,armv8";
427			reg = <0x30001>;
428			enable-method = "psci";
429			next-level-cache = <&cluster4_l2>;
430			numa-node-id = <1>;
431		};
432
433		cpu18: cpu@30002 {
434			device_type = "cpu";
435			compatible = "arm,cortex-a72", "arm,armv8";
436			reg = <0x30002>;
437			enable-method = "psci";
438			next-level-cache = <&cluster4_l2>;
439			numa-node-id = <1>;
440		};
441
442		cpu19: cpu@30003 {
443			device_type = "cpu";
444			compatible = "arm,cortex-a72", "arm,armv8";
445			reg = <0x30003>;
446			enable-method = "psci";
447			next-level-cache = <&cluster4_l2>;
448			numa-node-id = <1>;
449		};
450
451		cpu20: cpu@30100 {
452			device_type = "cpu";
453			compatible = "arm,cortex-a72", "arm,armv8";
454			reg = <0x30100>;
455			enable-method = "psci";
456			next-level-cache = <&cluster5_l2>;
457			numa-node-id = <1>;
458		};
459
460		cpu21: cpu@30101 {
461			device_type = "cpu";
462			compatible = "arm,cortex-a72", "arm,armv8";
463			reg = <0x30101>;
464			enable-method = "psci";
465			next-level-cache = <&cluster5_l2>;
466			numa-node-id = <1>;
467		};
468
469		cpu22: cpu@30102 {
470			device_type = "cpu";
471			compatible = "arm,cortex-a72", "arm,armv8";
472			reg = <0x30102>;
473			enable-method = "psci";
474			next-level-cache = <&cluster5_l2>;
475			numa-node-id = <1>;
476		};
477
478		cpu23: cpu@30103 {
479			device_type = "cpu";
480			compatible = "arm,cortex-a72", "arm,armv8";
481			reg = <0x30103>;
482			enable-method = "psci";
483			next-level-cache = <&cluster5_l2>;
484			numa-node-id = <1>;
485		};
486
487		cpu24: cpu@30200 {
488			device_type = "cpu";
489			compatible = "arm,cortex-a72", "arm,armv8";
490			reg = <0x30200>;
491			enable-method = "psci";
492			next-level-cache = <&cluster6_l2>;
493			numa-node-id = <1>;
494		};
495
496		cpu25: cpu@30201 {
497			device_type = "cpu";
498			compatible = "arm,cortex-a72", "arm,armv8";
499			reg = <0x30201>;
500			enable-method = "psci";
501			next-level-cache = <&cluster6_l2>;
502			numa-node-id = <1>;
503		};
504
505		cpu26: cpu@30202 {
506			device_type = "cpu";
507			compatible = "arm,cortex-a72", "arm,armv8";
508			reg = <0x30202>;
509			enable-method = "psci";
510			next-level-cache = <&cluster6_l2>;
511			numa-node-id = <1>;
512		};
513
514		cpu27: cpu@30203 {
515			device_type = "cpu";
516			compatible = "arm,cortex-a72", "arm,armv8";
517			reg = <0x30203>;
518			enable-method = "psci";
519			next-level-cache = <&cluster6_l2>;
520			numa-node-id = <1>;
521		};
522
523		cpu28: cpu@30300 {
524			device_type = "cpu";
525			compatible = "arm,cortex-a72", "arm,armv8";
526			reg = <0x30300>;
527			enable-method = "psci";
528			next-level-cache = <&cluster7_l2>;
529			numa-node-id = <1>;
530		};
531
532		cpu29: cpu@30301 {
533			device_type = "cpu";
534			compatible = "arm,cortex-a72", "arm,armv8";
535			reg = <0x30301>;
536			enable-method = "psci";
537			next-level-cache = <&cluster7_l2>;
538			numa-node-id = <1>;
539		};
540
541		cpu30: cpu@30302 {
542			device_type = "cpu";
543			compatible = "arm,cortex-a72", "arm,armv8";
544			reg = <0x30302>;
545			enable-method = "psci";
546			next-level-cache = <&cluster7_l2>;
547			numa-node-id = <1>;
548		};
549
550		cpu31: cpu@30303 {
551			device_type = "cpu";
552			compatible = "arm,cortex-a72", "arm,armv8";
553			reg = <0x30303>;
554			enable-method = "psci";
555			next-level-cache = <&cluster7_l2>;
556			numa-node-id = <1>;
557		};
558
559		cpu32: cpu@50000 {
560			device_type = "cpu";
561			compatible = "arm,cortex-a72", "arm,armv8";
562			reg = <0x50000>;
563			enable-method = "psci";
564			next-level-cache = <&cluster8_l2>;
565			numa-node-id = <2>;
566		};
567
568		cpu33: cpu@50001 {
569			device_type = "cpu";
570			compatible = "arm,cortex-a72", "arm,armv8";
571			reg = <0x50001>;
572			enable-method = "psci";
573			next-level-cache = <&cluster8_l2>;
574			numa-node-id = <2>;
575		};
576
577		cpu34: cpu@50002 {
578			device_type = "cpu";
579			compatible = "arm,cortex-a72", "arm,armv8";
580			reg = <0x50002>;
581			enable-method = "psci";
582			next-level-cache = <&cluster8_l2>;
583			numa-node-id = <2>;
584		};
585
586		cpu35: cpu@50003 {
587			device_type = "cpu";
588			compatible = "arm,cortex-a72", "arm,armv8";
589			reg = <0x50003>;
590			enable-method = "psci";
591			next-level-cache = <&cluster8_l2>;
592			numa-node-id = <2>;
593		};
594
595		cpu36: cpu@50100 {
596			device_type = "cpu";
597			compatible = "arm,cortex-a72", "arm,armv8";
598			reg = <0x50100>;
599			enable-method = "psci";
600			next-level-cache = <&cluster9_l2>;
601			numa-node-id = <2>;
602		};
603
604		cpu37: cpu@50101 {
605			device_type = "cpu";
606			compatible = "arm,cortex-a72", "arm,armv8";
607			reg = <0x50101>;
608			enable-method = "psci";
609			next-level-cache = <&cluster9_l2>;
610			numa-node-id = <2>;
611		};
612
613		cpu38: cpu@50102 {
614			device_type = "cpu";
615			compatible = "arm,cortex-a72", "arm,armv8";
616			reg = <0x50102>;
617			enable-method = "psci";
618			next-level-cache = <&cluster9_l2>;
619			numa-node-id = <2>;
620		};
621
622		cpu39: cpu@50103 {
623			device_type = "cpu";
624			compatible = "arm,cortex-a72", "arm,armv8";
625			reg = <0x50103>;
626			enable-method = "psci";
627			next-level-cache = <&cluster9_l2>;
628			numa-node-id = <2>;
629		};
630
631		cpu40: cpu@50200 {
632			device_type = "cpu";
633			compatible = "arm,cortex-a72", "arm,armv8";
634			reg = <0x50200>;
635			enable-method = "psci";
636			next-level-cache = <&cluster10_l2>;
637			numa-node-id = <2>;
638		};
639
640		cpu41: cpu@50201 {
641			device_type = "cpu";
642			compatible = "arm,cortex-a72", "arm,armv8";
643			reg = <0x50201>;
644			enable-method = "psci";
645			next-level-cache = <&cluster10_l2>;
646			numa-node-id = <2>;
647		};
648
649		cpu42: cpu@50202 {
650			device_type = "cpu";
651			compatible = "arm,cortex-a72", "arm,armv8";
652			reg = <0x50202>;
653			enable-method = "psci";
654			next-level-cache = <&cluster10_l2>;
655			numa-node-id = <2>;
656		};
657
658		cpu43: cpu@50203 {
659			device_type = "cpu";
660			compatible = "arm,cortex-a72", "arm,armv8";
661			reg = <0x50203>;
662			enable-method = "psci";
663			next-level-cache = <&cluster10_l2>;
664			numa-node-id = <2>;
665		};
666
667		cpu44: cpu@50300 {
668			device_type = "cpu";
669			compatible = "arm,cortex-a72", "arm,armv8";
670			reg = <0x50300>;
671			enable-method = "psci";
672			next-level-cache = <&cluster11_l2>;
673			numa-node-id = <2>;
674		};
675
676		cpu45: cpu@50301 {
677			device_type = "cpu";
678			compatible = "arm,cortex-a72", "arm,armv8";
679			reg = <0x50301>;
680			enable-method = "psci";
681			next-level-cache = <&cluster11_l2>;
682			numa-node-id = <2>;
683		};
684
685		cpu46: cpu@50302 {
686			device_type = "cpu";
687			compatible = "arm,cortex-a72", "arm,armv8";
688			reg = <0x50302>;
689			enable-method = "psci";
690			next-level-cache = <&cluster11_l2>;
691			numa-node-id = <2>;
692		};
693
694		cpu47: cpu@50303 {
695			device_type = "cpu";
696			compatible = "arm,cortex-a72", "arm,armv8";
697			reg = <0x50303>;
698			enable-method = "psci";
699			next-level-cache = <&cluster11_l2>;
700			numa-node-id = <2>;
701		};
702
703		cpu48: cpu@70000 {
704			device_type = "cpu";
705			compatible = "arm,cortex-a72", "arm,armv8";
706			reg = <0x70000>;
707			enable-method = "psci";
708			next-level-cache = <&cluster12_l2>;
709			numa-node-id = <3>;
710		};
711
712		cpu49: cpu@70001 {
713			device_type = "cpu";
714			compatible = "arm,cortex-a72", "arm,armv8";
715			reg = <0x70001>;
716			enable-method = "psci";
717			next-level-cache = <&cluster12_l2>;
718			numa-node-id = <3>;
719		};
720
721		cpu50: cpu@70002 {
722			device_type = "cpu";
723			compatible = "arm,cortex-a72", "arm,armv8";
724			reg = <0x70002>;
725			enable-method = "psci";
726			next-level-cache = <&cluster12_l2>;
727			numa-node-id = <3>;
728		};
729
730		cpu51: cpu@70003 {
731			device_type = "cpu";
732			compatible = "arm,cortex-a72", "arm,armv8";
733			reg = <0x70003>;
734			enable-method = "psci";
735			next-level-cache = <&cluster12_l2>;
736			numa-node-id = <3>;
737		};
738
739		cpu52: cpu@70100 {
740			device_type = "cpu";
741			compatible = "arm,cortex-a72", "arm,armv8";
742			reg = <0x70100>;
743			enable-method = "psci";
744			next-level-cache = <&cluster13_l2>;
745			numa-node-id = <3>;
746		};
747
748		cpu53: cpu@70101 {
749			device_type = "cpu";
750			compatible = "arm,cortex-a72", "arm,armv8";
751			reg = <0x70101>;
752			enable-method = "psci";
753			next-level-cache = <&cluster13_l2>;
754			numa-node-id = <3>;
755		};
756
757		cpu54: cpu@70102 {
758			device_type = "cpu";
759			compatible = "arm,cortex-a72", "arm,armv8";
760			reg = <0x70102>;
761			enable-method = "psci";
762			next-level-cache = <&cluster13_l2>;
763			numa-node-id = <3>;
764		};
765
766		cpu55: cpu@70103 {
767			device_type = "cpu";
768			compatible = "arm,cortex-a72", "arm,armv8";
769			reg = <0x70103>;
770			enable-method = "psci";
771			next-level-cache = <&cluster13_l2>;
772			numa-node-id = <3>;
773		};
774
775		cpu56: cpu@70200 {
776			device_type = "cpu";
777			compatible = "arm,cortex-a72", "arm,armv8";
778			reg = <0x70200>;
779			enable-method = "psci";
780			next-level-cache = <&cluster14_l2>;
781			numa-node-id = <3>;
782		};
783
784		cpu57: cpu@70201 {
785			device_type = "cpu";
786			compatible = "arm,cortex-a72", "arm,armv8";
787			reg = <0x70201>;
788			enable-method = "psci";
789			next-level-cache = <&cluster14_l2>;
790			numa-node-id = <3>;
791		};
792
793		cpu58: cpu@70202 {
794			device_type = "cpu";
795			compatible = "arm,cortex-a72", "arm,armv8";
796			reg = <0x70202>;
797			enable-method = "psci";
798			next-level-cache = <&cluster14_l2>;
799			numa-node-id = <3>;
800		};
801
802		cpu59: cpu@70203 {
803			device_type = "cpu";
804			compatible = "arm,cortex-a72", "arm,armv8";
805			reg = <0x70203>;
806			enable-method = "psci";
807			next-level-cache = <&cluster14_l2>;
808			numa-node-id = <3>;
809		};
810
811		cpu60: cpu@70300 {
812			device_type = "cpu";
813			compatible = "arm,cortex-a72", "arm,armv8";
814			reg = <0x70300>;
815			enable-method = "psci";
816			next-level-cache = <&cluster15_l2>;
817			numa-node-id = <3>;
818		};
819
820		cpu61: cpu@70301 {
821			device_type = "cpu";
822			compatible = "arm,cortex-a72", "arm,armv8";
823			reg = <0x70301>;
824			enable-method = "psci";
825			next-level-cache = <&cluster15_l2>;
826			numa-node-id = <3>;
827		};
828
829		cpu62: cpu@70302 {
830			device_type = "cpu";
831			compatible = "arm,cortex-a72", "arm,armv8";
832			reg = <0x70302>;
833			enable-method = "psci";
834			next-level-cache = <&cluster15_l2>;
835			numa-node-id = <3>;
836		};
837
838		cpu63: cpu@70303 {
839			device_type = "cpu";
840			compatible = "arm,cortex-a72", "arm,armv8";
841			reg = <0x70303>;
842			enable-method = "psci";
843			next-level-cache = <&cluster15_l2>;
844			numa-node-id = <3>;
845		};
846
847		cluster0_l2: l2-cache0 {
848			compatible = "cache";
849		};
850
851		cluster1_l2: l2-cache1 {
852			compatible = "cache";
853		};
854
855		cluster2_l2: l2-cache2 {
856			compatible = "cache";
857		};
858
859		cluster3_l2: l2-cache3 {
860			compatible = "cache";
861		};
862
863		cluster4_l2: l2-cache4 {
864			compatible = "cache";
865		};
866
867		cluster5_l2: l2-cache5 {
868			compatible = "cache";
869		};
870
871		cluster6_l2: l2-cache6 {
872			compatible = "cache";
873		};
874
875		cluster7_l2: l2-cache7 {
876			compatible = "cache";
877		};
878
879		cluster8_l2: l2-cache8 {
880			compatible = "cache";
881		};
882
883		cluster9_l2: l2-cache9 {
884			compatible = "cache";
885		};
886
887		cluster10_l2: l2-cache10 {
888			compatible = "cache";
889		};
890
891		cluster11_l2: l2-cache11 {
892			compatible = "cache";
893		};
894
895		cluster12_l2: l2-cache12 {
896			compatible = "cache";
897		};
898
899		cluster13_l2: l2-cache13 {
900			compatible = "cache";
901		};
902
903		cluster14_l2: l2-cache14 {
904			compatible = "cache";
905		};
906
907		cluster15_l2: l2-cache15 {
908			compatible = "cache";
909		};
910	};
911
912	gic: interrupt-controller@4d000000 {
913		compatible = "arm,gic-v3";
914		#interrupt-cells = <3>;
915		#address-cells = <2>;
916		#size-cells = <2>;
917		ranges;
918		interrupt-controller;
919		#redistributor-regions = <4>;
920		redistributor-stride = <0x0 0x40000>;
921		reg = <0x0 0x4d000000 0x0 0x10000>,	/* GICD */
922		      <0x0 0x4d100000 0x0 0x400000>,	/* p0 GICR node 0 */
923		      <0x0 0x6d100000 0x0 0x400000>,	/* p0 GICR node 1 */
924		      <0x400 0x4d100000 0x0 0x400000>,	/* p1 GICR node 2 */
925		      <0x400 0x6d100000 0x0 0x400000>,	/* p1 GICR node 3 */
926		      <0x0 0xfe000000 0x0 0x10000>,	/* GICC */
927		      <0x0 0xfe010000 0x0 0x10000>,	/* GICH */
928		      <0x0 0xfe020000 0x0 0x10000>;	/* GICV */
929		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
930
931		p0_its_peri_a: interrupt-controller@4c000000 {
932			compatible = "arm,gic-v3-its";
933			msi-controller;
934			#msi-cells = <1>;
935			reg = <0x0 0x4c000000 0x0 0x40000>;
936		};
937
938		p0_its_peri_b: interrupt-controller@6c000000 {
939			compatible = "arm,gic-v3-its";
940			msi-controller;
941			#msi-cells = <1>;
942			reg = <0x0 0x6c000000 0x0 0x40000>;
943		};
944
945		p0_its_dsa_a: interrupt-controller@c6000000 {
946			compatible = "arm,gic-v3-its";
947			msi-controller;
948			#msi-cells = <1>;
949			reg = <0x0 0xc6000000 0x0 0x40000>;
950		};
951
952		p0_its_dsa_b: interrupt-controller@8,c6000000 {
953			compatible = "arm,gic-v3-its";
954			msi-controller;
955			#msi-cells = <1>;
956			reg = <0x8 0xc6000000 0x0 0x40000>;
957		};
958
959		p1_its_peri_a: interrupt-controller@400,4c000000 {
960			compatible = "arm,gic-v3-its";
961			msi-controller;
962			#msi-cells = <1>;
963			reg = <0x400 0x4c000000 0x0 0x40000>;
964		};
965
966		p1_its_peri_b: interrupt-controller@400,6c000000 {
967			compatible = "arm,gic-v3-its";
968			msi-controller;
969			#msi-cells = <1>;
970			reg = <0x400 0x6c000000 0x0 0x40000>;
971		};
972
973		p1_its_dsa_a: interrupt-controller@400,c6000000 {
974			compatible = "arm,gic-v3-its";
975			msi-controller;
976			#msi-cells = <1>;
977			reg = <0x400 0xc6000000 0x0 0x40000>;
978		};
979
980		p1_its_dsa_b: interrupt-controller@408,c6000000 {
981			compatible = "arm,gic-v3-its";
982			msi-controller;
983			#msi-cells = <1>;
984			reg = <0x408 0xc6000000 0x0 0x40000>;
985		};
986	};
987
988	timer {
989		compatible = "arm,armv8-timer";
990		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
991			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
992			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
993			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
994	};
995
996	pmu {
997		compatible = "arm,cortex-a72-pmu";
998		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
999	};
1000
1001	p0_mbigen_peri_b: interrupt-controller@60080000 {
1002		compatible = "hisilicon,mbigen-v2";
1003		reg = <0x0 0x60080000 0x0 0x10000>;
1004
1005		mbigen_uart: uart_intc {
1006			msi-parent = <&p0_its_peri_b 0x120c7>;
1007			interrupt-controller;
1008			#interrupt-cells = <2>;
1009			num-pins = <1>;
1010		};
1011	};
1012
1013	p0_mbigen_pcie_a: interrupt-controller@a0080000 {
1014		compatible = "hisilicon,mbigen-v2";
1015		reg = <0x0 0xa0080000 0x0 0x10000>;
1016
1017		mbigen_usb: intc_usb {
1018			msi-parent = <&p0_its_dsa_a 0x40080>;
1019			interrupt-controller;
1020			#interrupt-cells = <2>;
1021			num-pins = <2>;
1022		};
1023	};
1024
1025	soc {
1026		compatible = "simple-bus";
1027		#address-cells = <2>;
1028		#size-cells = <2>;
1029		ranges;
1030
1031		uart0: uart@602b0000 {
1032			compatible = "arm,sbsa-uart";
1033			reg = <0x0 0x602b0000 0x0 0x1000>;
1034			interrupt-parent = <&mbigen_uart>;
1035			interrupts = <807 4>;
1036			current-speed = <115200>;
1037			reg-io-width = <4>;
1038			status = "disabled";
1039		};
1040
1041		usb_ohci: ohci@a7030000 {
1042			compatible = "generic-ohci";
1043			reg = <0x0 0xa7030000 0x0 0x10000>;
1044			interrupt-parent = <&mbigen_usb>;
1045			interrupts = <640 4>;
1046			dma-coherent;
1047			status = "disabled";
1048		};
1049
1050		usb_ehci: ehci@a7020000 {
1051			compatible = "generic-ehci";
1052			reg = <0x0 0xa7020000 0x0 0x10000>;
1053			interrupt-parent = <&mbigen_usb>;
1054			interrupts = <641 4>;
1055			dma-coherent;
1056			status = "disabled";
1057		};
1058	};
1059};
1060