1/* 2 * dts file for Hisilicon HiKey Development Board 3 * 4 * Copyright (C) 2015, Hisilicon Ltd. 5 * 6 */ 7 8/dts-v1/; 9#include "hi6220.dtsi" 10#include "hikey-pinctrl.dtsi" 11#include <dt-bindings/gpio/gpio.h> 12 13/ { 14 model = "HiKey Development Board"; 15 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; 16 17 aliases { 18 serial0 = &uart0; /* On board UART0 */ 19 serial1 = &uart1; /* BT UART */ 20 serial2 = &uart2; /* LS Expansion UART0 */ 21 serial3 = &uart3; /* LS Expansion UART1 */ 22 }; 23 24 chosen { 25 stdout-path = "serial3:115200n8"; 26 }; 27 28 /* 29 * Reserve below regions from memory node: 30 * 31 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using 32 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason 33 * 0x06df,f000 - 0x06df,ffff: Mailbox message data 34 * 0x0740,f000 - 0x0740,ffff: MCU firmware section 35 * 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer 36 * 0x3e00,0000 - 0x3fff,ffff: OP-TEE 37 */ 38 memory@0 { 39 device_type = "memory"; 40 reg = <0x00000000 0x00000000 0x00000000 0x05e00000>, 41 <0x00000000 0x05f00000 0x00000000 0x00001000>, 42 <0x00000000 0x05f02000 0x00000000 0x00efd000>, 43 <0x00000000 0x06e00000 0x00000000 0x0060f000>, 44 <0x00000000 0x07410000 0x00000000 0x1aaf0000>, 45 <0x00000000 0x22000000 0x00000000 0x1c000000>; 46 }; 47 48 reserved-memory { 49 #address-cells = <2>; 50 #size-cells = <2>; 51 ranges; 52 53 ramoops@0x21f00000 { 54 compatible = "ramoops"; 55 reg = <0x0 0x21f00000 0x0 0x00100000>; 56 record-size = <0x00020000>; 57 console-size = <0x00020000>; 58 ftrace-size = <0x00020000>; 59 }; 60 61 /* global autoconfigured region for contiguous allocations */ 62 linux,cma { 63 compatible = "shared-dma-pool"; 64 reusable; 65 size = <0x00000000 0x08000000>; 66 linux,cma-default; 67 }; 68 }; 69 70 reboot-mode-syscon@5f01000 { 71 compatible = "syscon", "simple-mfd"; 72 reg = <0x0 0x05f01000 0x0 0x00001000>; 73 74 reboot-mode { 75 compatible = "syscon-reboot-mode"; 76 offset = <0x0>; 77 78 mode-normal = <0x77665501>; 79 mode-bootloader = <0x77665500>; 80 mode-recovery = <0x77665502>; 81 }; 82 }; 83 84 reg_sys_5v: regulator@0 { 85 compatible = "regulator-fixed"; 86 regulator-name = "SYS_5V"; 87 regulator-min-microvolt = <5000000>; 88 regulator-max-microvolt = <5000000>; 89 regulator-boot-on; 90 regulator-always-on; 91 }; 92 93 reg_vdd_3v3: regulator@1 { 94 compatible = "regulator-fixed"; 95 regulator-name = "VDD_3V3"; 96 regulator-min-microvolt = <3300000>; 97 regulator-max-microvolt = <3300000>; 98 regulator-boot-on; 99 regulator-always-on; 100 vin-supply = <®_sys_5v>; 101 }; 102 103 reg_5v_hub: regulator@2 { 104 compatible = "regulator-fixed"; 105 regulator-name = "5V_HUB"; 106 regulator-min-microvolt = <5000000>; 107 regulator-max-microvolt = <5000000>; 108 regulator-boot-on; 109 gpio = <&gpio0 7 0>; 110 regulator-always-on; 111 vin-supply = <®_sys_5v>; 112 }; 113 114 wl1835_pwrseq: wl1835-pwrseq { 115 compatible = "mmc-pwrseq-simple"; 116 /* WLAN_EN GPIO */ 117 reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 118 clocks = <&pmic>; 119 clock-names = "ext_clock"; 120 power-off-delay-us = <10>; 121 }; 122 123 soc { 124 spi0: spi@f7106000 { 125 status = "ok"; 126 }; 127 128 i2c0: i2c@f7100000 { 129 status = "ok"; 130 }; 131 132 i2c1: i2c@f7101000 { 133 status = "ok"; 134 }; 135 136 uart1: uart@f7111000 { 137 assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>; 138 assigned-clock-rates = <150000000>; 139 status = "ok"; 140 141 bluetooth { 142 compatible = "ti,wl1835-st"; 143 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 144 clocks = <&pmic>; 145 clock-names = "ext_clock"; 146 }; 147 }; 148 149 uart2: uart@f7112000 { 150 status = "ok"; 151 }; 152 153 uart3: uart@f7113000 { 154 status = "ok"; 155 }; 156 157 /* 158 * Legend: proper name = the GPIO line is used as GPIO 159 * NC = not connected (not routed from the SoC) 160 * "[PER]" = pin is muxed for peripheral (not GPIO) 161 * "" = no idea, schematic doesn't say, could be 162 * unrouted (not connected to any external pin) 163 * LSEC = Low Speed External Connector 164 * HSEC = High Speed External Connector 165 * 166 * Pin assignments taken from LeMaker and CircuitCo Schematics 167 * Rev A1. 168 * 169 * For the lines routed to the external connectors the 170 * lines are named after the 96Boards CE Specification 1.0, 171 * Appendix "Expansion Connector Signal Description". 172 * 173 * When the 96Board naming of a line and the schematic name of 174 * the same line are in conflict, the 96Board specification 175 * takes precedence, which means that the external UART on the 176 * LSEC is named UART0 while the schematic and SoC names this 177 * UART2. This is only for the informational lines i.e. "[FOO]", 178 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 179 * ones actually used for GPIO. 180 */ 181 gpio0: gpio@f8011000 { 182 gpio-line-names = "PWR_HOLD", "DSI_SEL", 183 "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON", 184 "PWRON_DET", "5V_HUB_EN"; 185 }; 186 187 gpio1: gpio@f8012000 { 188 gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N", 189 "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON"; 190 }; 191 192 gpio2: gpio@f8013000 { 193 gpio-line-names = 194 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */ 195 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */ 196 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */ 197 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */ 198 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */ 199 "USB_ID_DET", "USB_VBUS_DET", 200 "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */ 201 }; 202 203 gpio3: gpio@f8014000 { 204 gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "", 205 "WLAN_ACTIVE", "NC", "NC"; 206 }; 207 208 gpio4: gpio@f7020000 { 209 gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3", 210 "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE"; 211 }; 212 213 gpio5: gpio@f7021000 { 214 gpio-line-names = "NC", "NC", 215 "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */ 216 "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */ 217 "[AUX_SSI1]", "NC", 218 "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */ 219 "[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */ 220 }; 221 222 gpio6: gpio@f7022000 { 223 gpio-line-names = 224 "[SPI0_DIN]", /* Pin 10: SPI0_DI */ 225 "[SPI0_DOUT]", /* Pin 14: SPI0_DO */ 226 "[SPI0_CS]", /* Pin 12: SPI0_CS_N */ 227 "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */ 228 "NC", "NC", "NC", 229 "GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */ 230 }; 231 232 gpio7: gpio@f7023000 { 233 gpio-line-names = "NC", "NC", "NC", "NC", 234 "[PCM_DI]", /* Pin 22: MODEM_PCM_DI */ 235 "[PCM_DO]", /* Pin 20: MODEM_PCM_DO */ 236 "NC", "NC"; 237 }; 238 239 gpio8: gpio@f7024000 { 240 gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC", 241 "", "", "", "", "", ""; 242 }; 243 244 gpio9: gpio@f7025000 { 245 gpio-line-names = "", 246 "GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */ 247 "GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */ 248 "NC", "NC", "NC", "NC", "[ISP_CCLK0]"; 249 }; 250 251 gpio10: gpio@f7026000 { 252 gpio-line-names = "BOOT_SEL", 253 "[ISP_CCLK1]", 254 "GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */ 255 "GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */ 256 "NC", "NC", 257 "[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */ 258 "[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */ 259 }; 260 261 gpio11: gpio@f7027000 { 262 gpio-line-names = 263 "[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */ 264 "[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */ 265 "", "NC", "NC", "NC", "", ""; 266 }; 267 268 gpio12: gpio@f7028000 { 269 gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]", 270 "[BT_PCM_DO]", 271 "NC", "NC", "NC", "NC", 272 "GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */ 273 }; 274 275 gpio13: gpio@f7029000 { 276 gpio-line-names = "[UART0_RX]", "[UART0_TX]", 277 "[BT_UART1_CTS]", "[BT_UART1_RTS]", 278 "[BT_UART1_RX]", "[BT_UART1_TX]", 279 "[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */ 280 "[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */ 281 }; 282 283 gpio14: gpio@f702a000 { 284 gpio-line-names = 285 "[UART0_RxD]", /* LSEC Pin 7: UART2_RX */ 286 "[UART0_TxD]", /* LSEC Pin 5: UART2_TX */ 287 "[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */ 288 "[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */ 289 "[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */ 290 "[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */ 291 "[I2C2_SCL]", "[I2C2_SDA]"; 292 }; 293 294 gpio15: gpio@f702b000 { 295 gpio-line-names = "", "", "", "", "", "", "NC", ""; 296 }; 297 298 /* GPIO blocks 16 thru 19 do not appear to be routed to pins */ 299 300 dwmmc_0: dwmmc0@f723d000 { 301 cap-mmc-highspeed; 302 non-removable; 303 bus-width = <0x8>; 304 vmmc-supply = <&ldo19>; 305 }; 306 307 dwmmc_1: dwmmc1@f723e000 { 308 card-detect-delay = <200>; 309 cap-sd-highspeed; 310 sd-uhs-sdr12; 311 sd-uhs-sdr25; 312 sd-uhs-sdr50; 313 vqmmc-supply = <&ldo7>; 314 vmmc-supply = <&ldo10>; 315 bus-width = <0x4>; 316 disable-wp; 317 cd-gpios = <&gpio1 0 1>; 318 }; 319 320 dwmmc_2: dwmmc2@f723f000 { 321 bus-width = <0x4>; 322 non-removable; 323 vmmc-supply = <®_vdd_3v3>; 324 mmc-pwrseq = <&wl1835_pwrseq>; 325 326 #address-cells = <0x1>; 327 #size-cells = <0x0>; 328 wlcore: wlcore@2 { 329 compatible = "ti,wl1835"; 330 reg = <2>; /* sdio func num */ 331 /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */ 332 interrupt-parent = <&gpio1>; 333 interrupts = <3 IRQ_TYPE_EDGE_RISING>; 334 }; 335 }; 336 }; 337 338 leds { 339 compatible = "gpio-leds"; 340 user_led4 { 341 label = "user_led4"; 342 gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */ 343 linux,default-trigger = "heartbeat"; 344 }; 345 346 user_led3 { 347 label = "user_led3"; 348 gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */ 349 linux,default-trigger = "mmc0"; 350 }; 351 352 user_led2 { 353 label = "user_led2"; 354 gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */ 355 linux,default-trigger = "mmc1"; 356 }; 357 358 user_led1 { 359 label = "user_led1"; 360 gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */ 361 linux,default-trigger = "cpu0"; 362 }; 363 364 wlan_active_led { 365 label = "wifi_active"; 366 gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */ 367 linux,default-trigger = "phy0tx"; 368 default-state = "off"; 369 }; 370 371 bt_active_led { 372 label = "bt_active"; 373 gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */ 374 linux,default-trigger = "hci0rx"; 375 default-state = "off"; 376 }; 377 }; 378 379 pmic: pmic@f8000000 { 380 compatible = "hisilicon,hi655x-pmic"; 381 reg = <0x0 0xf8000000 0x0 0x1000>; 382 #clock-cells = <0>; 383 interrupt-controller; 384 #interrupt-cells = <2>; 385 pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 386 387 regulators { 388 ldo2: LDO2 { 389 regulator-name = "LDO2_2V8"; 390 regulator-min-microvolt = <2500000>; 391 regulator-max-microvolt = <3200000>; 392 regulator-enable-ramp-delay = <120>; 393 }; 394 395 ldo7: LDO7 { 396 regulator-name = "LDO7_SDIO"; 397 regulator-min-microvolt = <1800000>; 398 regulator-max-microvolt = <3300000>; 399 regulator-enable-ramp-delay = <120>; 400 }; 401 402 ldo10: LDO10 { 403 regulator-name = "LDO10_2V85"; 404 regulator-min-microvolt = <1800000>; 405 regulator-max-microvolt = <3000000>; 406 regulator-enable-ramp-delay = <360>; 407 }; 408 409 ldo13: LDO13 { 410 regulator-name = "LDO13_1V8"; 411 regulator-min-microvolt = <1600000>; 412 regulator-max-microvolt = <1950000>; 413 regulator-enable-ramp-delay = <120>; 414 }; 415 416 ldo14: LDO14 { 417 regulator-name = "LDO14_2V8"; 418 regulator-min-microvolt = <2500000>; 419 regulator-max-microvolt = <3200000>; 420 regulator-enable-ramp-delay = <120>; 421 }; 422 423 ldo15: LDO15 { 424 regulator-name = "LDO15_1V8"; 425 regulator-min-microvolt = <1600000>; 426 regulator-max-microvolt = <1950000>; 427 regulator-boot-on; 428 regulator-always-on; 429 regulator-enable-ramp-delay = <120>; 430 }; 431 432 ldo17: LDO17 { 433 regulator-name = "LDO17_2V5"; 434 regulator-min-microvolt = <2500000>; 435 regulator-max-microvolt = <3200000>; 436 regulator-enable-ramp-delay = <120>; 437 }; 438 439 ldo19: LDO19 { 440 regulator-name = "LDO19_3V0"; 441 regulator-min-microvolt = <1800000>; 442 regulator-max-microvolt = <3000000>; 443 regulator-enable-ramp-delay = <360>; 444 }; 445 446 ldo21: LDO21 { 447 regulator-name = "LDO21_1V8"; 448 regulator-min-microvolt = <1650000>; 449 regulator-max-microvolt = <2000000>; 450 regulator-always-on; 451 regulator-enable-ramp-delay = <120>; 452 }; 453 454 ldo22: LDO22 { 455 regulator-name = "LDO22_1V2"; 456 regulator-min-microvolt = <900000>; 457 regulator-max-microvolt = <1200000>; 458 regulator-boot-on; 459 regulator-always-on; 460 regulator-enable-ramp-delay = <120>; 461 }; 462 }; 463 }; 464 465 firmware { 466 optee { 467 compatible = "linaro,optee-tz"; 468 method = "smc"; 469 }; 470 }; 471 472 sound_card { 473 compatible = "audio-graph-card"; 474 dais = <&i2s0_port0>; 475 }; 476}; 477 478&uart2 { 479 label = "LS-UART0"; 480}; 481&uart3 { 482 label = "LS-UART1"; 483}; 484 485&ade { 486 status = "ok"; 487}; 488 489&dsi { 490 status = "ok"; 491 492 ports { 493 /* 1 for output port */ 494 port@1 { 495 reg = <1>; 496 497 dsi_out0: endpoint@0 { 498 remote-endpoint = <&adv7533_in>; 499 }; 500 }; 501 }; 502}; 503 504&i2c2 { 505 #address-cells = <1>; 506 #size-cells = <0>; 507 status = "ok"; 508 509 adv7533: adv7533@39 { 510 compatible = "adi,adv7533"; 511 reg = <0x39>; 512 interrupt-parent = <&gpio1>; 513 interrupts = <1 2>; 514 pd-gpio = <&gpio0 4 0>; 515 adi,dsi-lanes = <4>; 516 #sound-dai-cells = <0>; 517 518 ports { 519 #address-cells = <1>; 520 #size-cells = <0>; 521 port@0 { 522 adv7533_in: endpoint { 523 remote-endpoint = <&dsi_out0>; 524 }; 525 }; 526 port@2 { 527 reg = <2>; 528 codec_endpoint: endpoint { 529 remote-endpoint = <&i2s0_cpu_endpoint>; 530 }; 531 }; 532 }; 533 }; 534}; 535 536&i2s0 { 537 538 ports { 539 i2s0_port0: port@0 { 540 i2s0_cpu_endpoint: endpoint { 541 remote-endpoint = <&codec_endpoint>; 542 dai-format = "i2s"; 543 }; 544 }; 545 }; 546}; 547