12f20182eSJiancheng Xue/*
22f20182eSJiancheng Xue * DTS File for HiSilicon Poplar Development Board
32f20182eSJiancheng Xue *
42f20182eSJiancheng Xue * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
52f20182eSJiancheng Xue *
62f20182eSJiancheng Xue * Released under the GPLv2 only.
72f20182eSJiancheng Xue * SPDX-License-Identifier: GPL-2.0
82f20182eSJiancheng Xue */
92f20182eSJiancheng Xue
102f20182eSJiancheng Xue/dts-v1/;
112f20182eSJiancheng Xue
122f20182eSJiancheng Xue#include <dt-bindings/gpio/gpio.h>
132f20182eSJiancheng Xue#include "hi3798cv200.dtsi"
142f20182eSJiancheng Xue
152f20182eSJiancheng Xue/ {
162f20182eSJiancheng Xue	model = "HiSilicon Poplar Development Board";
172f20182eSJiancheng Xue	compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
182f20182eSJiancheng Xue
192f20182eSJiancheng Xue	aliases {
202f20182eSJiancheng Xue		serial0 = &uart0;
212f20182eSJiancheng Xue		serial2 = &uart2;
222f20182eSJiancheng Xue	};
232f20182eSJiancheng Xue
242f20182eSJiancheng Xue	chosen {
252f20182eSJiancheng Xue		stdout-path = "serial0:115200n8";
262f20182eSJiancheng Xue	};
272f20182eSJiancheng Xue
282f20182eSJiancheng Xue	memory@0 {
292f20182eSJiancheng Xue		device_type = "memory";
302f20182eSJiancheng Xue		reg = <0x0 0x0 0x0 0x80000000>;
312f20182eSJiancheng Xue	};
322f20182eSJiancheng Xue
332f20182eSJiancheng Xue	leds {
342f20182eSJiancheng Xue		compatible = "gpio-leds";
352f20182eSJiancheng Xue
362f20182eSJiancheng Xue		user-led0 {
372f20182eSJiancheng Xue			label = "USER-LED0";
382f20182eSJiancheng Xue			gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
392f20182eSJiancheng Xue			linux,default-trigger = "heartbeat";
402f20182eSJiancheng Xue			default-state = "off";
412f20182eSJiancheng Xue		};
422f20182eSJiancheng Xue
432f20182eSJiancheng Xue		user-led1 {
442f20182eSJiancheng Xue			label = "USER-LED1";
452f20182eSJiancheng Xue			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
462f20182eSJiancheng Xue			linux,default-trigger = "mmc0";
472f20182eSJiancheng Xue			default-state = "off";
482f20182eSJiancheng Xue		};
492f20182eSJiancheng Xue
502f20182eSJiancheng Xue		user-led2 {
512f20182eSJiancheng Xue			label = "USER-LED2";
522f20182eSJiancheng Xue			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
532f20182eSJiancheng Xue			linux,default-trigger = "none";
542f20182eSJiancheng Xue			default-state = "off";
552f20182eSJiancheng Xue		};
562f20182eSJiancheng Xue
572f20182eSJiancheng Xue		user-led3 {
582f20182eSJiancheng Xue			label = "USER-LED3";
592f20182eSJiancheng Xue			gpios = <&gpio10 6 GPIO_ACTIVE_LOW>;
602f20182eSJiancheng Xue			linux,default-trigger = "cpu0";
612f20182eSJiancheng Xue			default-state = "off";
622f20182eSJiancheng Xue		};
632f20182eSJiancheng Xue	};
6432fa0176SShawn Guo
6532fa0176SShawn Guo	reg_pcie: regulator-pcie {
6632fa0176SShawn Guo		compatible = "regulator-fixed";
6732fa0176SShawn Guo		regulator-name = "3V3_PCIE0";
6832fa0176SShawn Guo		regulator-min-microvolt = <3300000>;
6932fa0176SShawn Guo		regulator-max-microvolt = <3300000>;
7032fa0176SShawn Guo		gpio = <&gpio6 7 0>;
7132fa0176SShawn Guo		enable-active-high;
7232fa0176SShawn Guo	};
732f20182eSJiancheng Xue};
742f20182eSJiancheng Xue
752f20182eSJiancheng Xue&gmac1 {
762f20182eSJiancheng Xue	status = "okay";
772f20182eSJiancheng Xue	#address-cells = <1>;
782f20182eSJiancheng Xue	#size-cells = <0>;
792f20182eSJiancheng Xue	phy-handle = <&eth_phy1>;
802f20182eSJiancheng Xue	phy-mode = "rgmii";
812f20182eSJiancheng Xue	hisilicon,phy-reset-delays-us = <10000 10000 30000>;
822f20182eSJiancheng Xue
832f20182eSJiancheng Xue	eth_phy1: phy@3 {
842f20182eSJiancheng Xue		reg = <3>;
852f20182eSJiancheng Xue	};
862f20182eSJiancheng Xue};
872f20182eSJiancheng Xue
882f20182eSJiancheng Xue&gpio1 {
892f20182eSJiancheng Xue	status = "okay";
90a1fb73d7SLinus Walleij	gpio-line-names = "GPIO-E",	"",
912f20182eSJiancheng Xue			  "",		"",
92a1fb73d7SLinus Walleij			  "",		"GPIO-F",
93a1fb73d7SLinus Walleij			  "",		"GPIO-J";
942f20182eSJiancheng Xue};
952f20182eSJiancheng Xue
962f20182eSJiancheng Xue&gpio2 {
972f20182eSJiancheng Xue	status = "okay";
98a1fb73d7SLinus Walleij	gpio-line-names = "GPIO-H",	"GPIO-I",
99a1fb73d7SLinus Walleij			  "GPIO-L",	"GPIO-G",
100a1fb73d7SLinus Walleij			  "GPIO-K",	"",
1012f20182eSJiancheng Xue			  "",		"";
1022f20182eSJiancheng Xue};
1032f20182eSJiancheng Xue
1042f20182eSJiancheng Xue&gpio3 {
1052f20182eSJiancheng Xue	status = "okay";
1062f20182eSJiancheng Xue	gpio-line-names = "",		"",
1072f20182eSJiancheng Xue			  "",		"",
108a1fb73d7SLinus Walleij			  "GPIO-C",	"",
109a1fb73d7SLinus Walleij			  "",		"GPIO-B";
1102f20182eSJiancheng Xue};
1112f20182eSJiancheng Xue
1122f20182eSJiancheng Xue&gpio4 {
1132f20182eSJiancheng Xue	status = "okay";
1142f20182eSJiancheng Xue	gpio-line-names = "",		"",
1152f20182eSJiancheng Xue			  "",		"",
116a1fb73d7SLinus Walleij			  "",		"GPIO-D",
1172f20182eSJiancheng Xue			  "",		"";
1182f20182eSJiancheng Xue};
1192f20182eSJiancheng Xue
1202f20182eSJiancheng Xue&gpio5 {
1212f20182eSJiancheng Xue	status = "okay";
1222f20182eSJiancheng Xue	gpio-line-names = "",		"USER-LED-1",
1232f20182eSJiancheng Xue			  "USER-LED-2",	"",
124a1fb73d7SLinus Walleij			  "",		"GPIO-A",
1252f20182eSJiancheng Xue			  "",		"";
1262f20182eSJiancheng Xue};
1272f20182eSJiancheng Xue
1282f20182eSJiancheng Xue&gpio6 {
1292f20182eSJiancheng Xue	status = "okay";
1302f20182eSJiancheng Xue	gpio-line-names = "",		"",
1312f20182eSJiancheng Xue			  "",		"USER-LED-0",
1322f20182eSJiancheng Xue			  "",		"",
1332f20182eSJiancheng Xue			  "",		"";
1342f20182eSJiancheng Xue};
1352f20182eSJiancheng Xue
1362f20182eSJiancheng Xue&gpio10 {
1372f20182eSJiancheng Xue	status = "okay";
1382f20182eSJiancheng Xue	gpio-line-names = "",		"",
1392f20182eSJiancheng Xue			  "",		"",
1402f20182eSJiancheng Xue			  "",		"",
1412f20182eSJiancheng Xue			  "USER-LED-3",	"";
1422f20182eSJiancheng Xue};
1432f20182eSJiancheng Xue
1442f20182eSJiancheng Xue&i2c0 {
1452f20182eSJiancheng Xue	status = "okay";
1462f20182eSJiancheng Xue	label = "LS-I2C0";
1472f20182eSJiancheng Xue};
1482f20182eSJiancheng Xue
1492f20182eSJiancheng Xue&i2c2 {
1502f20182eSJiancheng Xue	status = "okay";
1512f20182eSJiancheng Xue	label = "LS-I2C1";
1522f20182eSJiancheng Xue};
1532f20182eSJiancheng Xue
1542f20182eSJiancheng Xue&ir {
1552f20182eSJiancheng Xue	status = "okay";
1562f20182eSJiancheng Xue};
1572f20182eSJiancheng Xue
15832fa0176SShawn Guo&pcie {
15932fa0176SShawn Guo	reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
16032fa0176SShawn Guo	vpcie-supply = <&reg_pcie>;
16132fa0176SShawn Guo	status = "okay";
16232fa0176SShawn Guo};
16332fa0176SShawn Guo
1644dcf0f9aSShawn Guo&sd0 {
1654dcf0f9aSShawn Guo	bus-width = <4>;
1664dcf0f9aSShawn Guo	cap-sd-highspeed;
1674dcf0f9aSShawn Guo	status = "okay";
1684dcf0f9aSShawn Guo};
1694dcf0f9aSShawn Guo
1702f20182eSJiancheng Xue&spi0 {
1712f20182eSJiancheng Xue	status = "okay";
1722f20182eSJiancheng Xue	label = "LS-SPI0";
1732f20182eSJiancheng Xue};
1742f20182eSJiancheng Xue
1752f20182eSJiancheng Xue&uart0 {
1762f20182eSJiancheng Xue	status = "okay";
1772f20182eSJiancheng Xue};
1782f20182eSJiancheng Xue
1792f20182eSJiancheng Xue&uart2 {
1802f20182eSJiancheng Xue	status = "okay";
1812f20182eSJiancheng Xue	label = "LS-UART0";
1822f20182eSJiancheng Xue};
1832f20182eSJiancheng Xue/* No optional LS-UART1 on Low Speed Expansion Connector. */
184