13d91ba65SAisheng Dong// SPDX-License-Identifier: GPL-2.0+ 23d91ba65SAisheng Dong/* 33d91ba65SAisheng Dong * Copyright (C) 2016 Freescale Semiconductor, Inc. 43d91ba65SAisheng Dong * Copyright 2017-2018 NXP 53d91ba65SAisheng Dong * Dong Aisheng <aisheng.dong@nxp.com> 63d91ba65SAisheng Dong */ 73d91ba65SAisheng Dong 83d91ba65SAisheng Dong#include <dt-bindings/clock/imx8-clock.h> 93d91ba65SAisheng Dong#include <dt-bindings/firmware/imx/rsrc.h> 103d91ba65SAisheng Dong#include <dt-bindings/gpio/gpio.h> 1149dad0c1SAnson Huang#include <dt-bindings/input/input.h> 123d91ba65SAisheng Dong#include <dt-bindings/interrupt-controller/arm-gic.h> 133d91ba65SAisheng Dong#include <dt-bindings/pinctrl/pads-imx8qxp.h> 14f0cac141SAnson Huang#include <dt-bindings/thermal/thermal.h> 153d91ba65SAisheng Dong 163d91ba65SAisheng Dong/ { 173d91ba65SAisheng Dong interrupt-parent = <&gic>; 183d91ba65SAisheng Dong #address-cells = <2>; 193d91ba65SAisheng Dong #size-cells = <2>; 203d91ba65SAisheng Dong 213d91ba65SAisheng Dong aliases { 22ddabee1eSAnson Huang gpio0 = &lsio_gpio0; 23ddabee1eSAnson Huang gpio1 = &lsio_gpio1; 24ddabee1eSAnson Huang gpio2 = &lsio_gpio2; 25ddabee1eSAnson Huang gpio3 = &lsio_gpio3; 26ddabee1eSAnson Huang gpio4 = &lsio_gpio4; 27ddabee1eSAnson Huang gpio5 = &lsio_gpio5; 28ddabee1eSAnson Huang gpio6 = &lsio_gpio6; 29ddabee1eSAnson Huang gpio7 = &lsio_gpio7; 303d91ba65SAisheng Dong mmc0 = &usdhc1; 313d91ba65SAisheng Dong mmc1 = &usdhc2; 323d91ba65SAisheng Dong mmc2 = &usdhc3; 336b2bcbd8SAnson Huang mu1 = &lsio_mu1; 3474d82a30SShawn Guo serial0 = &adma_lpuart0; 35adc898e3SFugang Duan serial1 = &adma_lpuart1; 36adc898e3SFugang Duan serial2 = &adma_lpuart2; 37adc898e3SFugang Duan serial3 = &adma_lpuart3; 383d91ba65SAisheng Dong }; 393d91ba65SAisheng Dong 403d91ba65SAisheng Dong cpus { 413d91ba65SAisheng Dong #address-cells = <2>; 423d91ba65SAisheng Dong #size-cells = <0>; 433d91ba65SAisheng Dong 443d91ba65SAisheng Dong /* We have 1 clusters with 4 Cortex-A35 cores */ 453d91ba65SAisheng Dong A35_0: cpu@0 { 463d91ba65SAisheng Dong device_type = "cpu"; 473d91ba65SAisheng Dong compatible = "arm,cortex-a35"; 483d91ba65SAisheng Dong reg = <0x0 0x0>; 493d91ba65SAisheng Dong enable-method = "psci"; 503d91ba65SAisheng Dong next-level-cache = <&A35_L2>; 517be494ddSAnson Huang clocks = <&clk IMX_A35_CLK>; 527be494ddSAnson Huang operating-points-v2 = <&a35_opp_table>; 537be494ddSAnson Huang #cooling-cells = <2>; 543d91ba65SAisheng Dong }; 553d91ba65SAisheng Dong 563d91ba65SAisheng Dong A35_1: cpu@1 { 573d91ba65SAisheng Dong device_type = "cpu"; 583d91ba65SAisheng Dong compatible = "arm,cortex-a35"; 593d91ba65SAisheng Dong reg = <0x0 0x1>; 603d91ba65SAisheng Dong enable-method = "psci"; 613d91ba65SAisheng Dong next-level-cache = <&A35_L2>; 627be494ddSAnson Huang clocks = <&clk IMX_A35_CLK>; 637be494ddSAnson Huang operating-points-v2 = <&a35_opp_table>; 647be494ddSAnson Huang #cooling-cells = <2>; 653d91ba65SAisheng Dong }; 663d91ba65SAisheng Dong 673d91ba65SAisheng Dong A35_2: cpu@2 { 683d91ba65SAisheng Dong device_type = "cpu"; 693d91ba65SAisheng Dong compatible = "arm,cortex-a35"; 703d91ba65SAisheng Dong reg = <0x0 0x2>; 713d91ba65SAisheng Dong enable-method = "psci"; 723d91ba65SAisheng Dong next-level-cache = <&A35_L2>; 737be494ddSAnson Huang clocks = <&clk IMX_A35_CLK>; 747be494ddSAnson Huang operating-points-v2 = <&a35_opp_table>; 757be494ddSAnson Huang #cooling-cells = <2>; 763d91ba65SAisheng Dong }; 773d91ba65SAisheng Dong 783d91ba65SAisheng Dong A35_3: cpu@3 { 793d91ba65SAisheng Dong device_type = "cpu"; 803d91ba65SAisheng Dong compatible = "arm,cortex-a35"; 813d91ba65SAisheng Dong reg = <0x0 0x3>; 823d91ba65SAisheng Dong enable-method = "psci"; 833d91ba65SAisheng Dong next-level-cache = <&A35_L2>; 847be494ddSAnson Huang clocks = <&clk IMX_A35_CLK>; 857be494ddSAnson Huang operating-points-v2 = <&a35_opp_table>; 867be494ddSAnson Huang #cooling-cells = <2>; 873d91ba65SAisheng Dong }; 883d91ba65SAisheng Dong 893d91ba65SAisheng Dong A35_L2: l2-cache0 { 903d91ba65SAisheng Dong compatible = "cache"; 913d91ba65SAisheng Dong }; 923d91ba65SAisheng Dong }; 933d91ba65SAisheng Dong 947be494ddSAnson Huang a35_opp_table: opp-table { 957be494ddSAnson Huang compatible = "operating-points-v2"; 967be494ddSAnson Huang opp-shared; 977be494ddSAnson Huang 987be494ddSAnson Huang opp-900000000 { 997be494ddSAnson Huang opp-hz = /bits/ 64 <900000000>; 1007be494ddSAnson Huang opp-microvolt = <1000000>; 1017be494ddSAnson Huang clock-latency-ns = <150000>; 1027be494ddSAnson Huang }; 1037be494ddSAnson Huang 1047be494ddSAnson Huang opp-1200000000 { 1057be494ddSAnson Huang opp-hz = /bits/ 64 <1200000000>; 1067be494ddSAnson Huang opp-microvolt = <1100000>; 1077be494ddSAnson Huang clock-latency-ns = <150000>; 1087be494ddSAnson Huang opp-suspend; 1097be494ddSAnson Huang }; 1107be494ddSAnson Huang }; 1117be494ddSAnson Huang 1123d91ba65SAisheng Dong gic: interrupt-controller@51a00000 { 1133d91ba65SAisheng Dong compatible = "arm,gic-v3"; 1143d91ba65SAisheng Dong reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */ 1153d91ba65SAisheng Dong <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */ 1163d91ba65SAisheng Dong #interrupt-cells = <3>; 1173d91ba65SAisheng Dong interrupt-controller; 1183d91ba65SAisheng Dong interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1193d91ba65SAisheng Dong }; 1203d91ba65SAisheng Dong 121cd42fa17SDaniel Baluta reserved-memory { 122cd42fa17SDaniel Baluta #address-cells = <2>; 123cd42fa17SDaniel Baluta #size-cells = <2>; 124cd42fa17SDaniel Baluta ranges; 125cd42fa17SDaniel Baluta 126cd42fa17SDaniel Baluta dsp_reserved: dsp@92400000 { 127cd42fa17SDaniel Baluta reg = <0 0x92400000 0 0x2000000>; 128cd42fa17SDaniel Baluta no-map; 129cd42fa17SDaniel Baluta }; 130cd42fa17SDaniel Baluta }; 131cd42fa17SDaniel Baluta 1323d91ba65SAisheng Dong pmu { 1333d91ba65SAisheng Dong compatible = "arm,armv8-pmuv3"; 1343d91ba65SAisheng Dong interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 1353d91ba65SAisheng Dong }; 1363d91ba65SAisheng Dong 1373d91ba65SAisheng Dong psci { 1383d91ba65SAisheng Dong compatible = "arm,psci-1.0"; 1393d91ba65SAisheng Dong method = "smc"; 1403d91ba65SAisheng Dong }; 1413d91ba65SAisheng Dong 1423d91ba65SAisheng Dong scu { 1433d91ba65SAisheng Dong compatible = "fsl,imx-scu"; 1443d91ba65SAisheng Dong mbox-names = "tx0", "tx1", "tx2", "tx3", 1456b2bcbd8SAnson Huang "rx0", "rx1", "rx2", "rx3", 1466b2bcbd8SAnson Huang "gip3"; 1473d91ba65SAisheng Dong mboxes = <&lsio_mu1 0 0 1483d91ba65SAisheng Dong &lsio_mu1 0 1 1493d91ba65SAisheng Dong &lsio_mu1 0 2 1503d91ba65SAisheng Dong &lsio_mu1 0 3 1513d91ba65SAisheng Dong &lsio_mu1 1 0 1523d91ba65SAisheng Dong &lsio_mu1 1 1 1533d91ba65SAisheng Dong &lsio_mu1 1 2 1546b2bcbd8SAnson Huang &lsio_mu1 1 3 1556b2bcbd8SAnson Huang &lsio_mu1 3 3>; 1563d91ba65SAisheng Dong 1573d91ba65SAisheng Dong clk: clock-controller { 1583d91ba65SAisheng Dong compatible = "fsl,imx8qxp-clk"; 1593d91ba65SAisheng Dong #clock-cells = <1>; 1603d91ba65SAisheng Dong clocks = <&xtal32k &xtal24m>; 1613d91ba65SAisheng Dong clock-names = "xtal_32KHz", "xtal_24Mhz"; 1623d91ba65SAisheng Dong }; 1633d91ba65SAisheng Dong 1643d91ba65SAisheng Dong iomuxc: pinctrl { 1653d91ba65SAisheng Dong compatible = "fsl,imx8qxp-iomuxc"; 1663d91ba65SAisheng Dong }; 1673d91ba65SAisheng Dong 168ef9ed87eSPeng Fan ocotp: imx8qx-ocotp { 169ef9ed87eSPeng Fan compatible = "fsl,imx8qxp-scu-ocotp"; 170ef9ed87eSPeng Fan #address-cells = <1>; 171ef9ed87eSPeng Fan #size-cells = <1>; 172ef9ed87eSPeng Fan }; 173ef9ed87eSPeng Fan 1743d91ba65SAisheng Dong pd: imx8qx-pd { 1753d91ba65SAisheng Dong compatible = "fsl,imx8qxp-scu-pd"; 1763d91ba65SAisheng Dong #power-domain-cells = <1>; 1773d91ba65SAisheng Dong }; 1786334f879SAnson Huang 17949dad0c1SAnson Huang scu_key: scu-key { 18049dad0c1SAnson Huang compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key"; 18149dad0c1SAnson Huang linux,keycodes = <KEY_POWER>; 18249dad0c1SAnson Huang status = "disabled"; 18349dad0c1SAnson Huang }; 18449dad0c1SAnson Huang 1856334f879SAnson Huang rtc: rtc { 1866334f879SAnson Huang compatible = "fsl,imx8qxp-sc-rtc"; 1876334f879SAnson Huang }; 188db9693aaSAnson Huang 189db9693aaSAnson Huang watchdog { 190db9693aaSAnson Huang compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; 191db9693aaSAnson Huang timeout-sec = <60>; 192db9693aaSAnson Huang }; 193f0cac141SAnson Huang 194f0cac141SAnson Huang tsens: thermal-sensor { 195f0cac141SAnson Huang compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; 196f0cac141SAnson Huang #thermal-sensor-cells = <1>; 197f0cac141SAnson Huang }; 1983d91ba65SAisheng Dong }; 1993d91ba65SAisheng Dong 2003d91ba65SAisheng Dong timer { 2013d91ba65SAisheng Dong compatible = "arm,armv8-timer"; 2023d91ba65SAisheng Dong interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* Physical Secure */ 2033d91ba65SAisheng Dong <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* Physical Non-Secure */ 2043d91ba65SAisheng Dong <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* Virtual */ 2053d91ba65SAisheng Dong <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* Hypervisor */ 2063d91ba65SAisheng Dong }; 2073d91ba65SAisheng Dong 2083d91ba65SAisheng Dong xtal32k: clock-xtal32k { 2093d91ba65SAisheng Dong compatible = "fixed-clock"; 2103d91ba65SAisheng Dong #clock-cells = <0>; 2113d91ba65SAisheng Dong clock-frequency = <32768>; 2123d91ba65SAisheng Dong clock-output-names = "xtal_32KHz"; 2133d91ba65SAisheng Dong }; 2143d91ba65SAisheng Dong 2153d91ba65SAisheng Dong xtal24m: clock-xtal24m { 2163d91ba65SAisheng Dong compatible = "fixed-clock"; 2173d91ba65SAisheng Dong #clock-cells = <0>; 2183d91ba65SAisheng Dong clock-frequency = <24000000>; 2193d91ba65SAisheng Dong clock-output-names = "xtal_24MHz"; 2203d91ba65SAisheng Dong }; 2213d91ba65SAisheng Dong 2223d91ba65SAisheng Dong adma_subsys: bus@59000000 { 2233d91ba65SAisheng Dong compatible = "simple-bus"; 2243d91ba65SAisheng Dong #address-cells = <1>; 2253d91ba65SAisheng Dong #size-cells = <1>; 2263d91ba65SAisheng Dong ranges = <0x59000000 0x0 0x59000000 0x2000000>; 2273d91ba65SAisheng Dong 2283d91ba65SAisheng Dong adma_lpcg: clock-controller@59000000 { 2293d91ba65SAisheng Dong compatible = "fsl,imx8qxp-lpcg-adma"; 2303d91ba65SAisheng Dong reg = <0x59000000 0x2000000>; 2313d91ba65SAisheng Dong #clock-cells = <1>; 2323d91ba65SAisheng Dong }; 2333d91ba65SAisheng Dong 234cd42fa17SDaniel Baluta adma_dsp: dsp@596e8000 { 235cd42fa17SDaniel Baluta compatible = "fsl,imx8qxp-dsp"; 236cd42fa17SDaniel Baluta reg = <0x596e8000 0x88000>; 237cd42fa17SDaniel Baluta clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>, 238cd42fa17SDaniel Baluta <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, 239cd42fa17SDaniel Baluta <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; 240cd42fa17SDaniel Baluta clock-names = "ipg", "ocram", "core"; 241cd42fa17SDaniel Baluta power-domains = <&pd IMX_SC_R_MU_13A>, 242cd42fa17SDaniel Baluta <&pd IMX_SC_R_MU_13B>, 243cd42fa17SDaniel Baluta <&pd IMX_SC_R_DSP>, 244cd42fa17SDaniel Baluta <&pd IMX_SC_R_DSP_RAM>; 245cd42fa17SDaniel Baluta mbox-names = "txdb0", "txdb1", 246cd42fa17SDaniel Baluta "rxdb0", "rxdb1"; 247cd42fa17SDaniel Baluta mboxes = <&lsio_mu13 2 0>, 248cd42fa17SDaniel Baluta <&lsio_mu13 2 1>, 249cd42fa17SDaniel Baluta <&lsio_mu13 3 0>, 250cd42fa17SDaniel Baluta <&lsio_mu13 3 1>; 251cd42fa17SDaniel Baluta memory-region = <&dsp_reserved>; 252cd42fa17SDaniel Baluta status = "disabled"; 253cd42fa17SDaniel Baluta }; 254cd42fa17SDaniel Baluta 2553d91ba65SAisheng Dong adma_lpuart0: serial@5a060000 { 2563d91ba65SAisheng Dong compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 2573d91ba65SAisheng Dong reg = <0x5a060000 0x1000>; 2583d91ba65SAisheng Dong interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 259d04fd0b4SFugang Duan clocks = <&adma_lpcg IMX_ADMA_LPCG_UART0_IPG_CLK>, 260d04fd0b4SFugang Duan <&adma_lpcg IMX_ADMA_LPCG_UART0_BAUD_CLK>; 261d04fd0b4SFugang Duan clock-names = "ipg", "baud"; 2623d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_UART_0>; 2633d91ba65SAisheng Dong status = "disabled"; 2643d91ba65SAisheng Dong }; 2653d91ba65SAisheng Dong 26629fdb6b8SDaniel Baluta adma_lpuart1: serial@5a070000 { 26729fdb6b8SDaniel Baluta compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 26829fdb6b8SDaniel Baluta reg = <0x5a070000 0x1000>; 26929fdb6b8SDaniel Baluta interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 270d04fd0b4SFugang Duan clocks = <&adma_lpcg IMX_ADMA_LPCG_UART1_IPG_CLK>, 271d04fd0b4SFugang Duan <&adma_lpcg IMX_ADMA_LPCG_UART1_BAUD_CLK>; 272d04fd0b4SFugang Duan clock-names = "ipg", "baud"; 27329fdb6b8SDaniel Baluta power-domains = <&pd IMX_SC_R_UART_1>; 27429fdb6b8SDaniel Baluta status = "disabled"; 27529fdb6b8SDaniel Baluta }; 27629fdb6b8SDaniel Baluta 27729fdb6b8SDaniel Baluta adma_lpuart2: serial@5a080000 { 27829fdb6b8SDaniel Baluta compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 27929fdb6b8SDaniel Baluta reg = <0x5a080000 0x1000>; 28029fdb6b8SDaniel Baluta interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; 281d04fd0b4SFugang Duan clocks = <&adma_lpcg IMX_ADMA_LPCG_UART2_IPG_CLK>, 282d04fd0b4SFugang Duan <&adma_lpcg IMX_ADMA_LPCG_UART2_BAUD_CLK>; 283d04fd0b4SFugang Duan clock-names = "ipg", "baud"; 28429fdb6b8SDaniel Baluta power-domains = <&pd IMX_SC_R_UART_2>; 28529fdb6b8SDaniel Baluta status = "disabled"; 28629fdb6b8SDaniel Baluta }; 28729fdb6b8SDaniel Baluta 28829fdb6b8SDaniel Baluta adma_lpuart3: serial@5a090000 { 28929fdb6b8SDaniel Baluta compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 29029fdb6b8SDaniel Baluta reg = <0x5a090000 0x1000>; 29129fdb6b8SDaniel Baluta interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>; 292d04fd0b4SFugang Duan clocks = <&adma_lpcg IMX_ADMA_LPCG_UART3_IPG_CLK>, 293d04fd0b4SFugang Duan <&adma_lpcg IMX_ADMA_LPCG_UART3_BAUD_CLK>; 294d04fd0b4SFugang Duan clock-names = "ipg", "baud"; 29529fdb6b8SDaniel Baluta power-domains = <&pd IMX_SC_R_UART_3>; 29629fdb6b8SDaniel Baluta status = "disabled"; 29729fdb6b8SDaniel Baluta }; 29829fdb6b8SDaniel Baluta 2993d91ba65SAisheng Dong adma_i2c0: i2c@5a800000 { 3003d91ba65SAisheng Dong compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 3013d91ba65SAisheng Dong reg = <0x5a800000 0x4000>; 3023d91ba65SAisheng Dong interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; 3033d91ba65SAisheng Dong clocks = <&adma_lpcg IMX_ADMA_LPCG_I2C0_CLK>; 3043d91ba65SAisheng Dong clock-names = "per"; 3053d91ba65SAisheng Dong assigned-clocks = <&clk IMX_ADMA_I2C0_CLK>; 3063d91ba65SAisheng Dong assigned-clock-rates = <24000000>; 3073d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_I2C_0>; 3083d91ba65SAisheng Dong status = "disabled"; 3093d91ba65SAisheng Dong }; 3103d91ba65SAisheng Dong 3113d91ba65SAisheng Dong adma_i2c1: i2c@5a810000 { 3123d91ba65SAisheng Dong compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 3133d91ba65SAisheng Dong reg = <0x5a810000 0x4000>; 3143d91ba65SAisheng Dong interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 3153d91ba65SAisheng Dong clocks = <&adma_lpcg IMX_ADMA_LPCG_I2C1_CLK>; 3163d91ba65SAisheng Dong clock-names = "per"; 3173d91ba65SAisheng Dong assigned-clocks = <&clk IMX_ADMA_I2C1_CLK>; 3183d91ba65SAisheng Dong assigned-clock-rates = <24000000>; 3193d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_I2C_1>; 3203d91ba65SAisheng Dong status = "disabled"; 3213d91ba65SAisheng Dong }; 3223d91ba65SAisheng Dong 3233d91ba65SAisheng Dong adma_i2c2: i2c@5a820000 { 3243d91ba65SAisheng Dong compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 3253d91ba65SAisheng Dong reg = <0x5a820000 0x4000>; 3263d91ba65SAisheng Dong interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 3273d91ba65SAisheng Dong clocks = <&adma_lpcg IMX_ADMA_LPCG_I2C2_CLK>; 3283d91ba65SAisheng Dong clock-names = "per"; 3293d91ba65SAisheng Dong assigned-clocks = <&clk IMX_ADMA_I2C2_CLK>; 3303d91ba65SAisheng Dong assigned-clock-rates = <24000000>; 3313d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_I2C_2>; 3323d91ba65SAisheng Dong status = "disabled"; 3333d91ba65SAisheng Dong }; 3343d91ba65SAisheng Dong 3353d91ba65SAisheng Dong adma_i2c3: i2c@5a830000 { 3363d91ba65SAisheng Dong compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 3373d91ba65SAisheng Dong reg = <0x5a830000 0x4000>; 3383d91ba65SAisheng Dong interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; 3393d91ba65SAisheng Dong clocks = <&adma_lpcg IMX_ADMA_LPCG_I2C3_CLK>; 3403d91ba65SAisheng Dong clock-names = "per"; 3413d91ba65SAisheng Dong assigned-clocks = <&clk IMX_ADMA_I2C3_CLK>; 3423d91ba65SAisheng Dong assigned-clock-rates = <24000000>; 3433d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_I2C_3>; 3443d91ba65SAisheng Dong status = "disabled"; 3453d91ba65SAisheng Dong }; 3463d91ba65SAisheng Dong }; 3473d91ba65SAisheng Dong 3483d91ba65SAisheng Dong conn_subsys: bus@5b000000 { 3493d91ba65SAisheng Dong compatible = "simple-bus"; 3503d91ba65SAisheng Dong #address-cells = <1>; 3513d91ba65SAisheng Dong #size-cells = <1>; 3523d91ba65SAisheng Dong ranges = <0x5b000000 0x0 0x5b000000 0x1000000>; 3533d91ba65SAisheng Dong 3543d91ba65SAisheng Dong conn_lpcg: clock-controller@5b200000 { 3553d91ba65SAisheng Dong compatible = "fsl,imx8qxp-lpcg-conn"; 3563d91ba65SAisheng Dong reg = <0x5b200000 0xb0000>; 3573d91ba65SAisheng Dong #clock-cells = <1>; 3583d91ba65SAisheng Dong }; 3593d91ba65SAisheng Dong 3603d91ba65SAisheng Dong usdhc1: mmc@5b010000 { 3613d91ba65SAisheng Dong compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc"; 3623d91ba65SAisheng Dong interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; 3633d91ba65SAisheng Dong reg = <0x5b010000 0x10000>; 3643d91ba65SAisheng Dong clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC0_IPG_CLK>, 3653d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>, 3663d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>; 3673d91ba65SAisheng Dong clock-names = "ipg", "per", "ahb"; 3683d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_SDHC_0>; 3693d91ba65SAisheng Dong status = "disabled"; 3703d91ba65SAisheng Dong }; 3713d91ba65SAisheng Dong 3723d91ba65SAisheng Dong usdhc2: mmc@5b020000 { 3733d91ba65SAisheng Dong compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc"; 3743d91ba65SAisheng Dong interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; 3753d91ba65SAisheng Dong reg = <0x5b020000 0x10000>; 3763d91ba65SAisheng Dong clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC1_IPG_CLK>, 3773d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_SDHC1_PER_CLK>, 3783d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_SDHC1_HCLK>; 3793d91ba65SAisheng Dong clock-names = "ipg", "per", "ahb"; 3803d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_SDHC_1>; 3813d91ba65SAisheng Dong fsl,tuning-start-tap = <20>; 3823d91ba65SAisheng Dong fsl,tuning-step= <2>; 3833d91ba65SAisheng Dong status = "disabled"; 3843d91ba65SAisheng Dong }; 3853d91ba65SAisheng Dong 3863d91ba65SAisheng Dong usdhc3: mmc@5b030000 { 3873d91ba65SAisheng Dong compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc"; 3883d91ba65SAisheng Dong interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>; 3893d91ba65SAisheng Dong reg = <0x5b030000 0x10000>; 3903d91ba65SAisheng Dong clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC2_IPG_CLK>, 3913d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_SDHC2_PER_CLK>, 3923d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_SDHC2_HCLK>; 3933d91ba65SAisheng Dong clock-names = "ipg", "per", "ahb"; 3943d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_SDHC_2>; 3953d91ba65SAisheng Dong status = "disabled"; 3963d91ba65SAisheng Dong }; 3973d91ba65SAisheng Dong 3983d91ba65SAisheng Dong fec1: ethernet@5b040000 { 3993d91ba65SAisheng Dong compatible = "fsl,imx8qxp-fec", "fsl,imx6sx-fec"; 4003d91ba65SAisheng Dong reg = <0x5b040000 0x10000>; 4013d91ba65SAisheng Dong interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, 4023d91ba65SAisheng Dong <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 4033d91ba65SAisheng Dong <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, 4043d91ba65SAisheng Dong <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>; 4053d91ba65SAisheng Dong clocks = <&conn_lpcg IMX_CONN_LPCG_ENET0_IPG_CLK>, 4063d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_ENET0_AHB_CLK>, 4073d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_ENET0_TX_CLK>, 4083d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_ENET0_ROOT_CLK>; 4093d91ba65SAisheng Dong clock-names = "ipg", "ahb", "enet_clk_ref", "ptp"; 4103d91ba65SAisheng Dong fsl,num-tx-queues=<3>; 4113d91ba65SAisheng Dong fsl,num-rx-queues=<3>; 4123d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_ENET_0>; 4133d91ba65SAisheng Dong status = "disabled"; 4143d91ba65SAisheng Dong }; 4153d91ba65SAisheng Dong 4163d91ba65SAisheng Dong fec2: ethernet@5b050000 { 4173d91ba65SAisheng Dong compatible = "fsl,imx8qxp-fec", "fsl,imx6sx-fec"; 4183d91ba65SAisheng Dong reg = <0x5b050000 0x10000>; 4193d91ba65SAisheng Dong interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 4203d91ba65SAisheng Dong <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 4213d91ba65SAisheng Dong <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 4223d91ba65SAisheng Dong <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 4233d91ba65SAisheng Dong clocks = <&conn_lpcg IMX_CONN_LPCG_ENET1_IPG_CLK>, 4243d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_ENET1_AHB_CLK>, 4253d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_ENET1_TX_CLK>, 4263d91ba65SAisheng Dong <&conn_lpcg IMX_CONN_LPCG_ENET1_ROOT_CLK>; 4273d91ba65SAisheng Dong clock-names = "ipg", "ahb", "enet_clk_ref", "ptp"; 4283d91ba65SAisheng Dong fsl,num-tx-queues=<3>; 4293d91ba65SAisheng Dong fsl,num-rx-queues=<3>; 4303d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_ENET_1>; 4313d91ba65SAisheng Dong status = "disabled"; 4323d91ba65SAisheng Dong }; 4333d91ba65SAisheng Dong }; 4343d91ba65SAisheng Dong 4356ab6e923SFrank Li ddr_subsyss: bus@5c000000 { 4366ab6e923SFrank Li compatible = "simple-bus"; 4376ab6e923SFrank Li #address-cells = <1>; 4386ab6e923SFrank Li #size-cells = <1>; 4396ab6e923SFrank Li ranges = <0x5c000000 0x0 0x5c000000 0x1000000>; 4406ab6e923SFrank Li 4416ab6e923SFrank Li ddr-pmu@5c020000 { 4426ab6e923SFrank Li compatible = "fsl,imx8-ddr-pmu"; 4436ab6e923SFrank Li reg = <0x5c020000 0x10000>; 4446ab6e923SFrank Li interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 4456ab6e923SFrank Li }; 4466ab6e923SFrank Li }; 4476ab6e923SFrank Li 4483d91ba65SAisheng Dong lsio_subsys: bus@5d000000 { 4493d91ba65SAisheng Dong compatible = "simple-bus"; 4503d91ba65SAisheng Dong #address-cells = <1>; 4513d91ba65SAisheng Dong #size-cells = <1>; 4523d91ba65SAisheng Dong ranges = <0x5d000000 0x0 0x5d000000 0x1000000>; 4533d91ba65SAisheng Dong 4543d91ba65SAisheng Dong lsio_gpio0: gpio@5d080000 { 4553d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 4563d91ba65SAisheng Dong reg = <0x5d080000 0x10000>; 4573d91ba65SAisheng Dong interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 4583d91ba65SAisheng Dong gpio-controller; 4593d91ba65SAisheng Dong #gpio-cells = <2>; 4603d91ba65SAisheng Dong interrupt-controller; 4613d91ba65SAisheng Dong #interrupt-cells = <2>; 4623d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_0>; 4633d91ba65SAisheng Dong }; 4643d91ba65SAisheng Dong 4653d91ba65SAisheng Dong lsio_gpio1: gpio@5d090000 { 4663d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 4673d91ba65SAisheng Dong reg = <0x5d090000 0x10000>; 4683d91ba65SAisheng Dong interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 4693d91ba65SAisheng Dong gpio-controller; 4703d91ba65SAisheng Dong #gpio-cells = <2>; 4713d91ba65SAisheng Dong interrupt-controller; 4723d91ba65SAisheng Dong #interrupt-cells = <2>; 4733d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_1>; 4743d91ba65SAisheng Dong }; 4753d91ba65SAisheng Dong 4763d91ba65SAisheng Dong lsio_gpio2: gpio@5d0a0000 { 4773d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 4783d91ba65SAisheng Dong reg = <0x5d0a0000 0x10000>; 4793d91ba65SAisheng Dong interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 4803d91ba65SAisheng Dong gpio-controller; 4813d91ba65SAisheng Dong #gpio-cells = <2>; 4823d91ba65SAisheng Dong interrupt-controller; 4833d91ba65SAisheng Dong #interrupt-cells = <2>; 4843d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_2>; 4853d91ba65SAisheng Dong }; 4863d91ba65SAisheng Dong 4873d91ba65SAisheng Dong lsio_gpio3: gpio@5d0b0000 { 4883d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 4893d91ba65SAisheng Dong reg = <0x5d0b0000 0x10000>; 4903d91ba65SAisheng Dong interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 4913d91ba65SAisheng Dong gpio-controller; 4923d91ba65SAisheng Dong #gpio-cells = <2>; 4933d91ba65SAisheng Dong interrupt-controller; 4943d91ba65SAisheng Dong #interrupt-cells = <2>; 4953d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_3>; 4963d91ba65SAisheng Dong }; 4973d91ba65SAisheng Dong 4983d91ba65SAisheng Dong lsio_gpio4: gpio@5d0c0000 { 4993d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 5003d91ba65SAisheng Dong reg = <0x5d0c0000 0x10000>; 5013d91ba65SAisheng Dong interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 5023d91ba65SAisheng Dong gpio-controller; 5033d91ba65SAisheng Dong #gpio-cells = <2>; 5043d91ba65SAisheng Dong interrupt-controller; 5053d91ba65SAisheng Dong #interrupt-cells = <2>; 5063d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_4>; 5073d91ba65SAisheng Dong }; 5083d91ba65SAisheng Dong 5093d91ba65SAisheng Dong lsio_gpio5: gpio@5d0d0000 { 5103d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 5113d91ba65SAisheng Dong reg = <0x5d0d0000 0x10000>; 5123d91ba65SAisheng Dong interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 5133d91ba65SAisheng Dong gpio-controller; 5143d91ba65SAisheng Dong #gpio-cells = <2>; 5153d91ba65SAisheng Dong interrupt-controller; 5163d91ba65SAisheng Dong #interrupt-cells = <2>; 5173d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_5>; 5183d91ba65SAisheng Dong }; 5193d91ba65SAisheng Dong 5203d91ba65SAisheng Dong lsio_gpio6: gpio@5d0e0000 { 5213d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 5223d91ba65SAisheng Dong reg = <0x5d0e0000 0x10000>; 5233d91ba65SAisheng Dong interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; 5243d91ba65SAisheng Dong gpio-controller; 5253d91ba65SAisheng Dong #gpio-cells = <2>; 5263d91ba65SAisheng Dong interrupt-controller; 5273d91ba65SAisheng Dong #interrupt-cells = <2>; 5283d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_6>; 5293d91ba65SAisheng Dong }; 5303d91ba65SAisheng Dong 5313d91ba65SAisheng Dong lsio_gpio7: gpio@5d0f0000 { 5323d91ba65SAisheng Dong compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 5333d91ba65SAisheng Dong reg = <0x5d0f0000 0x10000>; 5343d91ba65SAisheng Dong interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 5353d91ba65SAisheng Dong gpio-controller; 5363d91ba65SAisheng Dong #gpio-cells = <2>; 5373d91ba65SAisheng Dong interrupt-controller; 5383d91ba65SAisheng Dong #interrupt-cells = <2>; 5393d91ba65SAisheng Dong power-domains = <&pd IMX_SC_R_GPIO_7>; 5403d91ba65SAisheng Dong }; 541107529cfSShawn Guo 542107529cfSShawn Guo lsio_mu0: mailbox@5d1b0000 { 543107529cfSShawn Guo compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 544107529cfSShawn Guo reg = <0x5d1b0000 0x10000>; 545107529cfSShawn Guo interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 546107529cfSShawn Guo #mbox-cells = <2>; 547107529cfSShawn Guo status = "disabled"; 548107529cfSShawn Guo }; 549107529cfSShawn Guo 550107529cfSShawn Guo lsio_mu1: mailbox@5d1c0000 { 551107529cfSShawn Guo compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 552107529cfSShawn Guo reg = <0x5d1c0000 0x10000>; 553107529cfSShawn Guo interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 554107529cfSShawn Guo #mbox-cells = <2>; 555107529cfSShawn Guo }; 556107529cfSShawn Guo 557107529cfSShawn Guo lsio_mu2: mailbox@5d1d0000 { 558107529cfSShawn Guo compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 559107529cfSShawn Guo reg = <0x5d1d0000 0x10000>; 560107529cfSShawn Guo interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 561107529cfSShawn Guo #mbox-cells = <2>; 562107529cfSShawn Guo status = "disabled"; 563107529cfSShawn Guo }; 564107529cfSShawn Guo 565107529cfSShawn Guo lsio_mu3: mailbox@5d1e0000 { 566107529cfSShawn Guo compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 567107529cfSShawn Guo reg = <0x5d1e0000 0x10000>; 568107529cfSShawn Guo interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 569107529cfSShawn Guo #mbox-cells = <2>; 570107529cfSShawn Guo status = "disabled"; 571107529cfSShawn Guo }; 572107529cfSShawn Guo 573107529cfSShawn Guo lsio_mu4: mailbox@5d1f0000 { 574107529cfSShawn Guo compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 575107529cfSShawn Guo reg = <0x5d1f0000 0x10000>; 576107529cfSShawn Guo interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 577107529cfSShawn Guo #mbox-cells = <2>; 578107529cfSShawn Guo status = "disabled"; 579107529cfSShawn Guo }; 580107529cfSShawn Guo 581107529cfSShawn Guo lsio_mu13: mailbox@5d280000 { 582107529cfSShawn Guo compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu"; 583107529cfSShawn Guo reg = <0x5d280000 0x10000>; 584107529cfSShawn Guo interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 585107529cfSShawn Guo #mbox-cells = <2>; 586107529cfSShawn Guo power-domains = <&pd IMX_SC_R_MU_13A>; 587107529cfSShawn Guo }; 588107529cfSShawn Guo 589107529cfSShawn Guo lsio_lpcg: clock-controller@5d400000 { 590107529cfSShawn Guo compatible = "fsl,imx8qxp-lpcg-lsio"; 591107529cfSShawn Guo reg = <0x5d400000 0x400000>; 592107529cfSShawn Guo #clock-cells = <1>; 593107529cfSShawn Guo }; 5943d91ba65SAisheng Dong }; 595f0cac141SAnson Huang 596f0cac141SAnson Huang thermal_zones: thermal-zones { 597f0cac141SAnson Huang cpu-thermal0 { 598f0cac141SAnson Huang polling-delay-passive = <250>; 599f0cac141SAnson Huang polling-delay = <2000>; 600f0cac141SAnson Huang thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; 601f0cac141SAnson Huang 602f0cac141SAnson Huang trips { 603f0cac141SAnson Huang cpu_alert0: trip0 { 604f0cac141SAnson Huang temperature = <107000>; 605f0cac141SAnson Huang hysteresis = <2000>; 606f0cac141SAnson Huang type = "passive"; 607f0cac141SAnson Huang }; 608f0cac141SAnson Huang 609f0cac141SAnson Huang cpu_crit0: trip1 { 610f0cac141SAnson Huang temperature = <127000>; 611f0cac141SAnson Huang hysteresis = <2000>; 612f0cac141SAnson Huang type = "critical"; 613f0cac141SAnson Huang }; 614f0cac141SAnson Huang }; 615f0cac141SAnson Huang 616f0cac141SAnson Huang cooling-maps { 617f0cac141SAnson Huang map0 { 618f0cac141SAnson Huang trip = <&cpu_alert0>; 619f0cac141SAnson Huang cooling-device = 620f0cac141SAnson Huang <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 621f0cac141SAnson Huang <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 622f0cac141SAnson Huang <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 623f0cac141SAnson Huang <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 624f0cac141SAnson Huang }; 625f0cac141SAnson Huang }; 626f0cac141SAnson Huang }; 627f0cac141SAnson Huang }; 6283d91ba65SAisheng Dong}; 629