1*3ccc3515SDong Aisheng// SPDX-License-Identifier: GPL-2.0+ 2*3ccc3515SDong Aisheng/* 3*3ccc3515SDong Aisheng * Copyright 2018-2019 NXP 4*3ccc3515SDong Aisheng * Dong Aisheng <aisheng.dong@nxp.com> 5*3ccc3515SDong Aisheng */ 6*3ccc3515SDong Aisheng 7*3ccc3515SDong Aisheng&dma_subsys { 8*3ccc3515SDong Aisheng uart4_lpcg: clock-controller@5a4a0000 { 9*3ccc3515SDong Aisheng compatible = "fsl,imx8qxp-lpcg"; 10*3ccc3515SDong Aisheng reg = <0x5a4a0000 0x10000>; 11*3ccc3515SDong Aisheng #clock-cells = <1>; 12*3ccc3515SDong Aisheng clocks = <&clk IMX_SC_R_UART_4 IMX_SC_PM_CLK_PER>, 13*3ccc3515SDong Aisheng <&dma_ipg_clk>; 14*3ccc3515SDong Aisheng clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>; 15*3ccc3515SDong Aisheng clock-output-names = "uart4_lpcg_baud_clk", 16*3ccc3515SDong Aisheng "uart4_lpcg_ipg_clk"; 17*3ccc3515SDong Aisheng power-domains = <&pd IMX_SC_R_UART_4>; 18*3ccc3515SDong Aisheng }; 19*3ccc3515SDong Aisheng}; 20*3ccc3515SDong Aisheng 21*3ccc3515SDong Aisheng&lpuart0 { 22*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; 23*3ccc3515SDong Aisheng}; 24*3ccc3515SDong Aisheng 25*3ccc3515SDong Aisheng&lpuart1 { 26*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; 27*3ccc3515SDong Aisheng}; 28*3ccc3515SDong Aisheng 29*3ccc3515SDong Aisheng&lpuart2 { 30*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; 31*3ccc3515SDong Aisheng}; 32*3ccc3515SDong Aisheng 33*3ccc3515SDong Aisheng&lpuart3 { 34*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart"; 35*3ccc3515SDong Aisheng}; 36*3ccc3515SDong Aisheng 37*3ccc3515SDong Aisheng&i2c0 { 38*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c"; 39*3ccc3515SDong Aisheng}; 40*3ccc3515SDong Aisheng 41*3ccc3515SDong Aisheng&i2c1 { 42*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c"; 43*3ccc3515SDong Aisheng}; 44*3ccc3515SDong Aisheng 45*3ccc3515SDong Aisheng&i2c2 { 46*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c"; 47*3ccc3515SDong Aisheng}; 48*3ccc3515SDong Aisheng 49*3ccc3515SDong Aisheng&i2c3 { 50*3ccc3515SDong Aisheng compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c"; 51*3ccc3515SDong Aisheng}; 52