1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2020 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include "dt-bindings/pwm/pwm.h"
11#include "dt-bindings/usb/pd.h"
12#include "imx8mq.dtsi"
13
14/ {
15	model = "Purism Librem 5";
16	compatible = "purism,librem5", "fsl,imx8mq";
17	chassis-type = "handset";
18
19	backlight_dsi: backlight-dsi {
20		compatible = "led-backlight";
21		leds = <&led_backlight>;
22	};
23
24	pmic_osc: clock-pmic {
25		compatible = "fixed-clock";
26		#clock-cells = <0>;
27		clock-frequency = <32768>;
28		clock-output-names = "pmic_osc";
29	};
30
31	chosen {
32		stdout-path = &uart1;
33	};
34
35	gpio-keys {
36		compatible = "gpio-keys";
37		pinctrl-names = "default";
38		pinctrl-0 = <&pinctrl_keys>;
39
40		vol-down {
41			label = "VOL_DOWN";
42			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
43			linux,code = <KEY_VOLUMEDOWN>;
44			debounce-interval = <50>;
45		};
46
47		vol-up {
48			label = "VOL_UP";
49			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
50			linux,code = <KEY_VOLUMEUP>;
51			debounce-interval = <50>;
52		};
53	};
54
55	reg_aud_1v8: regulator-audio-1v8 {
56		compatible = "regulator-fixed";
57		pinctrl-names = "default";
58		pinctrl-0 = <&pinctrl_audiopwr>;
59		regulator-name = "AUDIO_PWR_EN";
60		regulator-min-microvolt = <1800000>;
61		regulator-max-microvolt = <1800000>;
62		gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
63		enable-active-high;
64	};
65
66	/*
67	 * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC
68	 * since we can't have it twice in the 2 different regulator nodes.
69	 */
70	reg_csi_1v8: regulator-csi-1v8 {
71		compatible = "regulator-fixed";
72		regulator-name = "CAMERA_VDDIO_1V8";
73		regulator-min-microvolt = <1800000>;
74		regulator-max-microvolt = <1800000>;
75		vin-supply = <&reg_vdd_3v3>;
76		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
77		enable-active-high;
78	};
79
80	/* controlled by the CAMERA_POWER_KEY HKS */
81	reg_vcam_1v2: regulator-vcam-1v2 {
82		compatible = "regulator-fixed";
83		regulator-name = "CAMERA_VDDD_1V2";
84		regulator-min-microvolt = <1200000>;
85		regulator-max-microvolt = <1200000>;
86		vin-supply = <&reg_vdd_1v8>;
87		enable-active-high;
88	};
89
90	reg_vcam_2v8: regulator-vcam-2v8 {
91		compatible = "regulator-fixed";
92		regulator-name = "CAMERA_VDDA_2V8";
93		regulator-min-microvolt = <2800000>;
94		regulator-max-microvolt = <2800000>;
95		vin-supply = <&reg_vdd_3v3>;
96		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
97		enable-active-high;
98	};
99
100	reg_gnss: regulator-gnss {
101		compatible = "regulator-fixed";
102		pinctrl-names = "default";
103		pinctrl-0 = <&pinctrl_gnsspwr>;
104		regulator-name = "GNSS";
105		regulator-min-microvolt = <3300000>;
106		regulator-max-microvolt = <3300000>;
107		gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
108		enable-active-high;
109	};
110
111	reg_hub: regulator-hub {
112		compatible = "regulator-fixed";
113		pinctrl-names = "default";
114		pinctrl-0 = <&pinctrl_hub_pwr>;
115		regulator-name = "HUB";
116		regulator-min-microvolt = <3300000>;
117		regulator-max-microvolt = <3300000>;
118		gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
119		enable-active-high;
120	};
121
122	reg_lcd_1v8: regulator-lcd-1v8 {
123		compatible = "regulator-fixed";
124		pinctrl-names = "default";
125		pinctrl-0 = <&pinctrl_dsien>;
126		regulator-name = "LCD_1V8";
127		regulator-min-microvolt = <1800000>;
128		regulator-max-microvolt = <1800000>;
129		vin-supply = <&reg_vdd_1v8>;
130		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
131		enable-active-high;
132		/* Otherwise i2c3 is not functional */
133		regulator-always-on;
134	};
135
136	reg_lcd_3v4: regulator-lcd-3v4 {
137		compatible = "regulator-fixed";
138		regulator-name = "LCD_3V4";
139		pinctrl-names = "default";
140		pinctrl-0 = <&pinctrl_dsibiasen>;
141		vin-supply = <&reg_vsys_3v4>;
142		gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
143		enable-active-high;
144	};
145
146	reg_vdd_sen: regulator-vdd-sen {
147		compatible = "regulator-fixed";
148		regulator-name = "VDD_SEN";
149		regulator-min-microvolt = <3300000>;
150		regulator-max-microvolt = <3300000>;
151	};
152
153	reg_vdd_1v8: regulator-vdd-1v8 {
154		compatible = "regulator-fixed";
155		regulator-name = "VDD_1V8";
156		regulator-min-microvolt = <1800000>;
157		regulator-max-microvolt = <1800000>;
158		vin-supply = <&buck7_reg>;
159	};
160
161	reg_vdd_3v3: regulator-vdd-3v3 {
162		compatible = "regulator-fixed";
163		regulator-name = "VDD_3V3";
164		regulator-min-microvolt = <3300000>;
165		regulator-max-microvolt = <3300000>;
166	};
167
168	reg_vsys_3v4: regulator-vsys-3v4 {
169		compatible = "regulator-fixed";
170		regulator-name = "VSYS_3V4";
171		regulator-min-microvolt = <3400000>;
172		regulator-max-microvolt = <3400000>;
173		regulator-always-on;
174	};
175
176	reg_wifi_3v3: regulator-wifi-3v3 {
177		compatible = "regulator-fixed";
178		pinctrl-names = "default";
179		pinctrl-0 = <&pinctrl_wifi_pwr>;
180		regulator-name = "3V3_WIFI";
181		regulator-min-microvolt = <3300000>;
182		regulator-max-microvolt = <3300000>;
183		gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
184		enable-active-high;
185		vin-supply = <&reg_vdd_3v3>;
186	};
187
188	sound {
189		compatible = "simple-audio-card";
190		pinctrl-names = "default";
191		pinctrl-0 = <&pinctrl_hp>;
192		simple-audio-card,name = "Librem 5";
193		simple-audio-card,format = "i2s";
194		simple-audio-card,widgets =
195			"Headphone", "Headphones",
196			"Microphone", "Headset Mic",
197			"Microphone", "Digital Mic",
198			"Speaker", "Speaker";
199		simple-audio-card,routing =
200			"Headphones", "HPOUTL",
201			"Headphones", "HPOUTR",
202			"Speaker", "SPKOUTL",
203			"Speaker", "SPKOUTR",
204			"Headset Mic", "MICBIAS",
205			"IN3R", "Headset Mic",
206			"DMICDAT", "Digital Mic";
207		simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
208
209		simple-audio-card,cpu {
210			sound-dai = <&sai2>;
211		};
212
213		simple-audio-card,codec {
214			sound-dai = <&codec>;
215			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
216			frame-master;
217			bitclock-master;
218		};
219	};
220
221	sound-wwan {
222		compatible = "simple-audio-card";
223		simple-audio-card,name = "Modem";
224		simple-audio-card,format = "i2s";
225
226		simple-audio-card,cpu {
227			sound-dai = <&sai6>;
228			frame-inversion;
229		};
230
231		simple-audio-card,codec {
232			sound-dai = <&bm818_codec>;
233			frame-master;
234			bitclock-master;
235		};
236	};
237
238	usdhc2_pwrseq: pwrseq {
239		pinctrl-names = "default";
240		pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
241		compatible = "mmc-pwrseq-simple";
242		reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
243			      <&gpio4 29 GPIO_ACTIVE_HIGH>;
244	};
245
246	bm818_codec: sound-wwan-codec {
247		compatible = "broadmobi,bm818", "option,gtm601";
248		#sound-dai-cells = <0>;
249	};
250
251	vibrator {
252		compatible = "pwm-vibrator";
253		pwms = <&pwm1 0 1000000000 0>;
254		pwm-names = "enable";
255		vcc-supply = <&reg_vdd_3v3>;
256	};
257};
258
259&A53_0 {
260	cpu-supply = <&buck2_reg>;
261};
262
263&A53_1 {
264	cpu-supply = <&buck2_reg>;
265};
266
267&A53_2 {
268	cpu-supply = <&buck2_reg>;
269};
270
271&A53_3 {
272	cpu-supply = <&buck2_reg>;
273};
274
275&csi1 {
276	status = "okay";
277};
278
279&ddrc {
280	operating-points-v2 = <&ddrc_opp_table>;
281
282	ddrc_opp_table: opp-table {
283		compatible = "operating-points-v2";
284
285		opp-25M {
286			opp-hz = /bits/ 64 <25000000>;
287		};
288
289		opp-100M {
290			opp-hz = /bits/ 64 <100000000>;
291		};
292
293		opp-800M {
294			opp-hz = /bits/ 64 <800000000>;
295		};
296	};
297};
298
299&dphy {
300	status = "okay";
301};
302
303&ecspi1 {
304	pinctrl-names = "default";
305	pinctrl-0 = <&pinctrl_ecspi1>;
306	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
307	#address-cells = <1>;
308	#size-cells = <0>;
309	status = "okay";
310
311	nor_flash: flash@0 {
312		compatible = "jedec,spi-nor";
313		reg = <0>;
314		spi-max-frequency = <1000000>;
315		#address-cells = <1>;
316		#size-cells = <1>;
317
318		partition@0 {
319			label = "protected0";
320			reg = <0x0 0x30000>;
321			read-only;
322		};
323
324		partition@30000 {
325			label = "protected1";
326			reg = <0x30000 0x10000>;
327			read-only;
328		};
329
330		partition@40000 {
331			label = "rw";
332			reg = <0x40000 0x1C0000>;
333		};
334	};
335};
336
337&gpio1 {
338	pinctrl-names = "default";
339	pinctrl-0 = <&pinctrl_pmic_5v>;
340
341	pmic-5v-hog {
342		gpio-hog;
343		gpios = <1 GPIO_ACTIVE_HIGH>;
344		input;
345		lane-mapping = "pmic-5v";
346	};
347};
348
349&iomuxc {
350	pinctrl_audiopwr: audiopwrgrp {
351		fsl,pins = <
352			/* AUDIO_POWER_EN_3V3 */
353			MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4	0x83
354		>;
355	};
356
357	pinctrl_bl: blgrp {
358		fsl,pins = <
359			/* BACKLINGE_EN */
360			MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14	0x83
361		>;
362	};
363
364	pinctrl_bt: btgrp {
365		fsl,pins = <
366			/* BT_REG_ON */
367			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x83
368		>;
369	};
370
371	pinctrl_camera_pwr: camerapwrgrp {
372		fsl,pins = <
373			/* CAMERA_PWR_EN_3V3 */
374			MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0	0x83
375		>;
376	};
377
378	pinctrl_csi1: csi1grp {
379		fsl,pins = <
380			/* CSI1_NRST */
381			MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25	0x83
382		>;
383	};
384
385	pinctrl_charger_in: chargeringrp {
386		fsl,pins = <
387			/* CHRG_INT */
388			MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3	0x80
389			/* CHG_STATUS_B */
390			MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0		0x80
391		>;
392	};
393
394	pinctrl_dsibiasen: dsibiasengrp {
395		fsl,pins = <
396			/* DSI_BIAS_EN */
397			MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20	0x83
398		>;
399	};
400
401	pinctrl_dsien: dsiengrp {
402		fsl,pins = <
403			/* DSI_EN_3V3 */
404			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x83
405		>;
406	};
407
408	pinctrl_dsirst: dsirstgrp {
409		fsl,pins = <
410			/* DSI_RST */
411			MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29	0x83
412			/* DSI_TE */
413			MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28	0x83
414			/* TP_RST */
415			MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24	0x83
416		>;
417	};
418
419	pinctrl_ecspi1: ecspigrp {
420		fsl,pins = <
421			MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI	0x83
422			MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO	0x83
423			MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9	0x19
424			MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK	0x83
425		>;
426	};
427
428	pinctrl_gauge: gaugegrp {
429		fsl,pins = <
430			/* BAT_LOW */
431			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x80
432		>;
433	};
434
435	pinctrl_gnsspwr: gnsspwrgrp {
436		fsl,pins = <
437			/* GPS3V3_EN */
438			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12	0x83
439		>;
440	};
441
442	pinctrl_haptic: hapticgrp {
443		fsl,pins = <
444			/* MOTO */
445			MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT	0x83
446		>;
447	};
448
449	pinctrl_hp: hpgrp {
450		fsl,pins = <
451			/* HEADPHONE_DET_1V8 */
452			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x180
453		>;
454	};
455
456	pinctrl_hub_pwr: hubpwrgrp {
457		fsl,pins = <
458			/* HUB_PWR_3V3_EN */
459			MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14	0x83
460		>;
461	};
462
463	pinctrl_i2c1: i2c1grp {
464		fsl,pins = <
465			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x40000026
466			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x40000026
467		>;
468	};
469
470	pinctrl_i2c2: i2c2grp {
471		fsl,pins = <
472			MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL		0x40000026
473			MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA		0x40000026
474		>;
475	};
476
477	pinctrl_i2c3: i2c3grp {
478		fsl,pins = <
479			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x40000026
480			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x40000026
481		>;
482	};
483
484	pinctrl_i2c4: i2c4grp {
485		fsl,pins = <
486			MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL		0x40000026
487			MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA		0x40000026
488		>;
489	};
490
491	pinctrl_keys: keysgrp {
492		fsl,pins = <
493			/* VOL- */
494			MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17	0x01C0
495			/* VOL+ */
496			MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16	0x01C0
497		>;
498	};
499
500	pinctrl_led_b: ledbgrp {
501		fsl,pins = <
502			/* LED_B */
503			MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT	0x06
504		>;
505	};
506
507	pinctrl_led_g: ledggrp {
508		fsl,pins = <
509			/* LED_G */
510			MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT		0x06
511		>;
512	};
513
514	pinctrl_led_r: ledrgrp {
515		fsl,pins = <
516			/* LED_R */
517			MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT		0x06
518		>;
519	};
520
521	pinctrl_mag: maggrp {
522		fsl,pins = <
523			/* INT_MAG */
524			MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22	0x80
525		>;
526	};
527
528	pinctrl_pmic: pmicgrp {
529		fsl,pins = <
530			/* PMIC_NINT */
531			MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7	0x80
532		>;
533	};
534
535	pinctrl_pmic_5v: pmic5vgrp {
536		fsl,pins = <
537			/* PMIC_5V */
538			MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1	0x80
539		>;
540	};
541
542	pinctrl_prox: proxgrp {
543		fsl,pins = <
544			/* INT_LIGHT */
545			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x80
546		>;
547	};
548
549	pinctrl_rtc: rtcgrp {
550		fsl,pins = <
551			/* RTC_INT */
552			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x80
553		>;
554	};
555
556	pinctrl_sai2: sai2grp {
557		fsl,pins = <
558			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
559			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
560			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
561			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
562			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
563		>;
564	};
565
566	pinctrl_sai6: sai6grp {
567		fsl,pins = <
568			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
569			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
570			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK	0xd6
571			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
572		>;
573	};
574
575	pinctrl_tcpc: tcpcgrp {
576		fsl,pins = <
577			/* TCPC_INT */
578			MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x01C0
579		>;
580	};
581
582	pinctrl_touch: touchgrp {
583		fsl,pins = <
584			/* TP_INT */
585			MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27	0x80
586		>;
587	};
588
589	pinctrl_typec: typecgrp {
590		fsl,pins = <
591			/* TYPEC_MUX_EN */
592			MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11	0x83
593		>;
594	};
595
596	pinctrl_uart1: uart1grp {
597		fsl,pins = <
598			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX	0x49
599			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX	0x49
600		>;
601	};
602
603	pinctrl_uart2: uart2grp {
604		fsl,pins = <
605			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX	0x49
606			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX	0x49
607		>;
608	};
609
610	pinctrl_uart3: uart3grp {
611		fsl,pins = <
612			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX	0x49
613			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX	0x49
614		>;
615	};
616
617	pinctrl_uart4: uart4grp {
618		fsl,pins = <
619			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
620			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
621			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
622			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
623		>;
624	};
625
626	pinctrl_usdhc1: usdhc1grp {
627		fsl,pins = <
628			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
629			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
630			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
631			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
632			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
633			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
634			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
635			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
636			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
637			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
638			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
639			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
640		>;
641	};
642
643	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
644		fsl,pins = <
645			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
646			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
647			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
648			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
649			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
650			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
651			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
652			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
653			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
654			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
655			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
656			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
657		>;
658	};
659
660	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
661		fsl,pins = <
662			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
663			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
664			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
665			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
666			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
667			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
668			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
669			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
670			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
671			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
672			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
673			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
674		>;
675	};
676
677	pinctrl_usdhc2: usdhc2grp {
678		fsl,pins = <
679			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
680			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
681			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
682			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
683			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
684			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
685			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
686			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
687		>;
688	};
689
690	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
691		fsl,pins = <
692			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
693			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
694			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
695			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
696			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
697			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
698			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
699			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
700		>;
701	};
702
703	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
704		fsl,pins = <
705			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
706			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
707			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
708			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
709			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
710			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
711			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
712			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
713		>;
714	};
715
716	pinctrl_wifi_disable: wifidisablegrp {
717		fsl,pins = <
718			/* WIFI_REG_ON */
719			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x83
720		>;
721	};
722
723	pinctrl_wifi_pwr: wifipwrgrp {
724		fsl,pins = <
725			/* WIFI3V3_EN */
726			MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10	0x83
727		>;
728	};
729
730	pinctrl_wdog: wdoggrp {
731		fsl,pins = <
732			/* nWDOG */
733			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0x1f
734		>;
735	};
736};
737
738&i2c1 {
739	clock-frequency = <387000>;
740	pinctrl-names = "default";
741	pinctrl-0 = <&pinctrl_i2c1>;
742	status = "okay";
743
744	typec_pd: usb-pd@3f {
745		compatible = "ti,tps6598x";
746		reg = <0x3f>;
747		pinctrl-names = "default";
748		pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
749		interrupt-parent = <&gpio1>;
750		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
751		interrupt-names = "irq";
752
753		connector {
754			ports {
755				#address-cells = <1>;
756				#size-cells = <0>;
757
758				port@0 {
759					reg = <0>;
760
761					usb_con_hs: endpoint {
762						remote-endpoint = <&typec_hs>;
763					};
764				};
765
766				port@1 {
767					reg = <1>;
768
769					usb_con_ss: endpoint {
770						remote-endpoint = <&typec_ss>;
771					};
772				};
773			};
774		};
775	};
776
777	pmic: pmic@4b {
778		compatible = "rohm,bd71837";
779		reg = <0x4b>;
780		pinctrl-names = "default";
781		pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;
782		clocks = <&pmic_osc>;
783		clock-names = "osc";
784		clock-output-names = "pmic_clk";
785		interrupt-parent = <&gpio1>;
786		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
787		rohm,reset-snvs-powered;
788
789		regulators {
790			buck1_reg: BUCK1 {
791				regulator-name = "buck1";
792				regulator-min-microvolt = <700000>;
793				regulator-max-microvolt = <1300000>;
794				regulator-boot-on;
795				regulator-ramp-delay = <1250>;
796				rohm,dvs-run-voltage = <900000>;
797				rohm,dvs-idle-voltage = <850000>;
798				rohm,dvs-suspend-voltage = <800000>;
799				regulator-always-on;
800			};
801
802			buck2_reg: BUCK2 {
803				regulator-name = "buck2";
804				regulator-min-microvolt = <700000>;
805				regulator-max-microvolt = <1300000>;
806				regulator-boot-on;
807				regulator-ramp-delay = <1250>;
808				rohm,dvs-run-voltage = <1000000>;
809				rohm,dvs-idle-voltage = <900000>;
810				regulator-always-on;
811			};
812
813			buck3_reg: BUCK3 {
814				regulator-name = "buck3";
815				regulator-min-microvolt = <700000>;
816				regulator-max-microvolt = <1300000>;
817				regulator-boot-on;
818				rohm,dvs-run-voltage = <900000>;
819			};
820
821			buck4_reg: BUCK4 {
822				regulator-name = "buck4";
823				regulator-min-microvolt = <700000>;
824				regulator-max-microvolt = <1300000>;
825				rohm,dvs-run-voltage = <1000000>;
826			};
827
828			buck5_reg: BUCK5 {
829				regulator-name = "buck5";
830				regulator-min-microvolt = <700000>;
831				regulator-max-microvolt = <1350000>;
832				regulator-boot-on;
833				regulator-always-on;
834			};
835
836			buck6_reg: BUCK6 {
837				regulator-name = "buck6";
838				regulator-min-microvolt = <3000000>;
839				regulator-max-microvolt = <3300000>;
840				regulator-boot-on;
841				regulator-always-on;
842			};
843
844			buck7_reg: BUCK7 {
845				regulator-name = "buck7";
846				regulator-min-microvolt = <1605000>;
847				regulator-max-microvolt = <1995000>;
848				regulator-boot-on;
849				regulator-always-on;
850			};
851
852			buck8_reg: BUCK8 {
853				regulator-name = "buck8";
854				regulator-min-microvolt = <800000>;
855				regulator-max-microvolt = <1400000>;
856				regulator-boot-on;
857				regulator-always-on;
858			};
859
860			ldo1_reg: LDO1 {
861				regulator-name = "ldo1";
862				regulator-min-microvolt = <3000000>;
863				regulator-max-microvolt = <3300000>;
864				regulator-boot-on;
865				/* leave on for snvs power button */
866				regulator-always-on;
867			};
868
869			ldo2_reg: LDO2 {
870				regulator-name = "ldo2";
871				regulator-min-microvolt = <900000>;
872				regulator-max-microvolt = <900000>;
873				regulator-boot-on;
874				/* leave on for snvs power button */
875				regulator-always-on;
876			};
877
878			ldo3_reg: LDO3 {
879				regulator-name = "ldo3";
880				regulator-min-microvolt = <1800000>;
881				regulator-max-microvolt = <3300000>;
882				regulator-boot-on;
883				regulator-always-on;
884			};
885
886			ldo4_reg: LDO4 {
887				regulator-name = "ldo4";
888				regulator-min-microvolt = <900000>;
889				regulator-max-microvolt = <1800000>;
890				regulator-boot-on;
891				regulator-always-on;
892			};
893
894			ldo5_reg: LDO5 {
895				/* VDD_PHY_0V9 - MIPI and HDMI domains */
896				regulator-name = "ldo5";
897				regulator-min-microvolt = <1800000>;
898				regulator-max-microvolt = <3300000>;
899				regulator-always-on;
900			};
901
902			ldo6_reg: LDO6 {
903				/* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
904				regulator-name = "ldo6";
905				regulator-min-microvolt = <900000>;
906				regulator-max-microvolt = <1800000>;
907				regulator-boot-on;
908				regulator-always-on;
909			};
910
911			ldo7_reg: LDO7 {
912				/* VDD_PHY_3V3 - USB domain */
913				regulator-name = "ldo7";
914				regulator-min-microvolt = <1800000>;
915				regulator-max-microvolt = <3300000>;
916				regulator-boot-on;
917				regulator-always-on;
918			};
919		};
920	};
921
922	rtc@68 {
923		compatible = "microcrystal,rv4162";
924		reg = <0x68>;
925		pinctrl-names = "default";
926		pinctrl-0 = <&pinctrl_rtc>;
927		interrupt-parent = <&gpio1>;
928		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
929	};
930};
931
932&i2c2 {
933	clock-frequency = <387000>;
934	pinctrl-names = "default";
935	pinctrl-0 = <&pinctrl_i2c2>;
936	status = "okay";
937
938	magnetometer@1e	{
939		compatible = "st,lsm9ds1-magn";
940		reg = <0x1e>;
941		pinctrl-names = "default";
942		pinctrl-0 = <&pinctrl_mag>;
943		interrupt-parent = <&gpio3>;
944		interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
945		vdd-supply = <&reg_vdd_sen>;
946		vddio-supply = <&reg_vdd_1v8>;
947	};
948
949	regulator@3e {
950		compatible = "tps65132";
951		reg = <0x3e>;
952
953		reg_lcd_avdd: outp {
954			regulator-name = "LCD_AVDD";
955			vin-supply = <&reg_lcd_3v4>;
956		};
957
958		reg_lcd_avee: outn {
959			regulator-name = "LCD_AVEE";
960			vin-supply = <&reg_lcd_3v4>;
961		};
962	};
963
964	proximity: prox@60 {
965		compatible = "vishay,vcnl4040";
966		reg = <0x60>;
967		pinctrl-names = "default";
968		pinctrl-0 = <&pinctrl_prox>;
969		interrupt-parent = <&gpio3>;
970		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
971	};
972
973	accel_gyro: accel-gyro@6a	{
974		compatible = "st,lsm9ds1-imu";
975		reg = <0x6a>;
976		vdd-supply = <&reg_vdd_sen>;
977		vddio-supply = <&reg_vdd_1v8>;
978	};
979};
980
981&i2c3 {
982	clock-frequency = <387000>;
983	pinctrl-names = "default";
984	pinctrl-0 = <&pinctrl_i2c3>;
985	status = "okay";
986
987	codec: audio-codec@1a {
988		compatible = "wlf,wm8962";
989		reg = <0x1a>;
990		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
991		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
992		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
993		assigned-clock-rates = <24576000>;
994		#sound-dai-cells = <0>;
995		mic-cfg = <0x200>;
996		DCVDD-supply = <&reg_aud_1v8>;
997		DBVDD-supply = <&reg_aud_1v8>;
998		AVDD-supply = <&reg_aud_1v8>;
999		CPVDD-supply = <&reg_aud_1v8>;
1000		MICVDD-supply = <&reg_aud_1v8>;
1001		PLLVDD-supply = <&reg_aud_1v8>;
1002		SPKVDD1-supply = <&reg_vsys_3v4>;
1003		SPKVDD2-supply = <&reg_vsys_3v4>;
1004		gpio-cfg = <
1005			0x0000 /* n/c */
1006			0x0001 /* gpio2, 1: default */
1007			0x0013 /* gpio3, 2: dmicclk */
1008			0x0000 /* n/c, 3: default */
1009			0x8014 /* gpio5, 4: dmic_dat */
1010			0x0000 /* gpio6, 5: default */
1011		>;
1012	};
1013
1014	camera_front: camera@20 {
1015		compatible = "hynix,hi846";
1016		reg = <0x20>;
1017		pinctrl-names = "default";
1018		pinctrl-0 = <&pinctrl_csi1>;
1019		clocks = <&clk IMX8MQ_CLK_CLKO2>;
1020		assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
1021		assigned-clock-rates = <25000000>;
1022		reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
1023		vdda-supply = <&reg_vcam_2v8>;
1024		vddd-supply = <&reg_vcam_1v2>;
1025		vddio-supply = <&reg_csi_1v8>;
1026		rotation = <90>;
1027		orientation = <0>;
1028
1029		port {
1030			camera1_ep: endpoint {
1031				data-lanes = <1 2>;
1032				link-frequencies = /bits/ 64
1033					<80000000 200000000 300000000>;
1034				remote-endpoint = <&mipi1_sensor_ep>;
1035			};
1036		};
1037	};
1038
1039	backlight@36 {
1040		compatible = "ti,lm36922";
1041		reg = <0x36>;
1042		pinctrl-names = "default";
1043		pinctrl-0 = <&pinctrl_bl>;
1044		#address-cells = <1>;
1045		#size-cells = <0>;
1046		enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
1047		vled-supply = <&reg_vsys_3v4>;
1048		ti,ovp-microvolt = <25000000>;
1049
1050		led_backlight: led@0 {
1051			reg = <0>;
1052			label = ":backlight";
1053			linux,default-trigger = "backlight";
1054			led-max-microamp = <20000>;
1055		};
1056	};
1057
1058	touchscreen@38 {
1059		compatible = "edt,edt-ft5506";
1060		reg = <0x38>;
1061		pinctrl-names = "default";
1062		pinctrl-0 = <&pinctrl_touch>;
1063		interrupt-parent = <&gpio1>;
1064		interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
1065		touchscreen-size-x = <720>;
1066		touchscreen-size-y = <1440>;
1067		vcc-supply = <&reg_lcd_1v8>;
1068	};
1069};
1070
1071&i2c4 {
1072	clock-frequency = <387000>;
1073	pinctrl-names = "default";
1074	pinctrl-0 = <&pinctrl_i2c4>;
1075	status = "okay";
1076
1077	bat: fuel-gauge@36 {
1078		compatible = "maxim,max17055";
1079		reg = <0x36>;
1080		interrupt-parent = <&gpio3>;
1081		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1082		pinctrl-names = "default";
1083		pinctrl-0 = <&pinctrl_gauge>;
1084		maxim,over-heat-temp = <700>;
1085		maxim,over-volt = <4500>;
1086		maxim,rsns-microohm = <5000>;
1087	};
1088
1089	bq25895: charger@6a {
1090		compatible = "ti,bq25895", "ti,bq25890";
1091		reg = <0x6a>;
1092		pinctrl-names = "default";
1093		pinctrl-0 = <&pinctrl_charger_in>;
1094		interrupt-parent = <&gpio3>;
1095		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1096		phys = <&usb3_phy0>;
1097		ti,precharge-current = <130000>; /* uA */
1098		ti,minimum-sys-voltage = <3700000>; /* uV */
1099		ti,boost-voltage = <5000000>; /* uV */
1100		ti,boost-max-current = <500000>; /* uA */
1101		ti,use-vinmin-threshold = <1>; /* enable VINDPM */
1102		ti,vinmin-threshold = <3900000>; /* uV */
1103		monitored-battery = <&bat>;
1104		power-supplies = <&typec_pd>;
1105	};
1106};
1107
1108&lcdif {
1109	status = "okay";
1110};
1111
1112&mipi_csi1 {
1113	#address-cells = <1>;
1114	#size-cells = <0>;
1115	status = "okay";
1116
1117	ports {
1118		port@1 {
1119			reg = <1>;
1120
1121			mipi1_sensor_ep: endpoint {
1122				remote-endpoint = <&camera1_ep>;
1123				data-lanes = <1 2>;
1124			};
1125		};
1126	};
1127};
1128
1129&mipi_dsi {
1130	#address-cells = <1>;
1131	#size-cells = <0>;
1132	status = "okay";
1133
1134	lcd_panel: panel@0 {
1135		compatible = "mantix,mlaf057we51-x";
1136		reg = <0>;
1137		pinctrl-names = "default";
1138		pinctrl-0 = <&pinctrl_dsirst>;
1139		avdd-supply = <&reg_lcd_avdd>;
1140		avee-supply = <&reg_lcd_avee>;
1141		vddi-supply = <&reg_lcd_1v8>;
1142		backlight = <&backlight_dsi>;
1143		reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
1144		mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
1145
1146		port {
1147			panel_in: endpoint {
1148				remote-endpoint = <&mipi_dsi_out>;
1149			};
1150		};
1151	};
1152
1153	ports {
1154		port@1 {
1155			reg = <1>;
1156
1157			mipi_dsi_out: endpoint {
1158				remote-endpoint = <&panel_in>;
1159			};
1160		};
1161	};
1162};
1163
1164&pgc_gpu {
1165	power-supply = <&buck3_reg>;
1166};
1167
1168&pgc_mipi {
1169	power-supply = <&ldo5_reg>;
1170};
1171
1172&pgc_vpu {
1173	power-supply = <&buck4_reg>;
1174};
1175
1176&pwm1 {
1177	pinctrl-names = "default";
1178	pinctrl-0 = <&pinctrl_haptic>;
1179	status = "okay";
1180};
1181
1182&pwm2 {
1183	pinctrl-names = "default";
1184	pinctrl-0 = <&pinctrl_led_b>;
1185	status = "okay";
1186};
1187
1188&pwm3 {
1189	pinctrl-names = "default";
1190	pinctrl-0 = <&pinctrl_led_r>;
1191	status = "okay";
1192};
1193
1194&pwm4 {
1195	pinctrl-names = "default";
1196	pinctrl-0 = <&pinctrl_led_g>;
1197	status = "okay";
1198};
1199
1200&sai2 {
1201	pinctrl-names = "default";
1202	pinctrl-0 = <&pinctrl_sai2>;
1203	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1204	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1205	assigned-clock-rates = <24576000>;
1206	status = "okay";
1207};
1208
1209&sai6 {
1210	pinctrl-names = "default";
1211	pinctrl-0 = <&pinctrl_sai6>;
1212	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1213	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1214	assigned-clock-rates = <24576000>;
1215	fsl,sai-synchronous-rx;
1216	status = "okay";
1217};
1218
1219&snvs_pwrkey {
1220	status = "okay";
1221};
1222
1223&snvs_rtc {
1224	status = "disabled";
1225};
1226
1227&uart1 { /* console */
1228	pinctrl-names = "default";
1229	pinctrl-0 = <&pinctrl_uart1>;
1230	status = "okay";
1231};
1232
1233&uart2 { /* TPS - GPS - DEBUG */
1234	pinctrl-names = "default";
1235	pinctrl-0 = <&pinctrl_uart2>;
1236	status = "okay";
1237
1238	gnss {
1239		compatible = "globaltop,pa6h";
1240		vcc-supply = <&reg_gnss>;
1241		current-speed = <9600>;
1242	};
1243};
1244
1245&uart3 { /* SMC */
1246	pinctrl-names = "default";
1247	pinctrl-0 = <&pinctrl_uart3>;
1248	status = "okay";
1249};
1250
1251&uart4 { /* BT */
1252	pinctrl-names = "default";
1253	pinctrl-0 = <&pinctrl_uart4>;
1254	uart-has-rtscts;
1255	status = "okay";
1256};
1257
1258&usb3_phy0 {
1259	status = "okay";
1260};
1261
1262&usb3_phy1 {
1263	vbus-supply = <&reg_hub>;
1264	status = "okay";
1265};
1266
1267&usb_dwc3_0 {
1268	#address-cells = <1>;
1269	#size-cells = <0>;
1270	dr_mode = "otg";
1271	snps,dis_u3_susphy_quirk;
1272	status = "okay";
1273
1274	port@0 {
1275		reg = <0>;
1276
1277		typec_hs: endpoint {
1278			remote-endpoint = <&usb_con_hs>;
1279		};
1280	};
1281
1282	port@1 {
1283		reg = <1>;
1284
1285		typec_ss: endpoint {
1286			remote-endpoint = <&usb_con_ss>;
1287		};
1288	};
1289};
1290
1291&usb_dwc3_1 {
1292	dr_mode = "host";
1293	status = "okay";
1294	#address-cells = <1>;
1295	#size-cells = <0>;
1296
1297	/* Microchip USB2642 */
1298	hub@1 {
1299		compatible = "usb424,2640";
1300		reg = <1>;
1301		#address-cells = <1>;
1302		#size-cells = <0>;
1303
1304		mass-storage@1 {
1305			compatible = "usb424,4041";
1306			reg = <1>;
1307		};
1308	};
1309};
1310
1311&usdhc1 {
1312	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1313	assigned-clock-rates = <400000000>;
1314	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1315	pinctrl-0 = <&pinctrl_usdhc1>;
1316	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1317	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1318	bus-width = <8>;
1319	vmmc-supply = <&reg_vdd_3v3>;
1320	power-supply = <&reg_vdd_1v8>;
1321	non-removable;
1322	status = "okay";
1323};
1324
1325&usdhc2 {
1326	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1327	assigned-clock-rates = <200000000>;
1328	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1329	pinctrl-0 = <&pinctrl_usdhc2>;
1330	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1331	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1332	bus-width = <4>;
1333	vmmc-supply = <&reg_wifi_3v3>;
1334	mmc-pwrseq = <&usdhc2_pwrseq>;
1335	post-power-on-delay-ms = <1000>;
1336	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1337	max-frequency = <50000000>;
1338	disable-wp;
1339	cap-sdio-irq;
1340	keep-power-in-suspend;
1341	wakeup-source;
1342	status = "okay";
1343};
1344
1345&wdog1 {
1346	pinctrl-names = "default";
1347	pinctrl-0 = <&pinctrl_wdog>;
1348	fsl,ext-reset-output;
1349	status = "okay";
1350};
1351