1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2020 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include "dt-bindings/pwm/pwm.h"
11#include "dt-bindings/usb/pd.h"
12#include "imx8mq.dtsi"
13
14/ {
15	model = "Purism Librem 5";
16	compatible = "purism,librem5", "fsl,imx8mq";
17	chassis-type = "handset";
18
19	backlight_dsi: backlight-dsi {
20		compatible = "led-backlight";
21		leds = <&led_backlight>;
22	};
23
24	pmic_osc: clock-pmic {
25		compatible = "fixed-clock";
26		#clock-cells = <0>;
27		clock-frequency = <32768>;
28		clock-output-names = "pmic_osc";
29	};
30
31	chosen {
32		stdout-path = &uart1;
33	};
34
35	gpio-keys {
36		compatible = "gpio-keys";
37		pinctrl-names = "default";
38		pinctrl-0 = <&pinctrl_keys>;
39
40		key-vol-down {
41			label = "VOL_DOWN";
42			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
43			linux,code = <KEY_VOLUMEDOWN>;
44			debounce-interval = <50>;
45			wakeup-source;
46		};
47
48		key-vol-up {
49			label = "VOL_UP";
50			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
51			linux,code = <KEY_VOLUMEUP>;
52			debounce-interval = <50>;
53			wakeup-source;
54		};
55	};
56
57	reg_aud_1v8: regulator-audio-1v8 {
58		compatible = "regulator-fixed";
59		pinctrl-names = "default";
60		pinctrl-0 = <&pinctrl_audiopwr>;
61		regulator-name = "AUDIO_PWR_EN";
62		regulator-min-microvolt = <1800000>;
63		regulator-max-microvolt = <1800000>;
64		gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
65		enable-active-high;
66	};
67
68	/*
69	 * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC
70	 * since we can't have it twice in the 2 different regulator nodes.
71	 */
72	reg_csi_1v8: regulator-csi-1v8 {
73		compatible = "regulator-fixed";
74		regulator-name = "CAMERA_VDDIO_1V8";
75		regulator-min-microvolt = <1800000>;
76		regulator-max-microvolt = <1800000>;
77		vin-supply = <&reg_vdd_3v3>;
78		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
79		enable-active-high;
80	};
81
82	/* controlled by the CAMERA_POWER_KEY HKS */
83	reg_vcam_1v2: regulator-vcam-1v2 {
84		compatible = "regulator-fixed";
85		regulator-name = "CAMERA_VDDD_1V2";
86		regulator-min-microvolt = <1200000>;
87		regulator-max-microvolt = <1200000>;
88		vin-supply = <&reg_vdd_1v8>;
89		enable-active-high;
90	};
91
92	reg_vcam_2v8: regulator-vcam-2v8 {
93		compatible = "regulator-fixed";
94		regulator-name = "CAMERA_VDDA_2V8";
95		regulator-min-microvolt = <2800000>;
96		regulator-max-microvolt = <2800000>;
97		vin-supply = <&reg_vdd_3v3>;
98		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
99		enable-active-high;
100	};
101
102	reg_gnss: regulator-gnss {
103		compatible = "regulator-fixed";
104		pinctrl-names = "default";
105		pinctrl-0 = <&pinctrl_gnsspwr>;
106		regulator-name = "GNSS";
107		regulator-min-microvolt = <3300000>;
108		regulator-max-microvolt = <3300000>;
109		gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
110		enable-active-high;
111	};
112
113	reg_hub: regulator-hub {
114		compatible = "regulator-fixed";
115		pinctrl-names = "default";
116		pinctrl-0 = <&pinctrl_hub_pwr>;
117		regulator-name = "HUB";
118		regulator-min-microvolt = <3300000>;
119		regulator-max-microvolt = <3300000>;
120		gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
121		enable-active-high;
122	};
123
124	reg_lcd_1v8: regulator-lcd-1v8 {
125		compatible = "regulator-fixed";
126		pinctrl-names = "default";
127		pinctrl-0 = <&pinctrl_dsien>;
128		regulator-name = "LCD_1V8";
129		regulator-min-microvolt = <1800000>;
130		regulator-max-microvolt = <1800000>;
131		vin-supply = <&reg_vdd_1v8>;
132		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
133		enable-active-high;
134		/* Otherwise i2c3 is not functional */
135		regulator-always-on;
136	};
137
138	reg_lcd_3v4: regulator-lcd-3v4 {
139		compatible = "regulator-fixed";
140		regulator-name = "LCD_3V4";
141		pinctrl-names = "default";
142		pinctrl-0 = <&pinctrl_dsibiasen>;
143		vin-supply = <&reg_vsys_3v4>;
144		gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
145		enable-active-high;
146	};
147
148	reg_vdd_sen: regulator-vdd-sen {
149		compatible = "regulator-fixed";
150		regulator-name = "VDD_SEN";
151		regulator-min-microvolt = <3300000>;
152		regulator-max-microvolt = <3300000>;
153	};
154
155	reg_vdd_1v8: regulator-vdd-1v8 {
156		compatible = "regulator-fixed";
157		regulator-name = "VDD_1V8";
158		regulator-min-microvolt = <1800000>;
159		regulator-max-microvolt = <1800000>;
160		vin-supply = <&buck7_reg>;
161	};
162
163	reg_vdd_3v3: regulator-vdd-3v3 {
164		compatible = "regulator-fixed";
165		regulator-name = "VDD_3V3";
166		regulator-min-microvolt = <3300000>;
167		regulator-max-microvolt = <3300000>;
168	};
169
170	reg_vsys_3v4: regulator-vsys-3v4 {
171		compatible = "regulator-fixed";
172		regulator-name = "VSYS_3V4";
173		regulator-min-microvolt = <3400000>;
174		regulator-max-microvolt = <3400000>;
175		regulator-always-on;
176	};
177
178	reg_wifi_3v3: regulator-wifi-3v3 {
179		compatible = "regulator-fixed";
180		pinctrl-names = "default";
181		pinctrl-0 = <&pinctrl_wifi_pwr>;
182		regulator-name = "3V3_WIFI";
183		regulator-min-microvolt = <3300000>;
184		regulator-max-microvolt = <3300000>;
185		gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
186		enable-active-high;
187		vin-supply = <&reg_vdd_3v3>;
188	};
189
190	sound {
191		compatible = "simple-audio-card";
192		pinctrl-names = "default";
193		pinctrl-0 = <&pinctrl_hp>;
194		simple-audio-card,name = "Librem 5";
195		simple-audio-card,format = "i2s";
196		simple-audio-card,widgets =
197			"Headphone", "Headphones",
198			"Microphone", "Headset Mic",
199			"Microphone", "Digital Mic",
200			"Speaker", "Speaker";
201		simple-audio-card,routing =
202			"Headphones", "HPOUTL",
203			"Headphones", "HPOUTR",
204			"Speaker", "SPKOUTL",
205			"Speaker", "SPKOUTR",
206			"Headset Mic", "MICBIAS",
207			"IN3R", "Headset Mic",
208			"DMICDAT", "Digital Mic";
209		simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
210
211		simple-audio-card,cpu {
212			sound-dai = <&sai2>;
213		};
214
215		simple-audio-card,codec {
216			sound-dai = <&codec>;
217			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
218			frame-master;
219			bitclock-master;
220		};
221	};
222
223	sound-wwan {
224		compatible = "simple-audio-card";
225		simple-audio-card,name = "Modem";
226		simple-audio-card,format = "i2s";
227
228		simple-audio-card,cpu {
229			sound-dai = <&sai6>;
230			frame-inversion;
231		};
232
233		simple-audio-card,codec {
234			sound-dai = <&bm818_codec>;
235			frame-master;
236			bitclock-master;
237		};
238	};
239
240	usdhc2_pwrseq: pwrseq {
241		pinctrl-names = "default";
242		pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
243		compatible = "mmc-pwrseq-simple";
244		reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
245			      <&gpio4 29 GPIO_ACTIVE_HIGH>;
246	};
247
248	bm818_codec: sound-wwan-codec {
249		compatible = "broadmobi,bm818", "option,gtm601";
250		#sound-dai-cells = <0>;
251	};
252
253	vibrator {
254		compatible = "pwm-vibrator";
255		pwms = <&pwm1 0 1000000000 0>;
256		pwm-names = "enable";
257		vcc-supply = <&reg_vdd_3v3>;
258	};
259};
260
261&A53_0 {
262	cpu-supply = <&buck2_reg>;
263};
264
265&A53_1 {
266	cpu-supply = <&buck2_reg>;
267};
268
269&A53_2 {
270	cpu-supply = <&buck2_reg>;
271};
272
273&A53_3 {
274	cpu-supply = <&buck2_reg>;
275};
276
277&csi1 {
278	status = "okay";
279};
280
281&ddrc {
282	operating-points-v2 = <&ddrc_opp_table>;
283	status = "okay";
284
285	ddrc_opp_table: opp-table {
286		compatible = "operating-points-v2";
287
288		opp-25M {
289			opp-hz = /bits/ 64 <25000000>;
290		};
291
292		opp-100M {
293			opp-hz = /bits/ 64 <100000000>;
294		};
295
296		opp-800M {
297			opp-hz = /bits/ 64 <800000000>;
298		};
299	};
300};
301
302&dphy {
303	status = "okay";
304};
305
306&ecspi1 {
307	pinctrl-names = "default";
308	pinctrl-0 = <&pinctrl_ecspi1>;
309	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
310	#address-cells = <1>;
311	#size-cells = <0>;
312	status = "okay";
313
314	nor_flash: flash@0 {
315		compatible = "jedec,spi-nor";
316		reg = <0>;
317		spi-max-frequency = <1000000>;
318		#address-cells = <1>;
319		#size-cells = <1>;
320
321		partition@0 {
322			label = "protected0";
323			reg = <0x0 0x30000>;
324			read-only;
325		};
326
327		partition@30000 {
328			label = "firmware";
329			reg = <0x30000 0x1d0000>;
330			read-only;
331		};
332	};
333};
334
335&gpio1 {
336	pinctrl-names = "default";
337	pinctrl-0 = <&pinctrl_pmic_5v>;
338
339	pmic-5v-hog {
340		gpio-hog;
341		gpios = <1 GPIO_ACTIVE_HIGH>;
342		input;
343		lane-mapping = "pmic-5v";
344	};
345};
346
347&iomuxc {
348	pinctrl_audiopwr: audiopwrgrp {
349		fsl,pins = <
350			/* AUDIO_POWER_EN_3V3 */
351			MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4	0x83
352		>;
353	};
354
355	pinctrl_bl: blgrp {
356		fsl,pins = <
357			/* BACKLINGE_EN */
358			MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14	0x83
359		>;
360	};
361
362	pinctrl_bt: btgrp {
363		fsl,pins = <
364			/* BT_REG_ON */
365			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x83
366		>;
367	};
368
369	pinctrl_camera_pwr: camerapwrgrp {
370		fsl,pins = <
371			/* CAMERA_PWR_EN_3V3 */
372			MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0	0x83
373		>;
374	};
375
376	pinctrl_csi1: csi1grp {
377		fsl,pins = <
378			/* CSI1_NRST */
379			MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25	0x83
380		>;
381	};
382
383	pinctrl_charger_in: chargeringrp {
384		fsl,pins = <
385			/* CHRG_INT */
386			MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3	0x80
387		>;
388	};
389
390	pinctrl_dsibiasen: dsibiasengrp {
391		fsl,pins = <
392			/* DSI_BIAS_EN */
393			MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20	0x83
394		>;
395	};
396
397	pinctrl_dsien: dsiengrp {
398		fsl,pins = <
399			/* DSI_EN_3V3 */
400			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x83
401		>;
402	};
403
404	pinctrl_dsirst: dsirstgrp {
405		fsl,pins = <
406			/* DSI_RST */
407			MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29	0x83
408			/* DSI_TE */
409			MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28	0x83
410			/* TP_RST */
411			MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24	0x83
412		>;
413	};
414
415	pinctrl_ecspi1: ecspigrp {
416		fsl,pins = <
417			MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI	0x83
418			MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO	0x83
419			MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9	0x19
420			MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK	0x83
421		>;
422	};
423
424	pinctrl_gauge: gaugegrp {
425		fsl,pins = <
426			/* BAT_LOW */
427			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x80
428		>;
429	};
430
431	pinctrl_gnsspwr: gnsspwrgrp {
432		fsl,pins = <
433			/* GPS3V3_EN */
434			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12	0x83
435		>;
436	};
437
438	pinctrl_haptic: hapticgrp {
439		fsl,pins = <
440			/* MOTO */
441			MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT	0x83
442		>;
443	};
444
445	pinctrl_hp: hpgrp {
446		fsl,pins = <
447			/* HEADPHONE_DET_1V8 */
448			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x180
449		>;
450	};
451
452	pinctrl_hub_pwr: hubpwrgrp {
453		fsl,pins = <
454			/* HUB_PWR_3V3_EN */
455			MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14	0x83
456		>;
457	};
458
459	pinctrl_i2c1: i2c1grp {
460		fsl,pins = <
461			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x40000026
462			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x40000026
463		>;
464	};
465
466	pinctrl_i2c2: i2c2grp {
467		fsl,pins = <
468			MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL		0x40000026
469			MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA		0x40000026
470		>;
471	};
472
473	pinctrl_i2c3: i2c3grp {
474		fsl,pins = <
475			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x40000026
476			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x40000026
477		>;
478	};
479
480	pinctrl_i2c4: i2c4grp {
481		fsl,pins = <
482			MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL		0x40000026
483			MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA		0x40000026
484		>;
485	};
486
487	pinctrl_keys: keysgrp {
488		fsl,pins = <
489			/* VOL- */
490			MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17	0x01C0
491			/* VOL+ */
492			MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16	0x01C0
493		>;
494	};
495
496	pinctrl_led_b: ledbgrp {
497		fsl,pins = <
498			/* LED_B */
499			MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT	0x06
500		>;
501	};
502
503	pinctrl_led_g: ledggrp {
504		fsl,pins = <
505			/* LED_G */
506			MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT		0x06
507		>;
508	};
509
510	pinctrl_led_r: ledrgrp {
511		fsl,pins = <
512			/* LED_R */
513			MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT		0x06
514		>;
515	};
516
517	pinctrl_mag: maggrp {
518		fsl,pins = <
519			/* INT_MAG */
520			MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22	0x80
521		>;
522	};
523
524	pinctrl_pmic: pmicgrp {
525		fsl,pins = <
526			/* PMIC_NINT */
527			MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7	0x80
528		>;
529	};
530
531	pinctrl_pmic_5v: pmic5vgrp {
532		fsl,pins = <
533			/* PMIC_5V */
534			MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1	0x80
535		>;
536	};
537
538	pinctrl_prox: proxgrp {
539		fsl,pins = <
540			/* INT_LIGHT */
541			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x80
542		>;
543	};
544
545	pinctrl_rtc: rtcgrp {
546		fsl,pins = <
547			/* RTC_INT */
548			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x80
549		>;
550	};
551
552	pinctrl_sai2: sai2grp {
553		fsl,pins = <
554			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
555			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
556			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
557			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
558			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
559		>;
560	};
561
562	pinctrl_sai6: sai6grp {
563		fsl,pins = <
564			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
565			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
566			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK	0xd6
567			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
568		>;
569	};
570
571	pinctrl_tcpc: tcpcgrp {
572		fsl,pins = <
573			/* TCPC_INT */
574			MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x01C0
575		>;
576	};
577
578	pinctrl_touch: touchgrp {
579		fsl,pins = <
580			/* TP_INT */
581			MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27	0x80
582		>;
583	};
584
585	pinctrl_typec: typecgrp {
586		fsl,pins = <
587			/* TYPEC_MUX_EN */
588			MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11	0x83
589		>;
590	};
591
592	pinctrl_uart1: uart1grp {
593		fsl,pins = <
594			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX	0x49
595			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX	0x49
596		>;
597	};
598
599	pinctrl_uart2: uart2grp {
600		fsl,pins = <
601			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX	0x49
602			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX	0x49
603		>;
604	};
605
606	pinctrl_uart3: uart3grp {
607		fsl,pins = <
608			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX	0x49
609			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX	0x49
610		>;
611	};
612
613	pinctrl_uart4: uart4grp {
614		fsl,pins = <
615			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
616			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
617			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
618			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
619		>;
620	};
621
622	pinctrl_usdhc1: usdhc1grp {
623		fsl,pins = <
624			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
625			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
626			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
627			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
628			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
629			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
630			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
631			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
632			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
633			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
634			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
635			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
636		>;
637	};
638
639	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
640		fsl,pins = <
641			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
642			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
643			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
644			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
645			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
646			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
647			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
648			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
649			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
650			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
651			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
652			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
653		>;
654	};
655
656	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
657		fsl,pins = <
658			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
659			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
660			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
661			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
662			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
663			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
664			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
665			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
666			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
667			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
668			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
669			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
670		>;
671	};
672
673	pinctrl_usdhc2: usdhc2grp {
674		fsl,pins = <
675			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
676			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
677			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
678			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
679			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
680			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
681			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
682			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
683		>;
684	};
685
686	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
687		fsl,pins = <
688			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
689			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
690			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
691			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
692			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
693			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
694			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
695			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
696		>;
697	};
698
699	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
700		fsl,pins = <
701			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
702			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
703			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
704			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
705			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
706			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
707			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
708			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
709		>;
710	};
711
712	pinctrl_wifi_disable: wifidisablegrp {
713		fsl,pins = <
714			/* WIFI_REG_ON */
715			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x83
716		>;
717	};
718
719	pinctrl_wifi_pwr: wifipwrgrp {
720		fsl,pins = <
721			/* WIFI3V3_EN */
722			MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10	0x83
723		>;
724	};
725
726	pinctrl_wdog: wdoggrp {
727		fsl,pins = <
728			/* nWDOG */
729			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0x1f
730		>;
731	};
732};
733
734&i2c1 {
735	clock-frequency = <387000>;
736	pinctrl-names = "default";
737	pinctrl-0 = <&pinctrl_i2c1>;
738	status = "okay";
739
740	typec_pd: usb-pd@3f {
741		compatible = "ti,tps6598x";
742		reg = <0x3f>;
743		pinctrl-names = "default";
744		pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
745		interrupt-parent = <&gpio1>;
746		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
747		interrupt-names = "irq";
748
749		connector {
750			ports {
751				#address-cells = <1>;
752				#size-cells = <0>;
753
754				port@0 {
755					reg = <0>;
756
757					usb_con_hs: endpoint {
758						remote-endpoint = <&typec_hs>;
759					};
760				};
761
762				port@1 {
763					reg = <1>;
764
765					usb_con_ss: endpoint {
766						remote-endpoint = <&typec_ss>;
767					};
768				};
769			};
770		};
771	};
772
773	pmic: pmic@4b {
774		compatible = "rohm,bd71837";
775		reg = <0x4b>;
776		pinctrl-names = "default";
777		pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;
778		clocks = <&pmic_osc>;
779		clock-names = "osc";
780		clock-output-names = "pmic_clk";
781		interrupt-parent = <&gpio1>;
782		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
783		rohm,reset-snvs-powered;
784
785		regulators {
786			buck1_reg: BUCK1 {
787				regulator-name = "buck1";
788				regulator-min-microvolt = <700000>;
789				regulator-max-microvolt = <1300000>;
790				regulator-boot-on;
791				regulator-ramp-delay = <1250>;
792				rohm,dvs-run-voltage = <900000>;
793				rohm,dvs-idle-voltage = <850000>;
794				rohm,dvs-suspend-voltage = <800000>;
795				regulator-always-on;
796			};
797
798			buck2_reg: BUCK2 {
799				regulator-name = "buck2";
800				regulator-min-microvolt = <700000>;
801				regulator-max-microvolt = <1300000>;
802				regulator-boot-on;
803				regulator-ramp-delay = <1250>;
804				rohm,dvs-run-voltage = <1000000>;
805				rohm,dvs-idle-voltage = <900000>;
806				regulator-always-on;
807			};
808
809			buck3_reg: BUCK3 {
810				regulator-name = "buck3";
811				regulator-min-microvolt = <700000>;
812				regulator-max-microvolt = <1300000>;
813				regulator-boot-on;
814				rohm,dvs-run-voltage = <900000>;
815			};
816
817			buck4_reg: BUCK4 {
818				regulator-name = "buck4";
819				regulator-min-microvolt = <700000>;
820				regulator-max-microvolt = <1300000>;
821				rohm,dvs-run-voltage = <1000000>;
822			};
823
824			buck5_reg: BUCK5 {
825				regulator-name = "buck5";
826				regulator-min-microvolt = <700000>;
827				regulator-max-microvolt = <1350000>;
828				regulator-boot-on;
829				regulator-always-on;
830			};
831
832			buck6_reg: BUCK6 {
833				regulator-name = "buck6";
834				regulator-min-microvolt = <3000000>;
835				regulator-max-microvolt = <3300000>;
836				regulator-boot-on;
837				regulator-always-on;
838			};
839
840			buck7_reg: BUCK7 {
841				regulator-name = "buck7";
842				regulator-min-microvolt = <1605000>;
843				regulator-max-microvolt = <1995000>;
844				regulator-boot-on;
845				regulator-always-on;
846			};
847
848			buck8_reg: BUCK8 {
849				regulator-name = "buck8";
850				regulator-min-microvolt = <800000>;
851				regulator-max-microvolt = <1400000>;
852				regulator-boot-on;
853				regulator-always-on;
854			};
855
856			ldo1_reg: LDO1 {
857				regulator-name = "ldo1";
858				regulator-min-microvolt = <3000000>;
859				regulator-max-microvolt = <3300000>;
860				regulator-boot-on;
861				/* leave on for snvs power button */
862				regulator-always-on;
863			};
864
865			ldo2_reg: LDO2 {
866				regulator-name = "ldo2";
867				regulator-min-microvolt = <900000>;
868				regulator-max-microvolt = <900000>;
869				regulator-boot-on;
870				/* leave on for snvs power button */
871				regulator-always-on;
872			};
873
874			ldo3_reg: LDO3 {
875				regulator-name = "ldo3";
876				regulator-min-microvolt = <1800000>;
877				regulator-max-microvolt = <3300000>;
878				regulator-boot-on;
879				regulator-always-on;
880			};
881
882			ldo4_reg: LDO4 {
883				regulator-name = "ldo4";
884				regulator-min-microvolt = <900000>;
885				regulator-max-microvolt = <1800000>;
886				regulator-boot-on;
887				regulator-always-on;
888			};
889
890			ldo5_reg: LDO5 {
891				/* VDD_PHY_0V9 - MIPI and HDMI domains */
892				regulator-name = "ldo5";
893				regulator-min-microvolt = <1800000>;
894				regulator-max-microvolt = <3300000>;
895				regulator-always-on;
896			};
897
898			ldo6_reg: LDO6 {
899				/* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
900				regulator-name = "ldo6";
901				regulator-min-microvolt = <900000>;
902				regulator-max-microvolt = <1800000>;
903				regulator-boot-on;
904				regulator-always-on;
905			};
906
907			ldo7_reg: LDO7 {
908				/* VDD_PHY_3V3 - USB domain */
909				regulator-name = "ldo7";
910				regulator-min-microvolt = <1800000>;
911				regulator-max-microvolt = <3300000>;
912				regulator-boot-on;
913				regulator-always-on;
914			};
915		};
916	};
917
918	rtc@68 {
919		compatible = "microcrystal,rv4162";
920		reg = <0x68>;
921		pinctrl-names = "default";
922		pinctrl-0 = <&pinctrl_rtc>;
923		interrupt-parent = <&gpio1>;
924		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
925	};
926};
927
928&i2c2 {
929	clock-frequency = <387000>;
930	pinctrl-names = "default";
931	pinctrl-0 = <&pinctrl_i2c2>;
932	status = "okay";
933
934	magnetometer@1e	{
935		compatible = "st,lsm9ds1-magn";
936		reg = <0x1e>;
937		pinctrl-names = "default";
938		pinctrl-0 = <&pinctrl_mag>;
939		interrupt-parent = <&gpio3>;
940		interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
941		vdd-supply = <&reg_vdd_sen>;
942		vddio-supply = <&reg_vdd_1v8>;
943	};
944
945	regulator@3e {
946		compatible = "tps65132";
947		reg = <0x3e>;
948
949		reg_lcd_avdd: outp {
950			regulator-name = "LCD_AVDD";
951			vin-supply = <&reg_lcd_3v4>;
952		};
953
954		reg_lcd_avee: outn {
955			regulator-name = "LCD_AVEE";
956			vin-supply = <&reg_lcd_3v4>;
957		};
958	};
959
960	proximity: prox@60 {
961		compatible = "vishay,vcnl4040";
962		reg = <0x60>;
963		pinctrl-names = "default";
964		pinctrl-0 = <&pinctrl_prox>;
965		interrupt-parent = <&gpio3>;
966		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
967	};
968
969	accel_gyro: accel-gyro@6a	{
970		compatible = "st,lsm9ds1-imu";
971		reg = <0x6a>;
972		vdd-supply = <&reg_vdd_sen>;
973		vddio-supply = <&reg_vdd_1v8>;
974	};
975};
976
977&i2c3 {
978	clock-frequency = <387000>;
979	pinctrl-names = "default";
980	pinctrl-0 = <&pinctrl_i2c3>;
981	status = "okay";
982
983	codec: audio-codec@1a {
984		compatible = "wlf,wm8962";
985		reg = <0x1a>;
986		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
987		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
988		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
989		assigned-clock-rates = <24576000>;
990		#sound-dai-cells = <0>;
991		mic-cfg = <0x200>;
992		DCVDD-supply = <&reg_aud_1v8>;
993		DBVDD-supply = <&reg_aud_1v8>;
994		AVDD-supply = <&reg_aud_1v8>;
995		CPVDD-supply = <&reg_aud_1v8>;
996		MICVDD-supply = <&reg_aud_1v8>;
997		PLLVDD-supply = <&reg_aud_1v8>;
998		SPKVDD1-supply = <&reg_vsys_3v4>;
999		SPKVDD2-supply = <&reg_vsys_3v4>;
1000		gpio-cfg = <
1001			0x0000 /* n/c */
1002			0x0001 /* gpio2, 1: default */
1003			0x0013 /* gpio3, 2: dmicclk */
1004			0x0000 /* n/c, 3: default */
1005			0x8014 /* gpio5, 4: dmic_dat */
1006			0x0000 /* gpio6, 5: default */
1007		>;
1008	};
1009
1010	camera_front: camera@20 {
1011		compatible = "hynix,hi846";
1012		reg = <0x20>;
1013		pinctrl-names = "default";
1014		pinctrl-0 = <&pinctrl_csi1>;
1015		clocks = <&clk IMX8MQ_CLK_CLKO2>;
1016		assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
1017		assigned-clock-rates = <25000000>;
1018		reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
1019		vdda-supply = <&reg_vcam_2v8>;
1020		vddd-supply = <&reg_vcam_1v2>;
1021		vddio-supply = <&reg_csi_1v8>;
1022		rotation = <90>;
1023		orientation = <0>;
1024
1025		port {
1026			camera1_ep: endpoint {
1027				data-lanes = <1 2>;
1028				link-frequencies = /bits/ 64
1029					<80000000 200000000 300000000>;
1030				remote-endpoint = <&mipi1_sensor_ep>;
1031			};
1032		};
1033	};
1034
1035	backlight@36 {
1036		compatible = "ti,lm36922";
1037		reg = <0x36>;
1038		pinctrl-names = "default";
1039		pinctrl-0 = <&pinctrl_bl>;
1040		#address-cells = <1>;
1041		#size-cells = <0>;
1042		enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
1043		vled-supply = <&reg_vsys_3v4>;
1044		ti,ovp-microvolt = <25000000>;
1045
1046		led_backlight: led@0 {
1047			reg = <0>;
1048			label = ":backlight";
1049			linux,default-trigger = "backlight";
1050			led-max-microamp = <20000>;
1051		};
1052	};
1053
1054	touchscreen@38 {
1055		compatible = "edt,edt-ft5506";
1056		reg = <0x38>;
1057		pinctrl-names = "default";
1058		pinctrl-0 = <&pinctrl_touch>;
1059		interrupt-parent = <&gpio1>;
1060		interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
1061		touchscreen-size-x = <720>;
1062		touchscreen-size-y = <1440>;
1063		vcc-supply = <&reg_lcd_1v8>;
1064	};
1065};
1066
1067&i2c4 {
1068	clock-frequency = <387000>;
1069	pinctrl-names = "default";
1070	pinctrl-0 = <&pinctrl_i2c4>;
1071	status = "okay";
1072
1073	bat: fuel-gauge@36 {
1074		compatible = "maxim,max17055";
1075		reg = <0x36>;
1076		interrupt-parent = <&gpio3>;
1077		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1078		pinctrl-names = "default";
1079		pinctrl-0 = <&pinctrl_gauge>;
1080		maxim,over-heat-temp = <700>;
1081		maxim,over-volt = <4500>;
1082		maxim,rsns-microohm = <5000>;
1083	};
1084
1085	bq25895: charger@6a {
1086		compatible = "ti,bq25895", "ti,bq25890";
1087		reg = <0x6a>;
1088		pinctrl-names = "default";
1089		pinctrl-0 = <&pinctrl_charger_in>;
1090		interrupt-parent = <&gpio3>;
1091		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1092		phys = <&usb3_phy0>;
1093		ti,precharge-current = <130000>; /* uA */
1094		ti,minimum-sys-voltage = <3700000>; /* uV */
1095		ti,boost-voltage = <5000000>; /* uV */
1096		ti,boost-max-current = <1500000>; /* uA */
1097		ti,use-vinmin-threshold = <1>; /* enable VINDPM */
1098		ti,vinmin-threshold = <3900000>; /* uV */
1099		monitored-battery = <&bat>;
1100		power-supplies = <&typec_pd>;
1101	};
1102};
1103
1104&lcdif {
1105	status = "okay";
1106};
1107
1108&mipi_csi1 {
1109	#address-cells = <1>;
1110	#size-cells = <0>;
1111	status = "okay";
1112
1113	ports {
1114		port@0 {
1115			reg = <0>;
1116
1117			mipi1_sensor_ep: endpoint {
1118				remote-endpoint = <&camera1_ep>;
1119				data-lanes = <1 2>;
1120			};
1121		};
1122	};
1123};
1124
1125&mipi_dsi {
1126	#address-cells = <1>;
1127	#size-cells = <0>;
1128	status = "okay";
1129
1130	lcd_panel: panel@0 {
1131		compatible = "mantix,mlaf057we51-x";
1132		reg = <0>;
1133		pinctrl-names = "default";
1134		pinctrl-0 = <&pinctrl_dsirst>;
1135		avdd-supply = <&reg_lcd_avdd>;
1136		avee-supply = <&reg_lcd_avee>;
1137		vddi-supply = <&reg_lcd_1v8>;
1138		backlight = <&backlight_dsi>;
1139		reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
1140		mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
1141
1142		port {
1143			panel_in: endpoint {
1144				remote-endpoint = <&mipi_dsi_out>;
1145			};
1146		};
1147	};
1148
1149	ports {
1150		port@1 {
1151			reg = <1>;
1152
1153			mipi_dsi_out: endpoint {
1154				remote-endpoint = <&panel_in>;
1155			};
1156		};
1157	};
1158};
1159
1160&pgc_gpu {
1161	power-supply = <&buck3_reg>;
1162};
1163
1164&pgc_mipi {
1165	power-supply = <&ldo5_reg>;
1166};
1167
1168&pgc_vpu {
1169	power-supply = <&buck4_reg>;
1170};
1171
1172&pwm1 {
1173	pinctrl-names = "default";
1174	pinctrl-0 = <&pinctrl_haptic>;
1175	status = "okay";
1176};
1177
1178&pwm2 {
1179	pinctrl-names = "default";
1180	pinctrl-0 = <&pinctrl_led_b>;
1181	status = "okay";
1182};
1183
1184&pwm3 {
1185	pinctrl-names = "default";
1186	pinctrl-0 = <&pinctrl_led_r>;
1187	status = "okay";
1188};
1189
1190&pwm4 {
1191	pinctrl-names = "default";
1192	pinctrl-0 = <&pinctrl_led_g>;
1193	status = "okay";
1194};
1195
1196&sai2 {
1197	pinctrl-names = "default";
1198	pinctrl-0 = <&pinctrl_sai2>;
1199	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1200	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1201	assigned-clock-rates = <24576000>;
1202	status = "okay";
1203};
1204
1205&sai6 {
1206	pinctrl-names = "default";
1207	pinctrl-0 = <&pinctrl_sai6>;
1208	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1209	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1210	assigned-clock-rates = <24576000>;
1211	fsl,sai-synchronous-rx;
1212	status = "okay";
1213};
1214
1215&snvs_pwrkey {
1216	status = "okay";
1217};
1218
1219&snvs_rtc {
1220	status = "disabled";
1221};
1222
1223&uart1 { /* console */
1224	pinctrl-names = "default";
1225	pinctrl-0 = <&pinctrl_uart1>;
1226	status = "okay";
1227};
1228
1229&uart2 { /* TPS - GPS - DEBUG */
1230	pinctrl-names = "default";
1231	pinctrl-0 = <&pinctrl_uart2>;
1232	status = "okay";
1233
1234	gnss {
1235		compatible = "globaltop,pa6h";
1236		vcc-supply = <&reg_gnss>;
1237		current-speed = <9600>;
1238	};
1239};
1240
1241&uart3 { /* SMC */
1242	pinctrl-names = "default";
1243	pinctrl-0 = <&pinctrl_uart3>;
1244	status = "okay";
1245};
1246
1247&uart4 { /* BT */
1248	pinctrl-names = "default";
1249	pinctrl-0 = <&pinctrl_uart4>;
1250	uart-has-rtscts;
1251	status = "okay";
1252};
1253
1254&usb3_phy0 {
1255	status = "okay";
1256};
1257
1258&usb3_phy1 {
1259	vbus-supply = <&reg_hub>;
1260	status = "okay";
1261};
1262
1263&usb_dwc3_0 {
1264	#address-cells = <1>;
1265	#size-cells = <0>;
1266	dr_mode = "otg";
1267	snps,dis_u3_susphy_quirk;
1268	status = "okay";
1269
1270	port@0 {
1271		reg = <0>;
1272
1273		typec_hs: endpoint {
1274			remote-endpoint = <&usb_con_hs>;
1275		};
1276	};
1277
1278	port@1 {
1279		reg = <1>;
1280
1281		typec_ss: endpoint {
1282			remote-endpoint = <&usb_con_ss>;
1283		};
1284	};
1285};
1286
1287&usb_dwc3_1 {
1288	dr_mode = "host";
1289	status = "okay";
1290	#address-cells = <1>;
1291	#size-cells = <0>;
1292
1293	/* Microchip USB2642 */
1294	hub@1 {
1295		compatible = "usb424,2640";
1296		reg = <1>;
1297		#address-cells = <1>;
1298		#size-cells = <0>;
1299
1300		mass-storage@1 {
1301			compatible = "usb424,4041";
1302			reg = <1>;
1303		};
1304	};
1305};
1306
1307&usdhc1 {
1308	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1309	assigned-clock-rates = <400000000>;
1310	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1311	pinctrl-0 = <&pinctrl_usdhc1>;
1312	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1313	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1314	bus-width = <8>;
1315	vmmc-supply = <&reg_vdd_3v3>;
1316	power-supply = <&reg_vdd_1v8>;
1317	non-removable;
1318	status = "okay";
1319};
1320
1321&usdhc2 {
1322	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1323	assigned-clock-rates = <200000000>;
1324	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1325	pinctrl-0 = <&pinctrl_usdhc2>;
1326	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1327	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1328	bus-width = <4>;
1329	vmmc-supply = <&reg_wifi_3v3>;
1330	mmc-pwrseq = <&usdhc2_pwrseq>;
1331	post-power-on-delay-ms = <1000>;
1332	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1333	max-frequency = <50000000>;
1334	disable-wp;
1335	cap-sdio-irq;
1336	keep-power-in-suspend;
1337	wakeup-source;
1338	status = "okay";
1339};
1340
1341&wdog1 {
1342	pinctrl-names = "default";
1343	pinctrl-0 = <&pinctrl_wdog>;
1344	fsl,ext-reset-output;
1345	status = "okay";
1346};
1347