1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2019 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include "dt-bindings/pwm/pwm.h"
10#include "dt-bindings/usb/pd.h"
11#include "imx8mq.dtsi"
12
13/ {
14	model = "Purism Librem 5 devkit";
15	compatible = "purism,librem5-devkit", "fsl,imx8mq";
16
17	backlight_dsi: backlight-dsi {
18		compatible = "pwm-backlight";
19		/* 200 Hz for the PAM2841 */
20		pwms = <&pwm1 0 5000000>;
21		brightness-levels = <0 100>;
22		num-interpolated-steps = <100>;
23		/* Default brightness level (index into the array defined by */
24		/* the "brightness-levels" property) */
25		default-brightness-level = <0>;
26		power-supply = <&reg_22v4_p>;
27	};
28
29	chosen {
30		stdout-path = &uart1;
31	};
32
33	gpio-keys {
34		compatible = "gpio-keys";
35		pinctrl-names = "default";
36		pinctrl-0 = <&pinctrl_gpio_keys>;
37
38		btn1 {
39			label = "VOL_UP";
40			gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
41			wakeup-source;
42			linux,code = <KEY_VOLUMEUP>;
43		};
44
45		btn2 {
46			label = "VOL_DOWN";
47			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
48			wakeup-source;
49			linux,code = <KEY_VOLUMEDOWN>;
50		};
51
52		hp-det {
53			label = "HP_DET";
54			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
55			wakeup-source;
56			linux,code = <KEY_HP>;
57		};
58	};
59
60	leds {
61		compatible = "gpio-leds";
62		pinctrl-names = "default";
63		pinctrl-0 = <&pinctrl_gpio_leds>;
64
65		led1 {
66			label = "LED 1";
67			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
68			default-state = "off";
69		};
70	};
71
72	pmic_osc: clock-pmic {
73		compatible = "fixed-clock";
74		#clock-cells = <0>;
75		clock-frequency = <32768>;
76		clock-output-names = "pmic_osc";
77	};
78
79	reg_1v8_p: regulator-1v8-p {
80		compatible = "regulator-fixed";
81		regulator-name = "1v8_p";
82		regulator-min-microvolt = <1800000>;
83		regulator-max-microvolt = <1800000>;
84		vin-supply = <&reg_pwr_en>;
85	};
86
87	reg_2v8_p: regulator-2v8-p {
88		compatible = "regulator-fixed";
89		regulator-name = "2v8_p";
90		regulator-min-microvolt = <2800000>;
91		regulator-max-microvolt = <2800000>;
92		vin-supply = <&reg_pwr_en>;
93	};
94
95	reg_3v3_p: regulator-3v3-p {
96		compatible = "regulator-fixed";
97		regulator-name = "3v3_p";
98		regulator-min-microvolt = <3300000>;
99		regulator-max-microvolt = <3300000>;
100		vin-supply = <&reg_pwr_en>;
101
102		regulator-state-mem {
103			regulator-on-in-suspend;
104		};
105	};
106
107	reg_5v_p: regulator-5v-p {
108		compatible = "regulator-fixed";
109		regulator-name = "5v_p";
110		regulator-min-microvolt = <5000000>;
111		regulator-max-microvolt = <5000000>;
112		vin-supply = <&reg_pwr_en>;
113
114		regulator-state-mem {
115			regulator-on-in-suspend;
116		};
117	};
118
119	reg_22v4_p: regulator-22v4-p  {
120		compatible = "regulator-fixed";
121		regulator-name = "22v4_P";
122		regulator-min-microvolt = <22400000>;
123		regulator-max-microvolt = <22400000>;
124		vin-supply = <&reg_pwr_en>;
125	};
126
127	reg_pwr_en: regulator-pwr-en {
128		compatible = "regulator-fixed";
129		pinctrl-names = "default";
130		pinctrl-0 = <&pinctrl_pwr_en>;
131		regulator-name = "PWR_EN";
132		regulator-min-microvolt = <3300000>;
133		regulator-max-microvolt = <3300000>;
134		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
135		enable-active-high;
136		regulator-always-on;
137	};
138
139	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
140		compatible = "regulator-fixed";
141		pinctrl-names = "default";
142		pinctrl-0 = <&pinctrl_usdhc2_pwr>;
143		regulator-name = "VSD_3V3";
144		regulator-min-microvolt = <3300000>;
145		regulator-max-microvolt = <3300000>;
146		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
147		enable-active-high;
148		regulator-always-on;
149	};
150
151	vibrator {
152		compatible = "gpio-vibrator";
153		pinctrl-names = "default";
154		pinctrl-0 = <&pinctrl_haptic>;
155	        enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
156		vcc-supply = <&reg_3v3_p>;
157	};
158
159	wifi_pwr_en: regulator-wifi-en {
160		compatible = "regulator-fixed";
161		pinctrl-names = "default";
162		pinctrl-0 = <&pinctrl_wifi_pwr_en>;
163		regulator-name = "WIFI_EN";
164		regulator-min-microvolt = <3300000>;
165		regulator-max-microvolt = <3300000>;
166		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
167		enable-active-high;
168		regulator-always-on;
169	};
170};
171
172&clk {
173	assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>;
174	assigned-clock-rates = <786432000>, <722534400>;
175};
176
177&dphy {
178	status = "okay";
179};
180
181&fec1 {
182	pinctrl-names = "default";
183	pinctrl-0 = <&pinctrl_fec1>;
184	phy-mode = "rgmii-id";
185	phy-handle = <&ethphy0>;
186	fsl,magic-packet;
187	phy-supply = <&reg_3v3_p>;
188	status = "okay";
189
190	mdio {
191		#address-cells = <1>;
192		#size-cells = <0>;
193
194		ethphy0: ethernet-phy@1 {
195			compatible = "ethernet-phy-ieee802.3-c22";
196			reg = <1>;
197		};
198	};
199};
200
201&i2c1 {
202	clock-frequency = <100000>;
203	pinctrl-names = "default";
204	pinctrl-0 = <&pinctrl_i2c1>;
205	status = "okay";
206
207	pmic: pmic@4b {
208		compatible = "rohm,bd71837";
209		reg = <0x4b>;
210		pinctrl-names = "default";
211		pinctrl-0 = <&pinctrl_pmic>;
212		clocks = <&pmic_osc>;
213		clock-names = "osc";
214		clock-output-names = "pmic_clk";
215		interrupt-parent = <&gpio1>;
216		interrupts = <3 GPIO_ACTIVE_LOW>;
217		interrupt-names = "irq";
218		rohm,reset-snvs-powered;
219
220		regulators {
221			buck1_reg: BUCK1 {
222				regulator-name = "buck1";
223				regulator-min-microvolt = <700000>;
224				regulator-max-microvolt = <1300000>;
225				regulator-boot-on;
226				regulator-ramp-delay = <1250>;
227				rohm,dvs-run-voltage = <900000>;
228				rohm,dvs-idle-voltage = <850000>;
229				rohm,dvs-suspend-voltage = <800000>;
230			};
231
232			buck2_reg: BUCK2 {
233				regulator-name = "buck2";
234				regulator-min-microvolt = <700000>;
235				regulator-max-microvolt = <1300000>;
236				regulator-boot-on;
237				regulator-ramp-delay = <1250>;
238				rohm,dvs-run-voltage = <1000000>;
239				rohm,dvs-idle-voltage = <900000>;
240			};
241
242			buck3_reg: BUCK3 {
243				regulator-name = "buck3";
244				regulator-min-microvolt = <700000>;
245				regulator-max-microvolt = <1300000>;
246				regulator-boot-on;
247				rohm,dvs-run-voltage = <1000000>;
248			};
249
250			buck4_reg: BUCK4 {
251				regulator-name = "buck4";
252				regulator-min-microvolt = <700000>;
253				regulator-max-microvolt = <1300000>;
254				rohm,dvs-run-voltage = <1000000>;
255			};
256
257			buck5_reg: BUCK5 {
258				regulator-name = "buck5";
259				regulator-min-microvolt = <700000>;
260				regulator-max-microvolt = <1350000>;
261				regulator-boot-on;
262			};
263
264			buck6_reg: BUCK6 {
265				regulator-name = "buck6";
266				regulator-min-microvolt = <3000000>;
267				regulator-max-microvolt = <3300000>;
268				regulator-boot-on;
269			};
270
271			buck7_reg: BUCK7 {
272				regulator-name = "buck7";
273				regulator-min-microvolt = <1605000>;
274				regulator-max-microvolt = <1995000>;
275				regulator-boot-on;
276			};
277
278			buck8_reg: BUCK8 {
279				regulator-name = "buck8";
280				regulator-min-microvolt = <800000>;
281				regulator-max-microvolt = <1400000>;
282				regulator-boot-on;
283			};
284
285			ldo1_reg: LDO1 {
286				regulator-name = "ldo1";
287				regulator-min-microvolt = <3000000>;
288				regulator-max-microvolt = <3300000>;
289				regulator-boot-on;
290				/* leave on for snvs power button */
291				regulator-always-on;
292			};
293
294			ldo2_reg: LDO2 {
295				regulator-name = "ldo2";
296				regulator-min-microvolt = <900000>;
297				regulator-max-microvolt = <900000>;
298				regulator-boot-on;
299				/* leave on for snvs power button */
300				regulator-always-on;
301			};
302
303			ldo3_reg: LDO3 {
304				regulator-name = "ldo3";
305				regulator-min-microvolt = <1800000>;
306				regulator-max-microvolt = <3300000>;
307				regulator-boot-on;
308			};
309
310			ldo4_reg: LDO4 {
311				regulator-name = "ldo4";
312				regulator-min-microvolt = <900000>;
313				regulator-max-microvolt = <1800000>;
314				regulator-boot-on;
315			};
316
317			ldo5_reg: LDO5 {
318				regulator-name = "ldo5";
319				regulator-min-microvolt = <1800000>;
320				regulator-max-microvolt = <3300000>;
321			};
322
323			ldo6_reg: LDO6 {
324				regulator-name = "ldo6";
325				regulator-min-microvolt = <900000>;
326				regulator-max-microvolt = <1800000>;
327				regulator-boot-on;
328			};
329
330			ldo7_reg: LDO7 {
331				regulator-name = "ldo7";
332				regulator-min-microvolt = <1800000>;
333				regulator-max-microvolt = <3300000>;
334				regulator-boot-on;
335			};
336		};
337	};
338
339	typec_ptn5100: usb_typec@52 {
340		compatible = "nxp,ptn5110";
341		reg = <0x52>;
342		pinctrl-names = "default";
343		pinctrl-0 = <&pinctrl_typec>;
344		interrupt-parent = <&gpio3>;
345		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
346
347		connector {
348			compatible = "usb-c-connector";
349			label = "USB-C";
350			data-role = "dual";
351			power-role = "dual";
352			try-power-role = "sink";
353			source-pdos = <PDO_FIXED(5000, 2000,
354				PDO_FIXED_USB_COMM |
355				PDO_FIXED_DUAL_ROLE |
356				PDO_FIXED_DATA_SWAP )>;
357			sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM |
358				PDO_FIXED_DUAL_ROLE |
359				PDO_FIXED_DATA_SWAP )
360			     PDO_VAR(5000, 3000, 3000)>;
361			op-sink-microwatt = <10000000>;
362
363			ports {
364				#address-cells = <1>;
365				#size-cells = <0>;
366
367				port@0 {
368					reg = <0>;
369
370					usb_con_hs: endpoint {
371						remote-endpoint = <&typec_hs>;
372					};
373				};
374
375				port@1 {
376					reg = <1>;
377
378					usb_con_ss: endpoint {
379						remote-endpoint = <&typec_ss>;
380					};
381				};
382			};
383		};
384	};
385
386	rtc@68 {
387		compatible = "microcrystal,rv4162";
388		reg = <0x68>;
389		pinctrl-names = "default";
390		pinctrl-0 = <&pinctrl_rtc>;
391		interrupt-parent = <&gpio4>;
392		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
393	};
394
395	charger@6b { /* bq25896 */
396		compatible = "ti,bq25890";
397		reg = <0x6b>;
398		pinctrl-names = "default";
399		pinctrl-0 = <&pinctrl_charger>;
400		interrupt-parent = <&gpio3>;
401		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
402		ti,battery-regulation-voltage = <4192000>; /* 4.192V */
403		ti,charge-current = <1600000>; /* 1.6A */
404		ti,termination-current = <66000>;  /* 66mA */
405		ti,precharge-current = <130000>; /* 130mA */
406		ti,minimum-sys-voltage = <3000000>; /* 3V */
407		ti,boost-voltage = <5000000>; /* 5V */
408		ti,boost-max-current = <50000>; /* 50mA */
409	};
410};
411
412&i2c3 {
413	clock-frequency = <100000>;
414	pinctrl-names = "default";
415	pinctrl-0 = <&pinctrl_i2c3>;
416	status = "okay";
417
418	magnetometer@1e	{
419		compatible = "st,lsm9ds1-magn";
420		reg = <0x1e>;
421		pinctrl-names = "default";
422		pinctrl-0 = <&pinctrl_imu>;
423		interrupt-parent = <&gpio3>;
424		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
425		vdd-supply = <&reg_3v3_p>;
426		vddio-supply = <&reg_3v3_p>;
427	};
428
429	touchscreen@5d {
430		compatible = "goodix,gt5688";
431		reg = <0x5d>;
432		pinctrl-names = "default";
433		pinctrl-0 = <&pinctrl_ts>;
434		interrupt-parent = <&gpio3>;
435		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
436		reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
437		irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
438		touchscreen-size-x = <720>;
439		touchscreen-size-y = <1440>;
440		AVDD28-supply = <&reg_2v8_p>;
441		VDDIO-supply = <&reg_1v8_p>;
442	};
443
444	accel-gyro@6a {
445		compatible = "st,lsm9ds1-imu";
446		reg = <0x6a>;
447		vdd-supply = <&reg_3v3_p>;
448		vddio-supply = <&reg_3v3_p>;
449	};
450};
451
452&iomuxc {
453	pinctrl_bl: blgrp {
454		fsl,pins = <
455			MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT	0x6 /* DSI_BL_PWM */
456		>;
457	};
458
459	pinctrl_bt: btgrp {
460		fsl,pins = <
461			MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11	0x16 /* nBT_DISABLE */
462			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x10 /* BT_HOST_WAKE */
463		>;
464	};
465
466	pinctrl_charger: chargergrp {
467		fsl,pins = <
468			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x80 /* CHRG_nINT */
469		>;
470	};
471
472	pinctrl_fec1: fec1grp {
473		fsl,pins = <
474			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
475			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
476			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
477			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
478			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
479			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
480			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
481			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
482			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
483			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
484			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
485			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
486			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
487			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
488			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
489			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
490		>;
491	};
492
493	pinctrl_ts: tsgrp {
494		fsl,pins = <
495			MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0		0x16  /* TOUCH INT */
496			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x19  /* TOUCH RST */
497		>;
498	};
499
500	pinctrl_gpio_leds: gpioledgrp {
501		fsl,pins = <
502			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
503		>;
504	};
505
506	pinctrl_gpio_keys: gpiokeygrp {
507		fsl,pins = <
508			MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21	0x16
509			MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22	0x16
510			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x180  /* HP_DET */
511		>;
512	};
513
514	pinctrl_haptic: hapticgrp {
515		fsl,pins = <
516			MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4		0xc6   /* nHAPTIC */
517		>;
518	};
519
520	pinctrl_i2c1: i2c1grp {
521		fsl,pins = <
522			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x4000001f
523			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x4000001f
524		>;
525	};
526
527	pinctrl_i2c3: i2c3grp {
528		fsl,pins = <
529			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x4000001f
530			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x4000001f
531		>;
532	};
533
534	pinctrl_imu: imugrp {
535		fsl,pins = <
536			MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19	0x8  /* IMU_INT */
537		>;
538	};
539
540	pinctrl_pmic: pmicgrp {
541		fsl,pins = <
542			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x80  /* PMIC intr */
543		>;
544	};
545
546	pinctrl_pwr_en: pwrengrp {
547		fsl,pins = <
548			MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x06
549		>;
550	};
551
552	pinctrl_rtc: rtcgrp {
553		fsl,pins = <
554			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x80  /* RTC intr */
555		>;
556	};
557
558	pinctrl_typec: typecgrp {
559		fsl,pins = <
560			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12		0x16
561			MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1		0x80
562		>;
563	};
564
565	pinctrl_uart1: uart1grp {
566		fsl,pins = <
567			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
568			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
569		>;
570	};
571
572	pinctrl_uart2: uart2grp {
573		fsl,pins = <
574			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
575			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
576			MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
577			MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
578		>;
579	};
580
581	pinctrl_uart3: uart3grp {
582		fsl,pins = <
583			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
584			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
585		>;
586	};
587
588	pinctrl_uart4: uart4grp {
589		fsl,pins = <
590			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
591			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
592			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
593			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
594			MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x49
595		>;
596	};
597
598	pinctrl_usdhc1: usdhc1grp {
599		fsl,pins = <
600			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
601			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
602			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
603			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
604			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
605			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
606			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
607			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
608			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
609			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
610			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
611			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
612		>;
613	};
614
615	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
616		fsl,pins = <
617			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
618			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
619			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
620			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
621			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
622			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
623			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
624			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
625			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
626			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
627			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
628			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
629		>;
630	};
631
632	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
633		fsl,pins = <
634			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
635			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
636			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
637			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
638			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
639			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
640			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
641			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
642			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
643			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
644			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
645			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
646		>;
647	};
648
649	pinctrl_usdhc2_pwr: usdhc2grppwr {
650		fsl,pins = <
651			MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
652		>;
653	};
654
655	pinctrl_usdhc2_gpio: usdhc2grpgpio {
656		fsl,pins = <
657			MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20		0x80 /* WIFI_WAKE */
658		>;
659	};
660
661	pinctrl_usdhc2: usdhc2grp {
662		fsl,pins = <
663			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
664			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
665			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
666			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
667			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
668			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
669		>;
670	};
671
672	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
673		fsl,pins = <
674			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
675			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
676			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
677			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
678			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
679			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
680		>;
681	};
682
683	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
684		fsl,pins = <
685			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
686			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
687			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
688			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
689			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
690			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
691		>;
692	};
693
694	pinctrl_wdog: wdoggrp {
695		fsl,pins = <
696			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0xc6
697		>;
698	};
699
700	pinctrl_wifi_pwr_en: wifipwrengrp {
701		fsl,pins = <
702			MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5         0x06
703		>;
704	};
705
706	pinctrl_wwan: wwangrp {
707		fsl,pins = <
708			MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4	0x09 /* nWWAN_DISABLE */
709			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80 /* nWoWWAN */
710			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19 /* WWAN_RESET */
711		>;
712	};
713};
714
715&pgc_gpu {
716	power-supply = <&buck3_reg>;
717};
718
719&pgc_vpu {
720	power-supply = <&buck4_reg>;
721};
722
723&pwm1 {
724	pinctrl-names = "default";
725	pinctrl-0 = <&pinctrl_bl>;
726	status = "okay";
727};
728
729&snvs_pwrkey {
730	status = "okay";
731};
732
733&uart1 { /* console */
734	pinctrl-names = "default";
735	pinctrl-0 = <&pinctrl_uart1>;
736	status = "okay";
737};
738
739&uart3 { /* GNSS */
740	pinctrl-names = "default";
741	pinctrl-0 = <&pinctrl_uart3>;
742	status = "okay";
743};
744
745&uart4 { /* BT */
746	pinctrl-names = "default";
747	pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
748	uart-has-rtscts;
749	status = "okay";
750};
751
752&usb3_phy0 {
753	status = "okay";
754};
755
756&usb3_phy1 {
757	vbus-supply = <&reg_5v_p>;
758	status = "okay";
759};
760
761&usb_dwc3_0 {
762	#address-cells = <1>;
763	#size-cells = <0>;
764	dr_mode = "otg";
765	status = "okay";
766
767	port@0 {
768		reg = <0>;
769
770		typec_hs: endpoint {
771			remote-endpoint = <&usb_con_hs>;
772		};
773	};
774
775	port@1 {
776		reg = <1>;
777
778		typec_ss: endpoint {
779			remote-endpoint = <&usb_con_ss>;
780		};
781	};
782};
783
784&usb_dwc3_1 {
785	dr_mode = "host";
786	status = "okay";
787};
788
789&usdhc1 {
790	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
791	assigned-clock-rates = <400000000>;
792	pinctrl-names = "default", "state_100mhz", "state_200mhz";
793	pinctrl-0 = <&pinctrl_usdhc1>;
794	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
795	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
796	bus-width = <8>;
797	non-removable;
798	status = "okay";
799};
800
801&usdhc2 {
802	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
803	assigned-clock-rates = <200000000>;
804	pinctrl-names = "default", "state_100mhz", "state_200mhz";
805	pinctrl-0 = <&pinctrl_usdhc2>;
806	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
807	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
808	bus-width = <4>;
809	vmmc-supply = <&reg_usdhc2_vmmc>;
810	power-supply = <&wifi_pwr_en>;
811	non-removable;
812	disable-wp;
813	cap-sdio-irq;
814	keep-power-in-suspend;
815	wakeup-source;
816	status = "okay";
817};
818
819&wdog1 {
820	pinctrl-names = "default";
821	pinctrl-0 = <&pinctrl_wdog>;
822	fsl,ext-reset-output;
823	status = "okay";
824};
825