1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2019 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include "dt-bindings/pwm/pwm.h"
11#include "dt-bindings/usb/pd.h"
12#include "imx8mq.dtsi"
13
14/ {
15	model = "Purism Librem 5 devkit";
16	compatible = "purism,librem5-devkit", "fsl,imx8mq";
17
18	backlight_dsi: backlight-dsi {
19		compatible = "pwm-backlight";
20		/* 200 Hz for the PAM2841 */
21		pwms = <&pwm1 0 5000000>;
22		brightness-levels = <0 100>;
23		num-interpolated-steps = <100>;
24		/* Default brightness level (index into the array defined by */
25		/* the "brightness-levels" property) */
26		default-brightness-level = <0>;
27		power-supply = <&reg_22v4_p>;
28	};
29
30	chosen {
31		stdout-path = &uart1;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36		pinctrl-names = "default";
37		pinctrl-0 = <&pinctrl_gpio_keys>;
38
39		btn1 {
40			label = "VOL_UP";
41			gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
42			wakeup-source;
43			linux,code = <KEY_VOLUMEUP>;
44		};
45
46		btn2 {
47			label = "VOL_DOWN";
48			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
49			wakeup-source;
50			linux,code = <KEY_VOLUMEDOWN>;
51		};
52
53		hp-det {
54			label = "HP_DET";
55			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
56			wakeup-source;
57			linux,code = <KEY_HP>;
58		};
59
60		wwan-wake {
61			label = "WWAN_WAKE";
62			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
63			interrupt-parent = <&gpio3>;
64			interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
65			wakeup-source;
66			linux,code = <KEY_PHONE>;
67		};
68	};
69
70	leds {
71		compatible = "gpio-leds";
72		pinctrl-names = "default";
73		pinctrl-0 = <&pinctrl_gpio_leds>;
74
75		led1 {
76			label = "LED 1";
77			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
78			default-state = "off";
79		};
80	};
81
82	pmic_osc: clock-pmic {
83		compatible = "fixed-clock";
84		#clock-cells = <0>;
85		clock-frequency = <32768>;
86		clock-output-names = "pmic_osc";
87	};
88
89	reg_1v8_p: regulator-1v8-p {
90		compatible = "regulator-fixed";
91		regulator-name = "1v8_p";
92		regulator-min-microvolt = <1800000>;
93		regulator-max-microvolt = <1800000>;
94		vin-supply = <&reg_pwr_en>;
95	};
96
97	reg_2v8_p: regulator-2v8-p {
98		compatible = "regulator-fixed";
99		regulator-name = "2v8_p";
100		regulator-min-microvolt = <2800000>;
101		regulator-max-microvolt = <2800000>;
102		vin-supply = <&reg_pwr_en>;
103	};
104
105	reg_3v3_p: regulator-3v3-p {
106		compatible = "regulator-fixed";
107		regulator-name = "3v3_p";
108		regulator-min-microvolt = <3300000>;
109		regulator-max-microvolt = <3300000>;
110		vin-supply = <&reg_pwr_en>;
111
112		regulator-state-mem {
113			regulator-on-in-suspend;
114		};
115	};
116
117	reg_5v_p: regulator-5v-p {
118		compatible = "regulator-fixed";
119		regulator-name = "5v_p";
120		regulator-min-microvolt = <5000000>;
121		regulator-max-microvolt = <5000000>;
122		vin-supply = <&reg_pwr_en>;
123
124		regulator-state-mem {
125			regulator-on-in-suspend;
126		};
127	};
128
129	reg_22v4_p: regulator-22v4-p  {
130		compatible = "regulator-fixed";
131		regulator-name = "22v4_P";
132		regulator-min-microvolt = <22400000>;
133		regulator-max-microvolt = <22400000>;
134		vin-supply = <&reg_pwr_en>;
135	};
136
137	reg_pwr_en: regulator-pwr-en {
138		compatible = "regulator-fixed";
139		pinctrl-names = "default";
140		pinctrl-0 = <&pinctrl_pwr_en>;
141		regulator-name = "PWR_EN";
142		regulator-min-microvolt = <3300000>;
143		regulator-max-microvolt = <3300000>;
144		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
145		enable-active-high;
146		regulator-always-on;
147	};
148
149	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
150		compatible = "regulator-fixed";
151		pinctrl-names = "default";
152		pinctrl-0 = <&pinctrl_usdhc2_pwr>;
153		regulator-name = "VSD_3V3";
154		regulator-min-microvolt = <3300000>;
155		regulator-max-microvolt = <3300000>;
156		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
157		enable-active-high;
158		regulator-always-on;
159	};
160
161	wwan_codec: sound-wwan-codec {
162		compatible = "option,gtm601";
163		#sound-dai-cells = <0>;
164	};
165
166	sound {
167		compatible = "simple-audio-card";
168		simple-audio-card,name = "sgtl5000";
169		simple-audio-card,format = "i2s";
170		simple-audio-card,widgets =
171			"Microphone", "Microphone Jack",
172			"Headphone", "Headphone Jack",
173			"Speaker", "Speaker Ext",
174			"Line", "Line In Jack";
175		simple-audio-card,routing =
176			"MIC_IN", "Microphone Jack",
177			"Microphone Jack", "Mic Bias",
178			"LINE_IN", "Line In Jack",
179			"Headphone Jack", "HP_OUT",
180			"Speaker Ext", "LINE_OUT";
181
182		simple-audio-card,cpu {
183			sound-dai = <&sai2>;
184		};
185
186		simple-audio-card,codec {
187			sound-dai = <&sgtl5000>;
188			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
189			frame-master;
190			bitclock-master;
191		};
192	};
193
194	sound-wwan {
195		compatible = "simple-audio-card";
196		simple-audio-card,name = "SIMCom SIM7100";
197		simple-audio-card,format = "dsp_a";
198
199		simple-audio-card,cpu {
200			sound-dai = <&sai6>;
201		};
202
203		telephony_link_master: simple-audio-card,codec {
204			sound-dai = <&wwan_codec>;
205			frame-master;
206			bitclock-master;
207		};
208	};
209
210	vibrator {
211		compatible = "gpio-vibrator";
212		pinctrl-names = "default";
213		pinctrl-0 = <&pinctrl_haptic>;
214	        enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
215		vcc-supply = <&reg_3v3_p>;
216	};
217
218	wifi_pwr_en: regulator-wifi-en {
219		compatible = "regulator-fixed";
220		pinctrl-names = "default";
221		pinctrl-0 = <&pinctrl_wifi_pwr_en>;
222		regulator-name = "WIFI_EN";
223		regulator-min-microvolt = <3300000>;
224		regulator-max-microvolt = <3300000>;
225		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
226		enable-active-high;
227		regulator-always-on;
228	};
229};
230
231&A53_0 {
232	cpu-supply = <&buck2_reg>;
233};
234
235&A53_1 {
236	cpu-supply = <&buck2_reg>;
237};
238
239&A53_2 {
240	cpu-supply = <&buck2_reg>;
241};
242
243&A53_3 {
244	cpu-supply = <&buck2_reg>;
245};
246
247&dphy {
248	status = "okay";
249};
250
251&fec1 {
252	pinctrl-names = "default";
253	pinctrl-0 = <&pinctrl_fec1>;
254	phy-mode = "rgmii-id";
255	phy-handle = <&ethphy0>;
256	fsl,magic-packet;
257	phy-supply = <&reg_3v3_p>;
258	status = "okay";
259
260	mdio {
261		#address-cells = <1>;
262		#size-cells = <0>;
263
264		ethphy0: ethernet-phy@1 {
265			compatible = "ethernet-phy-ieee802.3-c22";
266			reg = <1>;
267		};
268	};
269};
270
271&i2c1 {
272	clock-frequency = <100000>;
273	pinctrl-names = "default";
274	pinctrl-0 = <&pinctrl_i2c1>;
275	status = "okay";
276
277	pmic: pmic@4b {
278		compatible = "rohm,bd71837";
279		reg = <0x4b>;
280		pinctrl-names = "default";
281		pinctrl-0 = <&pinctrl_pmic>;
282		clocks = <&pmic_osc>;
283		clock-names = "osc";
284		#clock-cells = <0>;
285		clock-output-names = "pmic_clk";
286		interrupt-parent = <&gpio1>;
287		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
288		rohm,reset-snvs-powered;
289
290		regulators {
291			buck1_reg: BUCK1 {
292				regulator-name = "buck1";
293				regulator-min-microvolt = <700000>;
294				regulator-max-microvolt = <1300000>;
295				regulator-boot-on;
296				regulator-always-on;
297				regulator-ramp-delay = <1250>;
298				rohm,dvs-run-voltage = <900000>;
299				rohm,dvs-idle-voltage = <850000>;
300				rohm,dvs-suspend-voltage = <800000>;
301			};
302
303			buck2_reg: BUCK2 {
304				regulator-name = "buck2";
305				regulator-min-microvolt = <700000>;
306				regulator-max-microvolt = <1300000>;
307				regulator-boot-on;
308				regulator-ramp-delay = <1250>;
309				rohm,dvs-run-voltage = <1000000>;
310				rohm,dvs-idle-voltage = <900000>;
311			};
312
313			buck3_reg: BUCK3 {
314				regulator-name = "buck3";
315				regulator-min-microvolt = <700000>;
316				regulator-max-microvolt = <1300000>;
317				regulator-boot-on;
318				regulator-enable-ramp-delay = <200>;
319				rohm,dvs-run-voltage = <900000>;
320			};
321
322			buck4_reg: BUCK4 {
323				regulator-name = "buck4";
324				regulator-min-microvolt = <700000>;
325				regulator-max-microvolt = <1300000>;
326				rohm,dvs-run-voltage = <1000000>;
327			};
328
329			buck5_reg: BUCK5 {
330				regulator-name = "buck5";
331				regulator-min-microvolt = <700000>;
332				regulator-max-microvolt = <1350000>;
333				regulator-boot-on;
334				regulator-always-on;
335			};
336
337			buck6_reg: BUCK6 {
338				regulator-name = "buck6";
339				regulator-min-microvolt = <3000000>;
340				regulator-max-microvolt = <3300000>;
341				regulator-boot-on;
342				regulator-always-on;
343			};
344
345			buck7_reg: BUCK7 {
346				regulator-name = "buck7";
347				regulator-min-microvolt = <1605000>;
348				regulator-max-microvolt = <1995000>;
349				regulator-boot-on;
350				regulator-always-on;
351			};
352
353			buck8_reg: BUCK8 {
354				regulator-name = "buck8";
355				regulator-min-microvolt = <800000>;
356				regulator-max-microvolt = <1400000>;
357				regulator-boot-on;
358				regulator-always-on;
359			};
360
361			ldo1_reg: LDO1 {
362				regulator-name = "ldo1";
363				regulator-min-microvolt = <3000000>;
364				regulator-max-microvolt = <3300000>;
365				regulator-boot-on;
366				/* leave on for snvs power button */
367				regulator-always-on;
368			};
369
370			ldo2_reg: LDO2 {
371				regulator-name = "ldo2";
372				regulator-min-microvolt = <900000>;
373				regulator-max-microvolt = <900000>;
374				regulator-boot-on;
375				/* leave on for snvs power button */
376				regulator-always-on;
377			};
378
379			ldo3_reg: LDO3 {
380				regulator-name = "ldo3";
381				regulator-min-microvolt = <1800000>;
382				regulator-max-microvolt = <3300000>;
383				regulator-boot-on;
384				regulator-always-on;
385			};
386
387			ldo4_reg: LDO4 {
388				regulator-name = "ldo4";
389				regulator-min-microvolt = <900000>;
390				regulator-max-microvolt = <1800000>;
391				regulator-boot-on;
392				regulator-always-on;
393			};
394
395			ldo5_reg: LDO5 {
396				regulator-name = "ldo5";
397				regulator-min-microvolt = <1800000>;
398				regulator-max-microvolt = <3300000>;
399				regulator-always-on;
400			};
401
402			ldo6_reg: LDO6 {
403				regulator-name = "ldo6";
404				regulator-min-microvolt = <900000>;
405				regulator-max-microvolt = <1800000>;
406				regulator-boot-on;
407				regulator-always-on;
408			};
409
410			ldo7_reg: LDO7 {
411				regulator-name = "ldo7";
412				regulator-min-microvolt = <1800000>;
413				regulator-max-microvolt = <3300000>;
414				regulator-boot-on;
415				regulator-always-on;
416			};
417		};
418	};
419
420	typec_ptn5100: usb-typec@52 {
421		compatible = "nxp,ptn5110";
422		reg = <0x52>;
423		pinctrl-names = "default";
424		pinctrl-0 = <&pinctrl_typec>;
425		interrupt-parent = <&gpio3>;
426		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
427
428		connector {
429			compatible = "usb-c-connector";
430			label = "USB-C";
431			data-role = "dual";
432			power-role = "dual";
433			try-power-role = "sink";
434			source-pdos = <PDO_FIXED(5000, 2000,
435				PDO_FIXED_USB_COMM |
436				PDO_FIXED_DUAL_ROLE |
437				PDO_FIXED_DATA_SWAP )>;
438			sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM |
439				PDO_FIXED_DUAL_ROLE |
440				PDO_FIXED_DATA_SWAP )
441			     PDO_VAR(5000, 5000, 3500)>;
442			op-sink-microwatt = <10000000>;
443
444			ports {
445				#address-cells = <1>;
446				#size-cells = <0>;
447
448				port@0 {
449					reg = <0>;
450
451					usb_con_hs: endpoint {
452						remote-endpoint = <&typec_hs>;
453					};
454				};
455
456				port@1 {
457					reg = <1>;
458
459					usb_con_ss: endpoint {
460						remote-endpoint = <&typec_ss>;
461					};
462				};
463			};
464		};
465	};
466
467	rtc@68 {
468		compatible = "microcrystal,rv4162";
469		reg = <0x68>;
470		pinctrl-names = "default";
471		pinctrl-0 = <&pinctrl_rtc>;
472		interrupt-parent = <&gpio4>;
473		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
474	};
475
476	charger@6b { /* bq25896 */
477		compatible = "ti,bq25890";
478		reg = <0x6b>;
479		pinctrl-names = "default";
480		pinctrl-0 = <&pinctrl_charger>;
481		interrupt-parent = <&gpio3>;
482		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
483		ti,battery-regulation-voltage = <4192000>; /* 4.192V */
484		ti,charge-current = <1600000>; /* 1.6A */
485		ti,termination-current = <66000>;  /* 66mA */
486		ti,precharge-current = <130000>; /* 130mA */
487		ti,minimum-sys-voltage = <3000000>; /* 3V */
488		ti,boost-voltage = <5000000>; /* 5V */
489		ti,boost-max-current = <50000>; /* 50mA */
490	};
491};
492
493&i2c3 {
494	clock-frequency = <100000>;
495	pinctrl-names = "default";
496	pinctrl-0 = <&pinctrl_i2c3>;
497	status = "okay";
498
499	magnetometer@1e	{
500		compatible = "st,lsm9ds1-magn";
501		reg = <0x1e>;
502		pinctrl-names = "default";
503		pinctrl-0 = <&pinctrl_imu>;
504		interrupt-parent = <&gpio3>;
505		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
506		vdd-supply = <&reg_3v3_p>;
507		vddio-supply = <&reg_3v3_p>;
508	};
509
510	sgtl5000: audio-codec@a {
511		compatible = "fsl,sgtl5000";
512		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
513		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
514		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
515		assigned-clock-rates = <24576000>;
516		#sound-dai-cells = <0>;
517		reg = <0x0a>;
518		VDDD-supply = <&reg_1v8_p>;
519		VDDIO-supply = <&reg_3v3_p>;
520		VDDA-supply = <&reg_3v3_p>;
521	};
522
523	touchscreen@5d {
524		compatible = "goodix,gt5688";
525		reg = <0x5d>;
526		pinctrl-names = "default";
527		pinctrl-0 = <&pinctrl_ts>;
528		interrupt-parent = <&gpio3>;
529		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
530		reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
531		irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
532		touchscreen-size-x = <720>;
533		touchscreen-size-y = <1440>;
534		AVDD28-supply = <&reg_2v8_p>;
535		VDDIO-supply = <&reg_1v8_p>;
536	};
537
538	proximity-sensor@60 {
539		compatible = "vishay,vcnl4040";
540		reg = <0x60>;
541		pinctrl-0 = <&pinctrl_prox>;
542	};
543
544	accel-gyro@6a {
545		compatible = "st,lsm9ds1-imu";
546		reg = <0x6a>;
547		vdd-supply = <&reg_3v3_p>;
548		vddio-supply = <&reg_3v3_p>;
549		mount-matrix =  "1",  "0",  "0",
550				"0",  "1",  "0",
551				"0",  "0", "-1";
552	};
553};
554
555&iomuxc {
556	pinctrl_bl: blgrp {
557		fsl,pins = <
558			MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT	0x6 /* DSI_BL_PWM */
559		>;
560	};
561
562	pinctrl_bt: btgrp {
563		fsl,pins = <
564			MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11	0x16 /* nBT_DISABLE */
565			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x10 /* BT_HOST_WAKE */
566		>;
567	};
568
569	pinctrl_charger: chargergrp {
570		fsl,pins = <
571			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x80 /* CHRG_nINT */
572		>;
573	};
574
575	pinctrl_fec1: fec1grp {
576		fsl,pins = <
577			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
578			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
579			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
580			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
581			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
582			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
583			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
584			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
585			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
586			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
587			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
588			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
589			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
590			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
591			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
592			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
593		>;
594	};
595
596	pinctrl_ts: tsgrp {
597		fsl,pins = <
598			MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0		0x16  /* TOUCH INT */
599			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x19  /* TOUCH RST */
600		>;
601	};
602
603	pinctrl_gpio_leds: gpioledgrp {
604		fsl,pins = <
605			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
606		>;
607	};
608
609	pinctrl_gpio_keys: gpiokeygrp {
610		fsl,pins = <
611			MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21	0x16
612			MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22	0x16
613			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x180  /* HP_DET */
614			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80   /* nWoWWAN */
615		>;
616	};
617
618	pinctrl_haptic: hapticgrp {
619		fsl,pins = <
620			MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4		0xc6   /* nHAPTIC */
621		>;
622	};
623
624	pinctrl_i2c1: i2c1grp {
625		fsl,pins = <
626			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x4000001f
627			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x4000001f
628		>;
629	};
630
631	pinctrl_i2c3: i2c3grp {
632		fsl,pins = <
633			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x4000001f
634			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x4000001f
635		>;
636	};
637
638	pinctrl_imu: imugrp {
639		fsl,pins = <
640			MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19	0x8  /* IMU_INT */
641		>;
642	};
643
644	pinctrl_pmic: pmicgrp {
645		fsl,pins = <
646			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x80  /* PMIC intr */
647		>;
648	};
649
650	pinctrl_prox: proxgrp {
651		fsl,pins = <
652			MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x80  /* prox intr */
653		>;
654	};
655
656	pinctrl_pwr_en: pwrengrp {
657		fsl,pins = <
658			MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x06
659		>;
660	};
661
662	pinctrl_rtc: rtcgrp {
663		fsl,pins = <
664			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x80  /* RTC intr */
665		>;
666	};
667
668	pinctrl_sai2: sai2grp {
669		fsl,pins = <
670			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
671			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
672			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
673			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
674			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
675		>;
676	};
677
678	pinctrl_sai6: sai6grp {
679		fsl,pins = <
680			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
681			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
682			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
683			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
684		>;
685	};
686
687	pinctrl_typec: typecgrp {
688		fsl,pins = <
689			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12		0x16
690			MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1		0x80
691		>;
692	};
693
694	pinctrl_uart1: uart1grp {
695		fsl,pins = <
696			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
697			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
698		>;
699	};
700
701	pinctrl_uart2: uart2grp {
702		fsl,pins = <
703			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
704			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
705			MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
706			MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
707		>;
708	};
709
710	pinctrl_uart3: uart3grp {
711		fsl,pins = <
712			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
713			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
714		>;
715	};
716
717	pinctrl_uart4: uart4grp {
718		fsl,pins = <
719			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
720			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
721			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
722			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
723			MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x49
724		>;
725	};
726
727	pinctrl_usdhc1: usdhc1grp {
728		fsl,pins = <
729			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
730			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
731			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
732			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
733			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
734			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
735			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
736			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
737			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
738			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
739			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
740			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
741		>;
742	};
743
744	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
745		fsl,pins = <
746			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
747			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
748			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
749			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
750			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
751			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
752			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
753			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
754			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
755			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
756			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
757			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
758		>;
759	};
760
761	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
762		fsl,pins = <
763			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
764			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
765			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
766			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
767			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
768			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
769			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
770			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
771			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
772			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
773			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
774			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
775		>;
776	};
777
778	pinctrl_usdhc2_pwr: usdhc2pwrgrp {
779		fsl,pins = <
780			MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
781		>;
782	};
783
784	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
785		fsl,pins = <
786			MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20		0x80 /* WIFI_WAKE */
787		>;
788	};
789
790	pinctrl_usdhc2: usdhc2grp {
791		fsl,pins = <
792			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
793			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
794			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
795			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
796			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
797			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
798		>;
799	};
800
801	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
802		fsl,pins = <
803			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
804			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
805			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
806			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
807			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
808			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
809		>;
810	};
811
812	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
813		fsl,pins = <
814			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
815			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
816			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
817			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
818			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
819			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
820		>;
821	};
822
823	pinctrl_wdog: wdoggrp {
824		fsl,pins = <
825			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0xc6
826		>;
827	};
828
829	pinctrl_wifi_pwr_en: wifipwrengrp {
830		fsl,pins = <
831			MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5         0x06
832		>;
833	};
834
835	pinctrl_wwan: wwangrp {
836		fsl,pins = <
837			MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4	0x09 /* nWWAN_DISABLE */
838			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80 /* nWoWWAN */
839			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19 /* WWAN_RESET */
840		>;
841	};
842};
843
844&lcdif {
845	status = "okay";
846};
847
848&mipi_dsi {
849	status = "okay";
850	#address-cells = <1>;
851	#size-cells = <0>;
852
853	panel@0 {
854		compatible = "rocktech,jh057n00900";
855		reg = <0>;
856		backlight = <&backlight_dsi>;
857		reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
858		iovcc-supply = <&reg_1v8_p>;
859		vcc-supply = <&reg_2v8_p>;
860		port {
861			panel_in: endpoint {
862				remote-endpoint = <&mipi_dsi_out>;
863			};
864		};
865	};
866
867	ports {
868		port@1 {
869			reg = <1>;
870			mipi_dsi_out: endpoint {
871				remote-endpoint = <&panel_in>;
872			};
873		};
874	};
875};
876
877&pgc_gpu {
878	power-supply = <&buck3_reg>;
879};
880
881&pgc_vpu {
882	power-supply = <&buck4_reg>;
883};
884
885&pwm1 {
886	pinctrl-names = "default";
887	pinctrl-0 = <&pinctrl_bl>;
888	status = "okay";
889};
890
891&snvs_pwrkey {
892	status = "okay";
893};
894
895&snvs_rtc {
896	status = "disabled";
897};
898
899&sai2 {
900	pinctrl-names = "default";
901	pinctrl-0 = <&pinctrl_sai2>;
902	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
903	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
904	assigned-clock-rates = <24576000>;
905	status = "okay";
906};
907
908&sai6 {
909	pinctrl-names = "default";
910	pinctrl-0 = <&pinctrl_sai6>;
911	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
912	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
913	assigned-clock-rates = <24576000>;
914	fsl,sai-synchronous-rx;
915	status = "okay";
916};
917
918&uart1 { /* console */
919	pinctrl-names = "default";
920	pinctrl-0 = <&pinctrl_uart1>;
921	status = "okay";
922};
923
924&uart3 { /* GNSS */
925	pinctrl-names = "default";
926	pinctrl-0 = <&pinctrl_uart3>;
927	status = "okay";
928};
929
930&uart4 { /* BT */
931	pinctrl-names = "default";
932	pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
933	uart-has-rtscts;
934	status = "okay";
935};
936
937&usb3_phy0 {
938	vbus-supply = <&reg_5v_p>;
939	status = "okay";
940};
941
942&usb3_phy1 {
943	vbus-supply = <&reg_5v_p>;
944	status = "okay";
945};
946
947&usb_dwc3_0 {
948	#address-cells = <1>;
949	#size-cells = <0>;
950	dr_mode = "otg";
951	status = "okay";
952
953	port@0 {
954		reg = <0>;
955
956		typec_hs: endpoint {
957			remote-endpoint = <&usb_con_hs>;
958		};
959	};
960
961	port@1 {
962		reg = <1>;
963
964		typec_ss: endpoint {
965			remote-endpoint = <&usb_con_ss>;
966		};
967	};
968};
969
970&usb_dwc3_1 {
971	dr_mode = "host";
972	status = "okay";
973};
974
975&usdhc1 {
976	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
977	assigned-clock-rates = <400000000>;
978	pinctrl-names = "default", "state_100mhz", "state_200mhz";
979	pinctrl-0 = <&pinctrl_usdhc1>;
980	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
981	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
982	bus-width = <8>;
983	non-removable;
984	status = "okay";
985};
986
987&usdhc2 {
988	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
989	assigned-clock-rates = <200000000>;
990	pinctrl-names = "default", "state_100mhz", "state_200mhz";
991	pinctrl-0 = <&pinctrl_usdhc2>;
992	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
993	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
994	bus-width = <4>;
995	vmmc-supply = <&reg_usdhc2_vmmc>;
996	power-supply = <&wifi_pwr_en>;
997	broken-cd;
998	disable-wp;
999	cap-sdio-irq;
1000	keep-power-in-suspend;
1001	wakeup-source;
1002	status = "okay";
1003};
1004
1005&wdog1 {
1006	pinctrl-names = "default";
1007	pinctrl-0 = <&pinctrl_wdog>;
1008	fsl,ext-reset-output;
1009	status = "okay";
1010};
1011