1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2018-2019 Purism SPC 4 */ 5 6/dts-v1/; 7 8#include "dt-bindings/input/input.h" 9#include "dt-bindings/pwm/pwm.h" 10#include "dt-bindings/usb/pd.h" 11#include "imx8mq.dtsi" 12 13/ { 14 model = "Purism Librem 5 devkit"; 15 compatible = "purism,librem5-devkit", "fsl,imx8mq"; 16 17 backlight_dsi: backlight-dsi { 18 compatible = "pwm-backlight"; 19 /* 200 Hz for the PAM2841 */ 20 pwms = <&pwm1 0 5000000>; 21 brightness-levels = <0 100>; 22 num-interpolated-steps = <100>; 23 /* Default brightness level (index into the array defined by */ 24 /* the "brightness-levels" property) */ 25 default-brightness-level = <0>; 26 power-supply = <®_22v4_p>; 27 }; 28 29 chosen { 30 stdout-path = &uart1; 31 }; 32 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pinctrl_gpio_keys>; 37 38 btn1 { 39 label = "VOL_UP"; 40 gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; 41 wakeup-source; 42 linux,code = <KEY_VOLUMEUP>; 43 }; 44 45 btn2 { 46 label = "VOL_DOWN"; 47 gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; 48 wakeup-source; 49 linux,code = <KEY_VOLUMEDOWN>; 50 }; 51 52 hp-det { 53 label = "HP_DET"; 54 gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 55 wakeup-source; 56 linux,code = <KEY_HP>; 57 }; 58 59 wwan-wake { 60 label = "WWAN_WAKE"; 61 gpios = <&gpio3 8 GPIO_ACTIVE_LOW>; 62 interrupt-parent = <&gpio3>; 63 interrupts = <8 GPIO_ACTIVE_LOW>; 64 wakeup-source; 65 linux,code = <KEY_PHONE>; 66 }; 67 }; 68 69 leds { 70 compatible = "gpio-leds"; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&pinctrl_gpio_leds>; 73 74 led1 { 75 label = "LED 1"; 76 gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; 77 default-state = "off"; 78 }; 79 }; 80 81 pmic_osc: clock-pmic { 82 compatible = "fixed-clock"; 83 #clock-cells = <0>; 84 clock-frequency = <32768>; 85 clock-output-names = "pmic_osc"; 86 }; 87 88 reg_1v8_p: regulator-1v8-p { 89 compatible = "regulator-fixed"; 90 regulator-name = "1v8_p"; 91 regulator-min-microvolt = <1800000>; 92 regulator-max-microvolt = <1800000>; 93 vin-supply = <®_pwr_en>; 94 }; 95 96 reg_2v8_p: regulator-2v8-p { 97 compatible = "regulator-fixed"; 98 regulator-name = "2v8_p"; 99 regulator-min-microvolt = <2800000>; 100 regulator-max-microvolt = <2800000>; 101 vin-supply = <®_pwr_en>; 102 }; 103 104 reg_3v3_p: regulator-3v3-p { 105 compatible = "regulator-fixed"; 106 regulator-name = "3v3_p"; 107 regulator-min-microvolt = <3300000>; 108 regulator-max-microvolt = <3300000>; 109 vin-supply = <®_pwr_en>; 110 111 regulator-state-mem { 112 regulator-on-in-suspend; 113 }; 114 }; 115 116 reg_5v_p: regulator-5v-p { 117 compatible = "regulator-fixed"; 118 regulator-name = "5v_p"; 119 regulator-min-microvolt = <5000000>; 120 regulator-max-microvolt = <5000000>; 121 vin-supply = <®_pwr_en>; 122 123 regulator-state-mem { 124 regulator-on-in-suspend; 125 }; 126 }; 127 128 reg_22v4_p: regulator-22v4-p { 129 compatible = "regulator-fixed"; 130 regulator-name = "22v4_P"; 131 regulator-min-microvolt = <22400000>; 132 regulator-max-microvolt = <22400000>; 133 vin-supply = <®_pwr_en>; 134 }; 135 136 reg_pwr_en: regulator-pwr-en { 137 compatible = "regulator-fixed"; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pinctrl_pwr_en>; 140 regulator-name = "PWR_EN"; 141 regulator-min-microvolt = <3300000>; 142 regulator-max-microvolt = <3300000>; 143 gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; 144 enable-active-high; 145 regulator-always-on; 146 }; 147 148 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 149 compatible = "regulator-fixed"; 150 pinctrl-names = "default"; 151 pinctrl-0 = <&pinctrl_usdhc2_pwr>; 152 regulator-name = "VSD_3V3"; 153 regulator-min-microvolt = <3300000>; 154 regulator-max-microvolt = <3300000>; 155 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 156 enable-active-high; 157 regulator-always-on; 158 }; 159 160 wwan_codec: sound-wwan-codec { 161 compatible = "option,gtm601"; 162 #sound-dai-cells = <0>; 163 }; 164 165 sound { 166 compatible = "simple-audio-card"; 167 simple-audio-card,name = "sgtl5000"; 168 simple-audio-card,format = "i2s"; 169 simple-audio-card,widgets = 170 "Microphone", "Microphone Jack", 171 "Headphone", "Headphone Jack", 172 "Speaker", "Speaker Ext", 173 "Line", "Line In Jack"; 174 simple-audio-card,routing = 175 "MIC_IN", "Microphone Jack", 176 "Microphone Jack", "Mic Bias", 177 "LINE_IN", "Line In Jack", 178 "Headphone Jack", "HP_OUT", 179 "Speaker Ext", "LINE_OUT"; 180 181 simple-audio-card,cpu { 182 sound-dai = <&sai2>; 183 }; 184 185 simple-audio-card,codec { 186 sound-dai = <&sgtl5000>; 187 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 188 frame-master; 189 bitclock-master; 190 }; 191 }; 192 193 sound-wwan { 194 compatible = "simple-audio-card"; 195 simple-audio-card,name = "SIMCom SIM7100"; 196 simple-audio-card,format = "dsp_a"; 197 198 simple-audio-card,cpu { 199 sound-dai = <&sai6>; 200 }; 201 202 telephony_link_master: simple-audio-card,codec { 203 sound-dai = <&wwan_codec>; 204 frame-master; 205 bitclock-master; 206 }; 207 }; 208 209 vibrator { 210 compatible = "gpio-vibrator"; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&pinctrl_haptic>; 213 enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>; 214 vcc-supply = <®_3v3_p>; 215 }; 216 217 wifi_pwr_en: regulator-wifi-en { 218 compatible = "regulator-fixed"; 219 pinctrl-names = "default"; 220 pinctrl-0 = <&pinctrl_wifi_pwr_en>; 221 regulator-name = "WIFI_EN"; 222 regulator-min-microvolt = <3300000>; 223 regulator-max-microvolt = <3300000>; 224 gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; 225 enable-active-high; 226 regulator-always-on; 227 }; 228}; 229 230&A53_0 { 231 cpu-supply = <&buck2_reg>; 232}; 233 234&A53_1 { 235 cpu-supply = <&buck2_reg>; 236}; 237 238&A53_2 { 239 cpu-supply = <&buck2_reg>; 240}; 241 242&A53_3 { 243 cpu-supply = <&buck2_reg>; 244}; 245 246&clk { 247 assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>; 248 assigned-clock-rates = <786432000>, <722534400>; 249}; 250 251&dphy { 252 status = "okay"; 253}; 254 255&fec1 { 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_fec1>; 258 phy-mode = "rgmii-id"; 259 phy-handle = <ðphy0>; 260 fsl,magic-packet; 261 phy-supply = <®_3v3_p>; 262 status = "okay"; 263 264 mdio { 265 #address-cells = <1>; 266 #size-cells = <0>; 267 268 ethphy0: ethernet-phy@1 { 269 compatible = "ethernet-phy-ieee802.3-c22"; 270 reg = <1>; 271 }; 272 }; 273}; 274 275&i2c1 { 276 clock-frequency = <100000>; 277 pinctrl-names = "default"; 278 pinctrl-0 = <&pinctrl_i2c1>; 279 status = "okay"; 280 281 pmic: pmic@4b { 282 compatible = "rohm,bd71837"; 283 reg = <0x4b>; 284 pinctrl-names = "default"; 285 pinctrl-0 = <&pinctrl_pmic>; 286 clocks = <&pmic_osc>; 287 clock-names = "osc"; 288 #clock-cells = <0>; 289 clock-output-names = "pmic_clk"; 290 interrupt-parent = <&gpio1>; 291 interrupts = <3 GPIO_ACTIVE_LOW>; 292 interrupt-names = "irq"; 293 rohm,reset-snvs-powered; 294 295 regulators { 296 buck1_reg: BUCK1 { 297 regulator-name = "buck1"; 298 regulator-min-microvolt = <700000>; 299 regulator-max-microvolt = <1300000>; 300 regulator-boot-on; 301 regulator-ramp-delay = <1250>; 302 rohm,dvs-run-voltage = <900000>; 303 rohm,dvs-idle-voltage = <850000>; 304 rohm,dvs-suspend-voltage = <800000>; 305 }; 306 307 buck2_reg: BUCK2 { 308 regulator-name = "buck2"; 309 regulator-min-microvolt = <700000>; 310 regulator-max-microvolt = <1300000>; 311 regulator-boot-on; 312 regulator-ramp-delay = <1250>; 313 rohm,dvs-run-voltage = <1000000>; 314 rohm,dvs-idle-voltage = <900000>; 315 }; 316 317 buck3_reg: BUCK3 { 318 regulator-name = "buck3"; 319 regulator-min-microvolt = <700000>; 320 regulator-max-microvolt = <1300000>; 321 regulator-boot-on; 322 rohm,dvs-run-voltage = <900000>; 323 }; 324 325 buck4_reg: BUCK4 { 326 regulator-name = "buck4"; 327 regulator-min-microvolt = <700000>; 328 regulator-max-microvolt = <1300000>; 329 rohm,dvs-run-voltage = <1000000>; 330 }; 331 332 buck5_reg: BUCK5 { 333 regulator-name = "buck5"; 334 regulator-min-microvolt = <700000>; 335 regulator-max-microvolt = <1350000>; 336 regulator-boot-on; 337 }; 338 339 buck6_reg: BUCK6 { 340 regulator-name = "buck6"; 341 regulator-min-microvolt = <3000000>; 342 regulator-max-microvolt = <3300000>; 343 regulator-boot-on; 344 }; 345 346 buck7_reg: BUCK7 { 347 regulator-name = "buck7"; 348 regulator-min-microvolt = <1605000>; 349 regulator-max-microvolt = <1995000>; 350 regulator-boot-on; 351 }; 352 353 buck8_reg: BUCK8 { 354 regulator-name = "buck8"; 355 regulator-min-microvolt = <800000>; 356 regulator-max-microvolt = <1400000>; 357 regulator-boot-on; 358 }; 359 360 ldo1_reg: LDO1 { 361 regulator-name = "ldo1"; 362 regulator-min-microvolt = <3000000>; 363 regulator-max-microvolt = <3300000>; 364 regulator-boot-on; 365 /* leave on for snvs power button */ 366 regulator-always-on; 367 }; 368 369 ldo2_reg: LDO2 { 370 regulator-name = "ldo2"; 371 regulator-min-microvolt = <900000>; 372 regulator-max-microvolt = <900000>; 373 regulator-boot-on; 374 /* leave on for snvs power button */ 375 regulator-always-on; 376 }; 377 378 ldo3_reg: LDO3 { 379 regulator-name = "ldo3"; 380 regulator-min-microvolt = <1800000>; 381 regulator-max-microvolt = <3300000>; 382 regulator-boot-on; 383 }; 384 385 ldo4_reg: LDO4 { 386 regulator-name = "ldo4"; 387 regulator-min-microvolt = <900000>; 388 regulator-max-microvolt = <1800000>; 389 regulator-boot-on; 390 }; 391 392 ldo5_reg: LDO5 { 393 regulator-name = "ldo5"; 394 regulator-min-microvolt = <1800000>; 395 regulator-max-microvolt = <3300000>; 396 }; 397 398 ldo6_reg: LDO6 { 399 regulator-name = "ldo6"; 400 regulator-min-microvolt = <900000>; 401 regulator-max-microvolt = <1800000>; 402 regulator-boot-on; 403 }; 404 405 ldo7_reg: LDO7 { 406 regulator-name = "ldo7"; 407 regulator-min-microvolt = <1800000>; 408 regulator-max-microvolt = <3300000>; 409 regulator-boot-on; 410 }; 411 }; 412 }; 413 414 typec_ptn5100: usb-typec@52 { 415 compatible = "nxp,ptn5110"; 416 reg = <0x52>; 417 pinctrl-names = "default"; 418 pinctrl-0 = <&pinctrl_typec>; 419 interrupt-parent = <&gpio3>; 420 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 421 422 connector { 423 compatible = "usb-c-connector"; 424 label = "USB-C"; 425 data-role = "dual"; 426 power-role = "dual"; 427 try-power-role = "sink"; 428 source-pdos = <PDO_FIXED(5000, 2000, 429 PDO_FIXED_USB_COMM | 430 PDO_FIXED_DUAL_ROLE | 431 PDO_FIXED_DATA_SWAP )>; 432 sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM | 433 PDO_FIXED_DUAL_ROLE | 434 PDO_FIXED_DATA_SWAP ) 435 PDO_VAR(5000, 5000, 3500)>; 436 op-sink-microwatt = <10000000>; 437 438 ports { 439 #address-cells = <1>; 440 #size-cells = <0>; 441 442 port@0 { 443 reg = <0>; 444 445 usb_con_hs: endpoint { 446 remote-endpoint = <&typec_hs>; 447 }; 448 }; 449 450 port@1 { 451 reg = <1>; 452 453 usb_con_ss: endpoint { 454 remote-endpoint = <&typec_ss>; 455 }; 456 }; 457 }; 458 }; 459 }; 460 461 rtc@68 { 462 compatible = "microcrystal,rv4162"; 463 reg = <0x68>; 464 pinctrl-names = "default"; 465 pinctrl-0 = <&pinctrl_rtc>; 466 interrupt-parent = <&gpio4>; 467 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 468 }; 469 470 charger@6b { /* bq25896 */ 471 compatible = "ti,bq25890"; 472 reg = <0x6b>; 473 pinctrl-names = "default"; 474 pinctrl-0 = <&pinctrl_charger>; 475 interrupt-parent = <&gpio3>; 476 interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 477 ti,battery-regulation-voltage = <4192000>; /* 4.192V */ 478 ti,charge-current = <1600000>; /* 1.6A */ 479 ti,termination-current = <66000>; /* 66mA */ 480 ti,precharge-current = <130000>; /* 130mA */ 481 ti,minimum-sys-voltage = <3000000>; /* 3V */ 482 ti,boost-voltage = <5000000>; /* 5V */ 483 ti,boost-max-current = <50000>; /* 50mA */ 484 }; 485}; 486 487&i2c3 { 488 clock-frequency = <100000>; 489 pinctrl-names = "default"; 490 pinctrl-0 = <&pinctrl_i2c3>; 491 status = "okay"; 492 493 magnetometer@1e { 494 compatible = "st,lsm9ds1-magn"; 495 reg = <0x1e>; 496 pinctrl-names = "default"; 497 pinctrl-0 = <&pinctrl_imu>; 498 interrupt-parent = <&gpio3>; 499 interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; 500 vdd-supply = <®_3v3_p>; 501 vddio-supply = <®_3v3_p>; 502 }; 503 504 sgtl5000: audio-codec@a { 505 compatible = "fsl,sgtl5000"; 506 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 507 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 508 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 509 assigned-clock-rates = <24576000>; 510 #sound-dai-cells = <0>; 511 reg = <0x0a>; 512 VDDD-supply = <®_1v8_p>; 513 VDDIO-supply = <®_3v3_p>; 514 VDDA-supply = <®_3v3_p>; 515 }; 516 517 touchscreen@5d { 518 compatible = "goodix,gt5688"; 519 reg = <0x5d>; 520 pinctrl-names = "default"; 521 pinctrl-0 = <&pinctrl_ts>; 522 interrupt-parent = <&gpio3>; 523 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 524 reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 525 irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; 526 touchscreen-size-x = <720>; 527 touchscreen-size-y = <1440>; 528 AVDD28-supply = <®_2v8_p>; 529 VDDIO-supply = <®_1v8_p>; 530 }; 531 532 proximity-sensor@60 { 533 compatible = "vishay,vcnl4040"; 534 reg = <0x60>; 535 pinctrl-0 = <&pinctrl_prox>; 536 }; 537 538 accel-gyro@6a { 539 compatible = "st,lsm9ds1-imu"; 540 reg = <0x6a>; 541 vdd-supply = <®_3v3_p>; 542 vddio-supply = <®_3v3_p>; 543 mount-matrix = "1", "0", "0", 544 "0", "1", "0", 545 "0", "0", "-1"; 546 }; 547}; 548 549&iomuxc { 550 pinctrl_bl: blgrp { 551 fsl,pins = < 552 MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT 0x6 /* DSI_BL_PWM */ 553 >; 554 }; 555 556 pinctrl_bt: btgrp { 557 fsl,pins = < 558 MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x16 /* nBT_DISABLE */ 559 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x10 /* BT_HOST_WAKE */ 560 >; 561 }; 562 563 pinctrl_charger: chargergrp { 564 fsl,pins = < 565 MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x80 /* CHRG_nINT */ 566 >; 567 }; 568 569 pinctrl_fec1: fec1grp { 570 fsl,pins = < 571 MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 572 MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 573 MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 574 MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 575 MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 576 MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 577 MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 578 MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 579 MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 580 MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 581 MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 582 MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 583 MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 584 MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 585 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 586 MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x1f 587 >; 588 }; 589 590 pinctrl_ts: tsgrp { 591 fsl,pins = < 592 MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x16 /* TOUCH INT */ 593 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* TOUCH RST */ 594 >; 595 }; 596 597 pinctrl_gpio_leds: gpioledgrp { 598 fsl,pins = < 599 MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x16 600 >; 601 }; 602 603 pinctrl_gpio_keys: gpiokeygrp { 604 fsl,pins = < 605 MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x16 606 MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22 0x16 607 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x180 /* HP_DET */ 608 MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x80 /* nWoWWAN */ 609 >; 610 }; 611 612 pinctrl_haptic: hapticgrp { 613 fsl,pins = < 614 MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4 0xc6 /* nHAPTIC */ 615 >; 616 }; 617 618 pinctrl_i2c1: i2c1grp { 619 fsl,pins = < 620 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000001f 621 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000001f 622 >; 623 }; 624 625 pinctrl_i2c3: i2c3grp { 626 fsl,pins = < 627 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000001f 628 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000001f 629 >; 630 }; 631 632 pinctrl_imu: imugrp { 633 fsl,pins = < 634 MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x8 /* IMU_INT */ 635 >; 636 }; 637 638 pinctrl_pmic: pmicgrp { 639 fsl,pins = < 640 MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x80 /* PMIC intr */ 641 >; 642 }; 643 644 pinctrl_prox: proxgrp { 645 fsl,pins = < 646 MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x80 /* prox intr */ 647 >; 648 }; 649 650 pinctrl_pwr_en: pwrengrp { 651 fsl,pins = < 652 MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x06 653 >; 654 }; 655 656 pinctrl_rtc: rtcgrp { 657 fsl,pins = < 658 MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x80 /* RTC intr */ 659 >; 660 }; 661 662 pinctrl_sai2: sai2grp { 663 fsl,pins = < 664 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 665 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 666 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 667 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 668 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 669 >; 670 }; 671 672 pinctrl_sai6: sai6grp { 673 fsl,pins = < 674 MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6 675 MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6 676 MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6 677 MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6 678 >; 679 }; 680 681 pinctrl_typec: typecgrp { 682 fsl,pins = < 683 MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x16 684 MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x80 685 >; 686 }; 687 688 pinctrl_uart1: uart1grp { 689 fsl,pins = < 690 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 691 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 692 >; 693 }; 694 695 pinctrl_uart2: uart2grp { 696 fsl,pins = < 697 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 698 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 699 MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x49 700 MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x49 701 >; 702 }; 703 704 pinctrl_uart3: uart3grp { 705 fsl,pins = < 706 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 707 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 708 >; 709 }; 710 711 pinctrl_uart4: uart4grp { 712 fsl,pins = < 713 MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 714 MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 715 MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 716 MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 717 MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x49 718 >; 719 }; 720 721 pinctrl_usdhc1: usdhc1grp { 722 fsl,pins = < 723 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 724 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 725 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 726 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 727 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 728 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 729 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 730 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 731 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 732 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 733 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 734 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 735 >; 736 }; 737 738 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 739 fsl,pins = < 740 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d 741 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd 742 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd 743 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd 744 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd 745 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd 746 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd 747 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd 748 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd 749 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd 750 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d 751 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 752 >; 753 }; 754 755 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 756 fsl,pins = < 757 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f 758 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf 759 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf 760 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf 761 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf 762 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf 763 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf 764 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf 765 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf 766 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf 767 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f 768 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 769 >; 770 }; 771 772 pinctrl_usdhc2_pwr: usdhc2pwrgrp { 773 fsl,pins = < 774 MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 775 >; 776 }; 777 778 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 779 fsl,pins = < 780 MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x80 /* WIFI_WAKE */ 781 >; 782 }; 783 784 pinctrl_usdhc2: usdhc2grp { 785 fsl,pins = < 786 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 787 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 788 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 789 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 790 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 791 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 792 >; 793 }; 794 795 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 796 fsl,pins = < 797 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d 798 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd 799 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd 800 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd 801 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd 802 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd 803 >; 804 }; 805 806 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 807 fsl,pins = < 808 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f 809 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf 810 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf 811 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf 812 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf 813 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf 814 >; 815 }; 816 817 pinctrl_wdog: wdoggrp { 818 fsl,pins = < 819 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 820 >; 821 }; 822 823 pinctrl_wifi_pwr_en: wifipwrengrp { 824 fsl,pins = < 825 MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x06 826 >; 827 }; 828 829 pinctrl_wwan: wwangrp { 830 fsl,pins = < 831 MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x09 /* nWWAN_DISABLE */ 832 MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x80 /* nWoWWAN */ 833 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x19 /* WWAN_RESET */ 834 >; 835 }; 836}; 837 838&lcdif { 839 status = "okay"; 840}; 841 842&mipi_dsi { 843 status = "okay"; 844 #address-cells = <1>; 845 #size-cells = <0>; 846 847 panel@0 { 848 compatible = "rocktech,jh057n00900"; 849 reg = <0>; 850 backlight = <&backlight_dsi>; 851 reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; 852 iovcc-supply = <®_1v8_p>; 853 vcc-supply = <®_2v8_p>; 854 port { 855 panel_in: endpoint { 856 remote-endpoint = <&mipi_dsi_out>; 857 }; 858 }; 859 }; 860 861 ports { 862 port@1 { 863 reg = <1>; 864 mipi_dsi_out: endpoint { 865 remote-endpoint = <&panel_in>; 866 }; 867 }; 868 }; 869}; 870 871&pgc_gpu { 872 power-supply = <&buck3_reg>; 873}; 874 875&pgc_vpu { 876 power-supply = <&buck4_reg>; 877}; 878 879&pwm1 { 880 pinctrl-names = "default"; 881 pinctrl-0 = <&pinctrl_bl>; 882 status = "okay"; 883}; 884 885&snvs_pwrkey { 886 status = "okay"; 887}; 888 889&sai2 { 890 pinctrl-names = "default"; 891 pinctrl-0 = <&pinctrl_sai2>; 892 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 893 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 894 assigned-clock-rates = <24576000>; 895 status = "okay"; 896}; 897 898&sai6 { 899 pinctrl-names = "default"; 900 pinctrl-0 = <&pinctrl_sai6>; 901 assigned-clocks = <&clk IMX8MQ_CLK_SAI6>; 902 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 903 assigned-clock-rates = <24576000>; 904 fsl,sai-synchronous-rx; 905 status = "okay"; 906}; 907 908&uart1 { /* console */ 909 pinctrl-names = "default"; 910 pinctrl-0 = <&pinctrl_uart1>; 911 status = "okay"; 912}; 913 914&uart3 { /* GNSS */ 915 pinctrl-names = "default"; 916 pinctrl-0 = <&pinctrl_uart3>; 917 status = "okay"; 918}; 919 920&uart4 { /* BT */ 921 pinctrl-names = "default"; 922 pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>; 923 uart-has-rtscts; 924 status = "okay"; 925}; 926 927&usb3_phy0 { 928 vbus-supply = <®_5v_p>; 929 status = "okay"; 930}; 931 932&usb3_phy1 { 933 vbus-supply = <®_5v_p>; 934 status = "okay"; 935}; 936 937&usb_dwc3_0 { 938 #address-cells = <1>; 939 #size-cells = <0>; 940 dr_mode = "otg"; 941 status = "okay"; 942 943 port@0 { 944 reg = <0>; 945 946 typec_hs: endpoint { 947 remote-endpoint = <&usb_con_hs>; 948 }; 949 }; 950 951 port@1 { 952 reg = <1>; 953 954 typec_ss: endpoint { 955 remote-endpoint = <&usb_con_ss>; 956 }; 957 }; 958}; 959 960&usb_dwc3_1 { 961 dr_mode = "host"; 962 status = "okay"; 963}; 964 965&usdhc1 { 966 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>; 967 assigned-clock-rates = <400000000>; 968 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 969 pinctrl-0 = <&pinctrl_usdhc1>; 970 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 971 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 972 bus-width = <8>; 973 non-removable; 974 status = "okay"; 975}; 976 977&usdhc2 { 978 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; 979 assigned-clock-rates = <200000000>; 980 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 981 pinctrl-0 = <&pinctrl_usdhc2>; 982 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 983 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 984 bus-width = <4>; 985 vmmc-supply = <®_usdhc2_vmmc>; 986 power-supply = <&wifi_pwr_en>; 987 broken-cd; 988 disable-wp; 989 cap-sdio-irq; 990 keep-power-in-suspend; 991 wakeup-source; 992 status = "okay"; 993}; 994 995&wdog1 { 996 pinctrl-names = "default"; 997 pinctrl-0 = <&pinctrl_wdog>; 998 fsl,ext-reset-output; 999 status = "okay"; 1000}; 1001