1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2019 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include "dt-bindings/pwm/pwm.h"
10#include "dt-bindings/usb/pd.h"
11#include "imx8mq.dtsi"
12
13/ {
14	model = "Purism Librem 5 devkit";
15	compatible = "purism,librem5-devkit", "fsl,imx8mq";
16
17	backlight_dsi: backlight-dsi {
18		compatible = "pwm-backlight";
19		/* 200 Hz for the PAM2841 */
20		pwms = <&pwm1 0 5000000>;
21		brightness-levels = <0 100>;
22		num-interpolated-steps = <100>;
23		/* Default brightness level (index into the array defined by */
24		/* the "brightness-levels" property) */
25		default-brightness-level = <0>;
26		power-supply = <&reg_22v4_p>;
27	};
28
29	chosen {
30		stdout-path = &uart1;
31	};
32
33	gpio-keys {
34		compatible = "gpio-keys";
35		pinctrl-names = "default";
36		pinctrl-0 = <&pinctrl_gpio_keys>;
37
38		btn1 {
39			label = "VOL_UP";
40			gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
41			wakeup-source;
42			linux,code = <KEY_VOLUMEUP>;
43		};
44
45		btn2 {
46			label = "VOL_DOWN";
47			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
48			wakeup-source;
49			linux,code = <KEY_VOLUMEDOWN>;
50		};
51
52		hp-det {
53			label = "HP_DET";
54			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
55			wakeup-source;
56			linux,code = <KEY_HP>;
57		};
58
59		wwan-wake {
60			label = "WWAN_WAKE";
61			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
62			interrupt-parent = <&gpio3>;
63			interrupts = <8 GPIO_ACTIVE_LOW>;
64			wakeup-source;
65			linux,code = <KEY_PHONE>;
66		};
67	};
68
69	leds {
70		compatible = "gpio-leds";
71		pinctrl-names = "default";
72		pinctrl-0 = <&pinctrl_gpio_leds>;
73
74		led1 {
75			label = "LED 1";
76			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
77			default-state = "off";
78		};
79	};
80
81	pmic_osc: clock-pmic {
82		compatible = "fixed-clock";
83		#clock-cells = <0>;
84		clock-frequency = <32768>;
85		clock-output-names = "pmic_osc";
86	};
87
88	reg_1v8_p: regulator-1v8-p {
89		compatible = "regulator-fixed";
90		regulator-name = "1v8_p";
91		regulator-min-microvolt = <1800000>;
92		regulator-max-microvolt = <1800000>;
93		vin-supply = <&reg_pwr_en>;
94	};
95
96	reg_2v8_p: regulator-2v8-p {
97		compatible = "regulator-fixed";
98		regulator-name = "2v8_p";
99		regulator-min-microvolt = <2800000>;
100		regulator-max-microvolt = <2800000>;
101		vin-supply = <&reg_pwr_en>;
102	};
103
104	reg_3v3_p: regulator-3v3-p {
105		compatible = "regulator-fixed";
106		regulator-name = "3v3_p";
107		regulator-min-microvolt = <3300000>;
108		regulator-max-microvolt = <3300000>;
109		vin-supply = <&reg_pwr_en>;
110
111		regulator-state-mem {
112			regulator-on-in-suspend;
113		};
114	};
115
116	reg_5v_p: regulator-5v-p {
117		compatible = "regulator-fixed";
118		regulator-name = "5v_p";
119		regulator-min-microvolt = <5000000>;
120		regulator-max-microvolt = <5000000>;
121		vin-supply = <&reg_pwr_en>;
122
123		regulator-state-mem {
124			regulator-on-in-suspend;
125		};
126	};
127
128	reg_22v4_p: regulator-22v4-p  {
129		compatible = "regulator-fixed";
130		regulator-name = "22v4_P";
131		regulator-min-microvolt = <22400000>;
132		regulator-max-microvolt = <22400000>;
133		vin-supply = <&reg_pwr_en>;
134	};
135
136	reg_pwr_en: regulator-pwr-en {
137		compatible = "regulator-fixed";
138		pinctrl-names = "default";
139		pinctrl-0 = <&pinctrl_pwr_en>;
140		regulator-name = "PWR_EN";
141		regulator-min-microvolt = <3300000>;
142		regulator-max-microvolt = <3300000>;
143		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
144		enable-active-high;
145		regulator-always-on;
146	};
147
148	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
149		compatible = "regulator-fixed";
150		pinctrl-names = "default";
151		pinctrl-0 = <&pinctrl_usdhc2_pwr>;
152		regulator-name = "VSD_3V3";
153		regulator-min-microvolt = <3300000>;
154		regulator-max-microvolt = <3300000>;
155		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
156		enable-active-high;
157		regulator-always-on;
158	};
159
160	wwan_codec: sound-wwan-codec {
161		compatible = "option,gtm601";
162		#sound-dai-cells = <0>;
163	};
164
165	sound {
166		compatible = "simple-audio-card";
167		simple-audio-card,name = "sgtl5000";
168		simple-audio-card,format = "i2s";
169		simple-audio-card,widgets =
170			"Microphone", "Microphone Jack",
171			"Headphone", "Headphone Jack",
172			"Speaker", "Speaker Ext",
173			"Line", "Line In Jack";
174		simple-audio-card,routing =
175			"MIC_IN", "Microphone Jack",
176			"Microphone Jack", "Mic Bias",
177			"LINE_IN", "Line In Jack",
178			"Headphone Jack", "HP_OUT",
179			"Speaker Ext", "LINE_OUT";
180
181		simple-audio-card,cpu {
182			sound-dai = <&sai2>;
183		};
184
185		simple-audio-card,codec {
186			sound-dai = <&sgtl5000>;
187			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
188			frame-master;
189			bitclock-master;
190		};
191	};
192
193	sound-wwan {
194		compatible = "simple-audio-card";
195		simple-audio-card,name = "SIMCom SIM7100";
196		simple-audio-card,format = "dsp_a";
197
198		simple-audio-card,cpu {
199			sound-dai = <&sai6>;
200		};
201
202		telephony_link_master: simple-audio-card,codec {
203			sound-dai = <&wwan_codec>;
204			frame-master;
205			bitclock-master;
206		};
207	};
208
209	vibrator {
210		compatible = "gpio-vibrator";
211		pinctrl-names = "default";
212		pinctrl-0 = <&pinctrl_haptic>;
213	        enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
214		vcc-supply = <&reg_3v3_p>;
215	};
216
217	wifi_pwr_en: regulator-wifi-en {
218		compatible = "regulator-fixed";
219		pinctrl-names = "default";
220		pinctrl-0 = <&pinctrl_wifi_pwr_en>;
221		regulator-name = "WIFI_EN";
222		regulator-min-microvolt = <3300000>;
223		regulator-max-microvolt = <3300000>;
224		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
225		enable-active-high;
226		regulator-always-on;
227	};
228};
229
230&A53_0 {
231	cpu-supply = <&buck2_reg>;
232};
233
234&A53_1 {
235	cpu-supply = <&buck2_reg>;
236};
237
238&A53_2 {
239	cpu-supply = <&buck2_reg>;
240};
241
242&A53_3 {
243	cpu-supply = <&buck2_reg>;
244};
245
246&clk {
247	assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>;
248	assigned-clock-rates = <786432000>, <722534400>;
249};
250
251&dphy {
252	status = "okay";
253};
254
255&fec1 {
256	pinctrl-names = "default";
257	pinctrl-0 = <&pinctrl_fec1>;
258	phy-mode = "rgmii-id";
259	phy-handle = <&ethphy0>;
260	fsl,magic-packet;
261	phy-supply = <&reg_3v3_p>;
262	status = "okay";
263
264	mdio {
265		#address-cells = <1>;
266		#size-cells = <0>;
267
268		ethphy0: ethernet-phy@1 {
269			compatible = "ethernet-phy-ieee802.3-c22";
270			reg = <1>;
271		};
272	};
273};
274
275&i2c1 {
276	clock-frequency = <100000>;
277	pinctrl-names = "default";
278	pinctrl-0 = <&pinctrl_i2c1>;
279	status = "okay";
280
281	pmic: pmic@4b {
282		compatible = "rohm,bd71837";
283		reg = <0x4b>;
284		pinctrl-names = "default";
285		pinctrl-0 = <&pinctrl_pmic>;
286		clocks = <&pmic_osc>;
287		clock-names = "osc";
288		clock-output-names = "pmic_clk";
289		interrupt-parent = <&gpio1>;
290		interrupts = <3 GPIO_ACTIVE_LOW>;
291		interrupt-names = "irq";
292		rohm,reset-snvs-powered;
293
294		regulators {
295			buck1_reg: BUCK1 {
296				regulator-name = "buck1";
297				regulator-min-microvolt = <700000>;
298				regulator-max-microvolt = <1300000>;
299				regulator-boot-on;
300				regulator-ramp-delay = <1250>;
301				rohm,dvs-run-voltage = <900000>;
302				rohm,dvs-idle-voltage = <850000>;
303				rohm,dvs-suspend-voltage = <800000>;
304			};
305
306			buck2_reg: BUCK2 {
307				regulator-name = "buck2";
308				regulator-min-microvolt = <700000>;
309				regulator-max-microvolt = <1300000>;
310				regulator-boot-on;
311				regulator-ramp-delay = <1250>;
312				rohm,dvs-run-voltage = <1000000>;
313				rohm,dvs-idle-voltage = <900000>;
314			};
315
316			buck3_reg: BUCK3 {
317				regulator-name = "buck3";
318				regulator-min-microvolt = <700000>;
319				regulator-max-microvolt = <1300000>;
320				regulator-boot-on;
321				rohm,dvs-run-voltage = <900000>;
322			};
323
324			buck4_reg: BUCK4 {
325				regulator-name = "buck4";
326				regulator-min-microvolt = <700000>;
327				regulator-max-microvolt = <1300000>;
328				rohm,dvs-run-voltage = <1000000>;
329			};
330
331			buck5_reg: BUCK5 {
332				regulator-name = "buck5";
333				regulator-min-microvolt = <700000>;
334				regulator-max-microvolt = <1350000>;
335				regulator-boot-on;
336			};
337
338			buck6_reg: BUCK6 {
339				regulator-name = "buck6";
340				regulator-min-microvolt = <3000000>;
341				regulator-max-microvolt = <3300000>;
342				regulator-boot-on;
343			};
344
345			buck7_reg: BUCK7 {
346				regulator-name = "buck7";
347				regulator-min-microvolt = <1605000>;
348				regulator-max-microvolt = <1995000>;
349				regulator-boot-on;
350			};
351
352			buck8_reg: BUCK8 {
353				regulator-name = "buck8";
354				regulator-min-microvolt = <800000>;
355				regulator-max-microvolt = <1400000>;
356				regulator-boot-on;
357			};
358
359			ldo1_reg: LDO1 {
360				regulator-name = "ldo1";
361				regulator-min-microvolt = <3000000>;
362				regulator-max-microvolt = <3300000>;
363				regulator-boot-on;
364				/* leave on for snvs power button */
365				regulator-always-on;
366			};
367
368			ldo2_reg: LDO2 {
369				regulator-name = "ldo2";
370				regulator-min-microvolt = <900000>;
371				regulator-max-microvolt = <900000>;
372				regulator-boot-on;
373				/* leave on for snvs power button */
374				regulator-always-on;
375			};
376
377			ldo3_reg: LDO3 {
378				regulator-name = "ldo3";
379				regulator-min-microvolt = <1800000>;
380				regulator-max-microvolt = <3300000>;
381				regulator-boot-on;
382			};
383
384			ldo4_reg: LDO4 {
385				regulator-name = "ldo4";
386				regulator-min-microvolt = <900000>;
387				regulator-max-microvolt = <1800000>;
388				regulator-boot-on;
389			};
390
391			ldo5_reg: LDO5 {
392				regulator-name = "ldo5";
393				regulator-min-microvolt = <1800000>;
394				regulator-max-microvolt = <3300000>;
395			};
396
397			ldo6_reg: LDO6 {
398				regulator-name = "ldo6";
399				regulator-min-microvolt = <900000>;
400				regulator-max-microvolt = <1800000>;
401				regulator-boot-on;
402			};
403
404			ldo7_reg: LDO7 {
405				regulator-name = "ldo7";
406				regulator-min-microvolt = <1800000>;
407				regulator-max-microvolt = <3300000>;
408				regulator-boot-on;
409			};
410		};
411	};
412
413	typec_ptn5100: usb-typec@52 {
414		compatible = "nxp,ptn5110";
415		reg = <0x52>;
416		pinctrl-names = "default";
417		pinctrl-0 = <&pinctrl_typec>;
418		interrupt-parent = <&gpio3>;
419		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
420
421		connector {
422			compatible = "usb-c-connector";
423			label = "USB-C";
424			data-role = "dual";
425			power-role = "dual";
426			try-power-role = "sink";
427			source-pdos = <PDO_FIXED(5000, 2000,
428				PDO_FIXED_USB_COMM |
429				PDO_FIXED_DUAL_ROLE |
430				PDO_FIXED_DATA_SWAP )>;
431			sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM |
432				PDO_FIXED_DUAL_ROLE |
433				PDO_FIXED_DATA_SWAP )
434			     PDO_VAR(5000, 5000, 3500)>;
435			op-sink-microwatt = <10000000>;
436
437			ports {
438				#address-cells = <1>;
439				#size-cells = <0>;
440
441				port@0 {
442					reg = <0>;
443
444					usb_con_hs: endpoint {
445						remote-endpoint = <&typec_hs>;
446					};
447				};
448
449				port@1 {
450					reg = <1>;
451
452					usb_con_ss: endpoint {
453						remote-endpoint = <&typec_ss>;
454					};
455				};
456			};
457		};
458	};
459
460	rtc@68 {
461		compatible = "microcrystal,rv4162";
462		reg = <0x68>;
463		pinctrl-names = "default";
464		pinctrl-0 = <&pinctrl_rtc>;
465		interrupt-parent = <&gpio4>;
466		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
467	};
468
469	charger@6b { /* bq25896 */
470		compatible = "ti,bq25890";
471		reg = <0x6b>;
472		pinctrl-names = "default";
473		pinctrl-0 = <&pinctrl_charger>;
474		interrupt-parent = <&gpio3>;
475		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
476		ti,battery-regulation-voltage = <4192000>; /* 4.192V */
477		ti,charge-current = <1600000>; /* 1.6A */
478		ti,termination-current = <66000>;  /* 66mA */
479		ti,precharge-current = <130000>; /* 130mA */
480		ti,minimum-sys-voltage = <3000000>; /* 3V */
481		ti,boost-voltage = <5000000>; /* 5V */
482		ti,boost-max-current = <50000>; /* 50mA */
483	};
484};
485
486&i2c3 {
487	clock-frequency = <100000>;
488	pinctrl-names = "default";
489	pinctrl-0 = <&pinctrl_i2c3>;
490	status = "okay";
491
492	magnetometer@1e	{
493		compatible = "st,lsm9ds1-magn";
494		reg = <0x1e>;
495		pinctrl-names = "default";
496		pinctrl-0 = <&pinctrl_imu>;
497		interrupt-parent = <&gpio3>;
498		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
499		vdd-supply = <&reg_3v3_p>;
500		vddio-supply = <&reg_3v3_p>;
501	};
502
503	sgtl5000: audio-codec@a {
504		compatible = "fsl,sgtl5000";
505		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
506		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
507		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
508		assigned-clock-rates = <24576000>;
509		#sound-dai-cells = <0>;
510		reg = <0x0a>;
511		VDDD-supply = <&reg_1v8_p>;
512		VDDIO-supply = <&reg_3v3_p>;
513		VDDA-supply = <&reg_3v3_p>;
514	};
515
516	touchscreen@5d {
517		compatible = "goodix,gt5688";
518		reg = <0x5d>;
519		pinctrl-names = "default";
520		pinctrl-0 = <&pinctrl_ts>;
521		interrupt-parent = <&gpio3>;
522		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
523		reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
524		irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
525		touchscreen-size-x = <720>;
526		touchscreen-size-y = <1440>;
527		AVDD28-supply = <&reg_2v8_p>;
528		VDDIO-supply = <&reg_1v8_p>;
529	};
530
531	proximity-sensor@60 {
532		compatible = "vishay,vcnl4040";
533		reg = <0x60>;
534		pinctrl-0 = <&pinctrl_prox>;
535	};
536
537	accel-gyro@6a {
538		compatible = "st,lsm9ds1-imu";
539		reg = <0x6a>;
540		vdd-supply = <&reg_3v3_p>;
541		vddio-supply = <&reg_3v3_p>;
542		mount-matrix =  "1",  "0",  "0",
543				"0",  "1",  "0",
544				"0",  "0", "-1";
545	};
546};
547
548&iomuxc {
549	pinctrl_bl: blgrp {
550		fsl,pins = <
551			MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT	0x6 /* DSI_BL_PWM */
552		>;
553	};
554
555	pinctrl_bt: btgrp {
556		fsl,pins = <
557			MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11	0x16 /* nBT_DISABLE */
558			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x10 /* BT_HOST_WAKE */
559		>;
560	};
561
562	pinctrl_charger: chargergrp {
563		fsl,pins = <
564			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x80 /* CHRG_nINT */
565		>;
566	};
567
568	pinctrl_fec1: fec1grp {
569		fsl,pins = <
570			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
571			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
572			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
573			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
574			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
575			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
576			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
577			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
578			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
579			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
580			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
581			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
582			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
583			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
584			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
585			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
586		>;
587	};
588
589	pinctrl_ts: tsgrp {
590		fsl,pins = <
591			MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0		0x16  /* TOUCH INT */
592			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x19  /* TOUCH RST */
593		>;
594	};
595
596	pinctrl_gpio_leds: gpioledgrp {
597		fsl,pins = <
598			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
599		>;
600	};
601
602	pinctrl_gpio_keys: gpiokeygrp {
603		fsl,pins = <
604			MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21	0x16
605			MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22	0x16
606			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x180  /* HP_DET */
607			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80   /* nWoWWAN */
608		>;
609	};
610
611	pinctrl_haptic: hapticgrp {
612		fsl,pins = <
613			MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4		0xc6   /* nHAPTIC */
614		>;
615	};
616
617	pinctrl_i2c1: i2c1grp {
618		fsl,pins = <
619			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x4000001f
620			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x4000001f
621		>;
622	};
623
624	pinctrl_i2c3: i2c3grp {
625		fsl,pins = <
626			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x4000001f
627			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x4000001f
628		>;
629	};
630
631	pinctrl_imu: imugrp {
632		fsl,pins = <
633			MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19	0x8  /* IMU_INT */
634		>;
635	};
636
637	pinctrl_pmic: pmicgrp {
638		fsl,pins = <
639			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x80  /* PMIC intr */
640		>;
641	};
642
643	pinctrl_prox: proxgrp {
644		fsl,pins = <
645			MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x80  /* prox intr */
646		>;
647	};
648
649	pinctrl_pwr_en: pwrengrp {
650		fsl,pins = <
651			MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x06
652		>;
653	};
654
655	pinctrl_rtc: rtcgrp {
656		fsl,pins = <
657			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x80  /* RTC intr */
658		>;
659	};
660
661	pinctrl_sai2: sai2grp {
662		fsl,pins = <
663			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
664			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
665			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
666			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
667			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
668		>;
669	};
670
671	pinctrl_sai6: sai6grp {
672		fsl,pins = <
673			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
674			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
675			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
676			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
677		>;
678	};
679
680	pinctrl_typec: typecgrp {
681		fsl,pins = <
682			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12		0x16
683			MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1		0x80
684		>;
685	};
686
687	pinctrl_uart1: uart1grp {
688		fsl,pins = <
689			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
690			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
691		>;
692	};
693
694	pinctrl_uart2: uart2grp {
695		fsl,pins = <
696			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
697			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
698			MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
699			MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
700		>;
701	};
702
703	pinctrl_uart3: uart3grp {
704		fsl,pins = <
705			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
706			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
707		>;
708	};
709
710	pinctrl_uart4: uart4grp {
711		fsl,pins = <
712			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
713			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
714			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
715			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
716			MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x49
717		>;
718	};
719
720	pinctrl_usdhc1: usdhc1grp {
721		fsl,pins = <
722			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
723			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
724			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
725			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
726			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
727			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
728			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
729			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
730			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
731			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
732			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
733			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
734		>;
735	};
736
737	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
738		fsl,pins = <
739			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
740			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
741			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
742			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
743			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
744			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
745			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
746			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
747			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
748			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
749			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
750			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
751		>;
752	};
753
754	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
755		fsl,pins = <
756			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
757			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
758			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
759			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
760			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
761			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
762			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
763			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
764			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
765			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
766			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
767			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
768		>;
769	};
770
771	pinctrl_usdhc2_pwr: usdhc2grppwr {
772		fsl,pins = <
773			MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
774		>;
775	};
776
777	pinctrl_usdhc2_gpio: usdhc2grpgpio {
778		fsl,pins = <
779			MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20		0x80 /* WIFI_WAKE */
780		>;
781	};
782
783	pinctrl_usdhc2: usdhc2grp {
784		fsl,pins = <
785			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
786			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
787			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
788			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
789			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
790			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
791		>;
792	};
793
794	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
795		fsl,pins = <
796			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
797			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
798			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
799			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
800			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
801			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
802		>;
803	};
804
805	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
806		fsl,pins = <
807			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
808			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
809			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
810			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
811			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
812			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
813		>;
814	};
815
816	pinctrl_wdog: wdoggrp {
817		fsl,pins = <
818			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0xc6
819		>;
820	};
821
822	pinctrl_wifi_pwr_en: wifipwrengrp {
823		fsl,pins = <
824			MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5         0x06
825		>;
826	};
827
828	pinctrl_wwan: wwangrp {
829		fsl,pins = <
830			MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4	0x09 /* nWWAN_DISABLE */
831			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80 /* nWoWWAN */
832			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19 /* WWAN_RESET */
833		>;
834	};
835};
836
837&pgc_gpu {
838	power-supply = <&buck3_reg>;
839};
840
841&pgc_vpu {
842	power-supply = <&buck4_reg>;
843};
844
845&pwm1 {
846	pinctrl-names = "default";
847	pinctrl-0 = <&pinctrl_bl>;
848	status = "okay";
849};
850
851&snvs_pwrkey {
852	status = "okay";
853};
854
855&sai2 {
856	pinctrl-names = "default";
857	pinctrl-0 = <&pinctrl_sai2>;
858	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
859	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
860	assigned-clock-rates = <24576000>;
861	status = "okay";
862};
863
864&sai6 {
865	pinctrl-names = "default";
866	pinctrl-0 = <&pinctrl_sai6>;
867	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
868	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
869	assigned-clock-rates = <24576000>;
870	fsl,sai-synchronous-rx;
871	status = "okay";
872};
873
874&uart1 { /* console */
875	pinctrl-names = "default";
876	pinctrl-0 = <&pinctrl_uart1>;
877	status = "okay";
878};
879
880&uart3 { /* GNSS */
881	pinctrl-names = "default";
882	pinctrl-0 = <&pinctrl_uart3>;
883	status = "okay";
884};
885
886&uart4 { /* BT */
887	pinctrl-names = "default";
888	pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
889	uart-has-rtscts;
890	status = "okay";
891};
892
893&usb3_phy0 {
894	vbus-supply = <&reg_5v_p>;
895	status = "okay";
896};
897
898&usb3_phy1 {
899	vbus-supply = <&reg_5v_p>;
900	status = "okay";
901};
902
903&usb_dwc3_0 {
904	#address-cells = <1>;
905	#size-cells = <0>;
906	dr_mode = "otg";
907	status = "okay";
908
909	port@0 {
910		reg = <0>;
911
912		typec_hs: endpoint {
913			remote-endpoint = <&usb_con_hs>;
914		};
915	};
916
917	port@1 {
918		reg = <1>;
919
920		typec_ss: endpoint {
921			remote-endpoint = <&usb_con_ss>;
922		};
923	};
924};
925
926&usb_dwc3_1 {
927	dr_mode = "host";
928	status = "okay";
929};
930
931&usdhc1 {
932	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
933	assigned-clock-rates = <400000000>;
934	pinctrl-names = "default", "state_100mhz", "state_200mhz";
935	pinctrl-0 = <&pinctrl_usdhc1>;
936	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
937	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
938	bus-width = <8>;
939	non-removable;
940	status = "okay";
941};
942
943&usdhc2 {
944	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
945	assigned-clock-rates = <200000000>;
946	pinctrl-names = "default", "state_100mhz", "state_200mhz";
947	pinctrl-0 = <&pinctrl_usdhc2>;
948	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
949	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
950	bus-width = <4>;
951	vmmc-supply = <&reg_usdhc2_vmmc>;
952	power-supply = <&wifi_pwr_en>;
953	broken-cd;
954	disable-wp;
955	cap-sdio-irq;
956	keep-power-in-suspend;
957	wakeup-source;
958	status = "okay";
959};
960
961&wdog1 {
962	pinctrl-names = "default";
963	pinctrl-0 = <&pinctrl_wdog>;
964	fsl,ext-reset-output;
965	status = "okay";
966};
967