1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2019 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include "dt-bindings/pwm/pwm.h"
11#include "dt-bindings/usb/pd.h"
12#include "imx8mq.dtsi"
13
14/ {
15	model = "Purism Librem 5 devkit";
16	compatible = "purism,librem5-devkit", "fsl,imx8mq";
17
18	backlight_dsi: backlight-dsi {
19		compatible = "pwm-backlight";
20		/* 200 Hz for the PAM2841 */
21		pwms = <&pwm1 0 5000000>;
22		brightness-levels = <0 100>;
23		num-interpolated-steps = <100>;
24		/* Default brightness level (index into the array defined by */
25		/* the "brightness-levels" property) */
26		default-brightness-level = <0>;
27		power-supply = <&reg_22v4_p>;
28	};
29
30	chosen {
31		stdout-path = &uart1;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36		pinctrl-names = "default";
37		pinctrl-0 = <&pinctrl_gpio_keys>;
38
39		btn1 {
40			label = "VOL_UP";
41			gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
42			wakeup-source;
43			linux,code = <KEY_VOLUMEUP>;
44		};
45
46		btn2 {
47			label = "VOL_DOWN";
48			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
49			wakeup-source;
50			linux,code = <KEY_VOLUMEDOWN>;
51		};
52
53		hp-det {
54			label = "HP_DET";
55			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
56			wakeup-source;
57			linux,code = <KEY_HP>;
58		};
59
60		wwan-wake {
61			label = "WWAN_WAKE";
62			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
63			interrupt-parent = <&gpio3>;
64			interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
65			wakeup-source;
66			linux,code = <KEY_PHONE>;
67		};
68	};
69
70	leds {
71		compatible = "gpio-leds";
72		pinctrl-names = "default";
73		pinctrl-0 = <&pinctrl_gpio_leds>;
74
75		led1 {
76			label = "LED 1";
77			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
78			default-state = "off";
79		};
80	};
81
82	pmic_osc: clock-pmic {
83		compatible = "fixed-clock";
84		#clock-cells = <0>;
85		clock-frequency = <32768>;
86		clock-output-names = "pmic_osc";
87	};
88
89	reg_1v8_p: regulator-1v8-p {
90		compatible = "regulator-fixed";
91		regulator-name = "1v8_p";
92		regulator-min-microvolt = <1800000>;
93		regulator-max-microvolt = <1800000>;
94		vin-supply = <&reg_pwr_en>;
95	};
96
97	reg_2v8_p: regulator-2v8-p {
98		compatible = "regulator-fixed";
99		regulator-name = "2v8_p";
100		regulator-min-microvolt = <2800000>;
101		regulator-max-microvolt = <2800000>;
102		vin-supply = <&reg_pwr_en>;
103	};
104
105	reg_3v3_p: regulator-3v3-p {
106		compatible = "regulator-fixed";
107		regulator-name = "3v3_p";
108		regulator-min-microvolt = <3300000>;
109		regulator-max-microvolt = <3300000>;
110		vin-supply = <&reg_pwr_en>;
111
112		regulator-state-mem {
113			regulator-on-in-suspend;
114		};
115	};
116
117	reg_5v_p: regulator-5v-p {
118		compatible = "regulator-fixed";
119		regulator-name = "5v_p";
120		regulator-min-microvolt = <5000000>;
121		regulator-max-microvolt = <5000000>;
122		vin-supply = <&reg_pwr_en>;
123
124		regulator-state-mem {
125			regulator-on-in-suspend;
126		};
127	};
128
129	reg_22v4_p: regulator-22v4-p  {
130		compatible = "regulator-fixed";
131		regulator-name = "22v4_P";
132		regulator-min-microvolt = <22400000>;
133		regulator-max-microvolt = <22400000>;
134		vin-supply = <&reg_pwr_en>;
135	};
136
137	reg_pwr_en: regulator-pwr-en {
138		compatible = "regulator-fixed";
139		pinctrl-names = "default";
140		pinctrl-0 = <&pinctrl_pwr_en>;
141		regulator-name = "PWR_EN";
142		regulator-min-microvolt = <3300000>;
143		regulator-max-microvolt = <3300000>;
144		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
145		enable-active-high;
146		regulator-always-on;
147	};
148
149	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
150		compatible = "regulator-fixed";
151		pinctrl-names = "default";
152		pinctrl-0 = <&pinctrl_usdhc2_pwr>;
153		regulator-name = "VSD_3V3";
154		regulator-min-microvolt = <3300000>;
155		regulator-max-microvolt = <3300000>;
156		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
157		enable-active-high;
158		regulator-always-on;
159	};
160
161	wwan_codec: sound-wwan-codec {
162		compatible = "option,gtm601";
163		#sound-dai-cells = <0>;
164	};
165
166	sound {
167		compatible = "simple-audio-card";
168		simple-audio-card,name = "Librem 5 Devkit";
169		simple-audio-card,format = "i2s";
170		simple-audio-card,widgets =
171			"Microphone", "Microphone Jack",
172			"Headphone", "Headphone Jack",
173			"Speaker", "Speaker Ext",
174			"Line", "Line In Jack";
175		simple-audio-card,routing =
176			"MIC_IN", "Microphone Jack",
177			"Microphone Jack", "Mic Bias",
178			"LINE_IN", "Line In Jack",
179			"Headphone Jack", "HP_OUT",
180			"Speaker Ext", "LINE_OUT";
181
182		simple-audio-card,cpu {
183			sound-dai = <&sai2>;
184		};
185
186		simple-audio-card,codec {
187			sound-dai = <&sgtl5000>;
188			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
189			frame-master;
190			bitclock-master;
191		};
192	};
193
194	sound-wwan {
195		compatible = "simple-audio-card";
196		simple-audio-card,name = "SIMCom SIM7100";
197		simple-audio-card,format = "dsp_a";
198
199		simple-audio-card,cpu {
200			sound-dai = <&sai6>;
201		};
202
203		telephony_link_master: simple-audio-card,codec {
204			sound-dai = <&wwan_codec>;
205			frame-master;
206			bitclock-master;
207		};
208	};
209
210	vibrator {
211		compatible = "gpio-vibrator";
212		pinctrl-names = "default";
213		pinctrl-0 = <&pinctrl_haptic>;
214	        enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
215		vcc-supply = <&reg_3v3_p>;
216	};
217
218	wifi_pwr_en: regulator-wifi-en {
219		compatible = "regulator-fixed";
220		pinctrl-names = "default";
221		pinctrl-0 = <&pinctrl_wifi_pwr_en>;
222		regulator-name = "WIFI_EN";
223		regulator-min-microvolt = <3300000>;
224		regulator-max-microvolt = <3300000>;
225		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
226		enable-active-high;
227		regulator-always-on;
228	};
229};
230
231&A53_0 {
232	cpu-supply = <&buck2_reg>;
233};
234
235&A53_1 {
236	cpu-supply = <&buck2_reg>;
237};
238
239&A53_2 {
240	cpu-supply = <&buck2_reg>;
241};
242
243&A53_3 {
244	cpu-supply = <&buck2_reg>;
245};
246
247&dphy {
248	status = "okay";
249};
250
251&fec1 {
252	pinctrl-names = "default";
253	pinctrl-0 = <&pinctrl_fec1>;
254	phy-mode = "rgmii-id";
255	phy-handle = <&ethphy0>;
256	fsl,magic-packet;
257	phy-supply = <&reg_3v3_p>;
258	status = "okay";
259
260	mdio {
261		#address-cells = <1>;
262		#size-cells = <0>;
263
264		ethphy0: ethernet-phy@1 {
265			compatible = "ethernet-phy-ieee802.3-c22";
266			reg = <1>;
267		};
268	};
269};
270
271&i2c1 {
272	clock-frequency = <100000>;
273	pinctrl-names = "default";
274	pinctrl-0 = <&pinctrl_i2c1>;
275	status = "okay";
276
277	pmic: pmic@4b {
278		compatible = "rohm,bd71837";
279		reg = <0x4b>;
280		pinctrl-names = "default";
281		pinctrl-0 = <&pinctrl_pmic>;
282		clocks = <&pmic_osc>;
283		clock-names = "osc";
284		#clock-cells = <0>;
285		clock-output-names = "pmic_clk";
286		interrupt-parent = <&gpio1>;
287		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
288		rohm,reset-snvs-powered;
289
290		regulators {
291			buck1_reg: BUCK1 {
292				regulator-name = "buck1";
293				regulator-min-microvolt = <700000>;
294				regulator-max-microvolt = <1300000>;
295				regulator-boot-on;
296				regulator-always-on;
297				regulator-ramp-delay = <1250>;
298				rohm,dvs-run-voltage = <900000>;
299				rohm,dvs-idle-voltage = <850000>;
300				rohm,dvs-suspend-voltage = <800000>;
301			};
302
303			buck2_reg: BUCK2 {
304				regulator-name = "buck2";
305				regulator-min-microvolt = <700000>;
306				regulator-max-microvolt = <1300000>;
307				regulator-boot-on;
308				regulator-ramp-delay = <1250>;
309				rohm,dvs-run-voltage = <1000000>;
310				rohm,dvs-idle-voltage = <900000>;
311			};
312
313			buck3_reg: BUCK3 {
314				regulator-name = "buck3";
315				regulator-min-microvolt = <700000>;
316				regulator-max-microvolt = <1300000>;
317				regulator-boot-on;
318				rohm,dvs-run-voltage = <900000>;
319			};
320
321			buck4_reg: BUCK4 {
322				regulator-name = "buck4";
323				regulator-min-microvolt = <700000>;
324				regulator-max-microvolt = <1300000>;
325				rohm,dvs-run-voltage = <1000000>;
326			};
327
328			buck5_reg: BUCK5 {
329				regulator-name = "buck5";
330				regulator-min-microvolt = <700000>;
331				regulator-max-microvolt = <1350000>;
332				regulator-boot-on;
333				regulator-always-on;
334			};
335
336			buck6_reg: BUCK6 {
337				regulator-name = "buck6";
338				regulator-min-microvolt = <3000000>;
339				regulator-max-microvolt = <3300000>;
340				regulator-boot-on;
341				regulator-always-on;
342			};
343
344			buck7_reg: BUCK7 {
345				regulator-name = "buck7";
346				regulator-min-microvolt = <1605000>;
347				regulator-max-microvolt = <1995000>;
348				regulator-boot-on;
349				regulator-always-on;
350			};
351
352			buck8_reg: BUCK8 {
353				regulator-name = "buck8";
354				regulator-min-microvolt = <800000>;
355				regulator-max-microvolt = <1400000>;
356				regulator-boot-on;
357				regulator-always-on;
358			};
359
360			ldo1_reg: LDO1 {
361				regulator-name = "ldo1";
362				regulator-min-microvolt = <3000000>;
363				regulator-max-microvolt = <3300000>;
364				regulator-boot-on;
365				/* leave on for snvs power button */
366				regulator-always-on;
367			};
368
369			ldo2_reg: LDO2 {
370				regulator-name = "ldo2";
371				regulator-min-microvolt = <900000>;
372				regulator-max-microvolt = <900000>;
373				regulator-boot-on;
374				/* leave on for snvs power button */
375				regulator-always-on;
376			};
377
378			ldo3_reg: LDO3 {
379				regulator-name = "ldo3";
380				regulator-min-microvolt = <1800000>;
381				regulator-max-microvolt = <3300000>;
382				regulator-boot-on;
383				regulator-always-on;
384			};
385
386			ldo4_reg: LDO4 {
387				regulator-name = "ldo4";
388				regulator-min-microvolt = <900000>;
389				regulator-max-microvolt = <1800000>;
390				regulator-boot-on;
391				regulator-always-on;
392			};
393
394			ldo5_reg: LDO5 {
395				regulator-name = "ldo5";
396				regulator-min-microvolt = <1800000>;
397				regulator-max-microvolt = <3300000>;
398				regulator-always-on;
399			};
400
401			ldo6_reg: LDO6 {
402				regulator-name = "ldo6";
403				regulator-min-microvolt = <900000>;
404				regulator-max-microvolt = <1800000>;
405				regulator-boot-on;
406				regulator-always-on;
407			};
408
409			ldo7_reg: LDO7 {
410				regulator-name = "ldo7";
411				regulator-min-microvolt = <1800000>;
412				regulator-max-microvolt = <3300000>;
413				regulator-boot-on;
414				regulator-always-on;
415			};
416		};
417	};
418
419	typec_ptn5100: usb-typec@52 {
420		compatible = "nxp,ptn5110";
421		reg = <0x52>;
422		pinctrl-names = "default";
423		pinctrl-0 = <&pinctrl_typec>;
424		interrupt-parent = <&gpio3>;
425		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
426
427		connector {
428			compatible = "usb-c-connector";
429			label = "USB-C";
430			data-role = "dual";
431			power-role = "dual";
432			try-power-role = "sink";
433			source-pdos = <PDO_FIXED(5000, 2000,
434				PDO_FIXED_USB_COMM |
435				PDO_FIXED_DUAL_ROLE |
436				PDO_FIXED_DATA_SWAP )>;
437			sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM |
438				PDO_FIXED_DUAL_ROLE |
439				PDO_FIXED_DATA_SWAP )
440			     PDO_VAR(5000, 5000, 3500)>;
441			op-sink-microwatt = <10000000>;
442
443			ports {
444				#address-cells = <1>;
445				#size-cells = <0>;
446
447				port@0 {
448					reg = <0>;
449
450					usb_con_hs: endpoint {
451						remote-endpoint = <&typec_hs>;
452					};
453				};
454
455				port@1 {
456					reg = <1>;
457
458					usb_con_ss: endpoint {
459						remote-endpoint = <&typec_ss>;
460					};
461				};
462			};
463		};
464	};
465
466	rtc@68 {
467		compatible = "microcrystal,rv4162";
468		reg = <0x68>;
469		pinctrl-names = "default";
470		pinctrl-0 = <&pinctrl_rtc>;
471		interrupt-parent = <&gpio4>;
472		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
473	};
474
475	charger@6b { /* bq25896 */
476		compatible = "ti,bq25890";
477		reg = <0x6b>;
478		pinctrl-names = "default";
479		pinctrl-0 = <&pinctrl_charger>;
480		interrupt-parent = <&gpio3>;
481		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
482		ti,battery-regulation-voltage = <4192000>; /* 4.192V */
483		ti,charge-current = <1600000>; /* 1.6A */
484		ti,termination-current = <66000>;  /* 66mA */
485		ti,precharge-current = <130000>; /* 130mA */
486		ti,minimum-sys-voltage = <3000000>; /* 3V */
487		ti,boost-voltage = <5000000>; /* 5V */
488		ti,boost-max-current = <50000>; /* 50mA */
489	};
490};
491
492&i2c3 {
493	clock-frequency = <100000>;
494	pinctrl-names = "default";
495	pinctrl-0 = <&pinctrl_i2c3>;
496	status = "okay";
497
498	magnetometer@1e	{
499		compatible = "st,lsm9ds1-magn";
500		reg = <0x1e>;
501		pinctrl-names = "default";
502		pinctrl-0 = <&pinctrl_imu>;
503		interrupt-parent = <&gpio3>;
504		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
505		vdd-supply = <&reg_3v3_p>;
506		vddio-supply = <&reg_3v3_p>;
507	};
508
509	sgtl5000: audio-codec@a {
510		compatible = "fsl,sgtl5000";
511		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
512		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
513		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
514		assigned-clock-rates = <24576000>;
515		#sound-dai-cells = <0>;
516		reg = <0x0a>;
517		VDDD-supply = <&reg_1v8_p>;
518		VDDIO-supply = <&reg_3v3_p>;
519		VDDA-supply = <&reg_3v3_p>;
520	};
521
522	touchscreen@5d {
523		compatible = "goodix,gt5688";
524		reg = <0x5d>;
525		pinctrl-names = "default";
526		pinctrl-0 = <&pinctrl_ts>;
527		interrupt-parent = <&gpio3>;
528		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
529		reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
530		irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
531		touchscreen-size-x = <720>;
532		touchscreen-size-y = <1440>;
533		AVDD28-supply = <&reg_2v8_p>;
534		VDDIO-supply = <&reg_1v8_p>;
535	};
536
537	proximity-sensor@60 {
538		compatible = "vishay,vcnl4040";
539		reg = <0x60>;
540		pinctrl-0 = <&pinctrl_prox>;
541	};
542
543	accel-gyro@6a {
544		compatible = "st,lsm9ds1-imu";
545		reg = <0x6a>;
546		vdd-supply = <&reg_3v3_p>;
547		vddio-supply = <&reg_3v3_p>;
548		mount-matrix =  "1",  "0",  "0",
549				"0",  "1",  "0",
550				"0",  "0", "-1";
551	};
552};
553
554&iomuxc {
555	pinctrl_bl: blgrp {
556		fsl,pins = <
557			MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT	0x6 /* DSI_BL_PWM */
558		>;
559	};
560
561	pinctrl_bt: btgrp {
562		fsl,pins = <
563			MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11	0x16 /* nBT_DISABLE */
564			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x10 /* BT_HOST_WAKE */
565		>;
566	};
567
568	pinctrl_charger: chargergrp {
569		fsl,pins = <
570			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x80 /* CHRG_nINT */
571		>;
572	};
573
574	pinctrl_fec1: fec1grp {
575		fsl,pins = <
576			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
577			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
578			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
579			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
580			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
581			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
582			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
583			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
584			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
585			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
586			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
587			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
588			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
589			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
590			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
591			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
592		>;
593	};
594
595	pinctrl_ts: tsgrp {
596		fsl,pins = <
597			MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0		0x16  /* TOUCH INT */
598			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x19  /* TOUCH RST */
599		>;
600	};
601
602	pinctrl_gpio_leds: gpioledgrp {
603		fsl,pins = <
604			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
605		>;
606	};
607
608	pinctrl_gpio_keys: gpiokeygrp {
609		fsl,pins = <
610			MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21	0x16
611			MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22	0x16
612			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x180  /* HP_DET */
613			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80   /* nWoWWAN */
614		>;
615	};
616
617	pinctrl_haptic: hapticgrp {
618		fsl,pins = <
619			MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4		0xc6   /* nHAPTIC */
620		>;
621	};
622
623	pinctrl_i2c1: i2c1grp {
624		fsl,pins = <
625			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x4000001f
626			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x4000001f
627		>;
628	};
629
630	pinctrl_i2c3: i2c3grp {
631		fsl,pins = <
632			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x4000001f
633			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x4000001f
634		>;
635	};
636
637	pinctrl_imu: imugrp {
638		fsl,pins = <
639			MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19	0x8  /* IMU_INT */
640		>;
641	};
642
643	pinctrl_pmic: pmicgrp {
644		fsl,pins = <
645			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x80  /* PMIC intr */
646		>;
647	};
648
649	pinctrl_prox: proxgrp {
650		fsl,pins = <
651			MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x80  /* prox intr */
652		>;
653	};
654
655	pinctrl_pwr_en: pwrengrp {
656		fsl,pins = <
657			MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x06
658		>;
659	};
660
661	pinctrl_rtc: rtcgrp {
662		fsl,pins = <
663			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x80  /* RTC intr */
664		>;
665	};
666
667	pinctrl_sai2: sai2grp {
668		fsl,pins = <
669			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
670			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
671			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
672			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
673			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
674		>;
675	};
676
677	pinctrl_sai6: sai6grp {
678		fsl,pins = <
679			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
680			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
681			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
682			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
683		>;
684	};
685
686	pinctrl_typec: typecgrp {
687		fsl,pins = <
688			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12		0x16
689			MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1		0x80
690		>;
691	};
692
693	pinctrl_uart1: uart1grp {
694		fsl,pins = <
695			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
696			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
697		>;
698	};
699
700	pinctrl_uart2: uart2grp {
701		fsl,pins = <
702			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
703			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
704			MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
705			MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
706		>;
707	};
708
709	pinctrl_uart3: uart3grp {
710		fsl,pins = <
711			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
712			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
713		>;
714	};
715
716	pinctrl_uart4: uart4grp {
717		fsl,pins = <
718			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
719			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
720			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
721			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
722			MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x49
723		>;
724	};
725
726	pinctrl_usdhc1: usdhc1grp {
727		fsl,pins = <
728			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
729			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
730			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
731			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
732			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
733			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
734			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
735			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
736			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
737			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
738			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
739			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
740		>;
741	};
742
743	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
744		fsl,pins = <
745			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
746			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
747			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
748			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
749			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
750			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
751			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
752			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
753			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
754			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
755			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
756			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
757		>;
758	};
759
760	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
761		fsl,pins = <
762			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
763			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
764			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
765			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
766			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
767			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
768			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
769			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
770			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
771			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
772			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
773			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
774		>;
775	};
776
777	pinctrl_usdhc2_pwr: usdhc2pwrgrp {
778		fsl,pins = <
779			MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
780		>;
781	};
782
783	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
784		fsl,pins = <
785			MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20		0x80 /* WIFI_WAKE */
786		>;
787	};
788
789	pinctrl_usdhc2: usdhc2grp {
790		fsl,pins = <
791			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
792			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
793			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
794			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
795			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
796			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
797		>;
798	};
799
800	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
801		fsl,pins = <
802			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
803			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
804			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
805			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
806			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
807			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
808		>;
809	};
810
811	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
812		fsl,pins = <
813			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
814			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
815			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
816			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
817			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
818			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
819		>;
820	};
821
822	pinctrl_wdog: wdoggrp {
823		fsl,pins = <
824			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0xc6
825		>;
826	};
827
828	pinctrl_wifi_pwr_en: wifipwrengrp {
829		fsl,pins = <
830			MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5         0x06
831		>;
832	};
833
834	pinctrl_wwan: wwangrp {
835		fsl,pins = <
836			MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4	0x09 /* nWWAN_DISABLE */
837			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80 /* nWoWWAN */
838			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19 /* WWAN_RESET */
839		>;
840	};
841};
842
843&lcdif {
844	status = "okay";
845};
846
847&mipi_dsi {
848	status = "okay";
849	#address-cells = <1>;
850	#size-cells = <0>;
851
852	panel@0 {
853		compatible = "rocktech,jh057n00900";
854		reg = <0>;
855		backlight = <&backlight_dsi>;
856		reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
857		iovcc-supply = <&reg_1v8_p>;
858		vcc-supply = <&reg_2v8_p>;
859		port {
860			panel_in: endpoint {
861				remote-endpoint = <&mipi_dsi_out>;
862			};
863		};
864	};
865
866	ports {
867		port@1 {
868			reg = <1>;
869			mipi_dsi_out: endpoint {
870				remote-endpoint = <&panel_in>;
871			};
872		};
873	};
874};
875
876&pgc_gpu {
877	power-supply = <&buck3_reg>;
878};
879
880&pgc_vpu {
881	power-supply = <&buck4_reg>;
882};
883
884&pwm1 {
885	pinctrl-names = "default";
886	pinctrl-0 = <&pinctrl_bl>;
887	status = "okay";
888};
889
890&snvs_pwrkey {
891	status = "okay";
892};
893
894&snvs_rtc {
895	status = "disabled";
896};
897
898&sai2 {
899	pinctrl-names = "default";
900	pinctrl-0 = <&pinctrl_sai2>;
901	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
902	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
903	assigned-clock-rates = <24576000>;
904	status = "okay";
905};
906
907&sai6 {
908	pinctrl-names = "default";
909	pinctrl-0 = <&pinctrl_sai6>;
910	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
911	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
912	assigned-clock-rates = <24576000>;
913	fsl,sai-synchronous-rx;
914	status = "okay";
915};
916
917&uart1 { /* console */
918	pinctrl-names = "default";
919	pinctrl-0 = <&pinctrl_uart1>;
920	status = "okay";
921};
922
923&uart3 { /* GNSS */
924	pinctrl-names = "default";
925	pinctrl-0 = <&pinctrl_uart3>;
926	status = "okay";
927};
928
929&uart4 { /* BT */
930	pinctrl-names = "default";
931	pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
932	uart-has-rtscts;
933	status = "okay";
934};
935
936&usb3_phy0 {
937	vbus-supply = <&reg_5v_p>;
938	status = "okay";
939};
940
941&usb3_phy1 {
942	vbus-supply = <&reg_5v_p>;
943	status = "okay";
944};
945
946&usb_dwc3_0 {
947	#address-cells = <1>;
948	#size-cells = <0>;
949	dr_mode = "otg";
950	status = "okay";
951
952	port@0 {
953		reg = <0>;
954
955		typec_hs: endpoint {
956			remote-endpoint = <&usb_con_hs>;
957		};
958	};
959
960	port@1 {
961		reg = <1>;
962
963		typec_ss: endpoint {
964			remote-endpoint = <&usb_con_ss>;
965		};
966	};
967};
968
969&usb_dwc3_1 {
970	dr_mode = "host";
971	status = "okay";
972};
973
974&usdhc1 {
975	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
976	assigned-clock-rates = <400000000>;
977	pinctrl-names = "default", "state_100mhz", "state_200mhz";
978	pinctrl-0 = <&pinctrl_usdhc1>;
979	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
980	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
981	bus-width = <8>;
982	non-removable;
983	status = "okay";
984};
985
986&usdhc2 {
987	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
988	assigned-clock-rates = <200000000>;
989	pinctrl-names = "default", "state_100mhz", "state_200mhz";
990	pinctrl-0 = <&pinctrl_usdhc2>;
991	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
992	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
993	bus-width = <4>;
994	vmmc-supply = <&reg_usdhc2_vmmc>;
995	power-supply = <&wifi_pwr_en>;
996	broken-cd;
997	disable-wp;
998	cap-sdio-irq;
999	keep-power-in-suspend;
1000	wakeup-source;
1001	status = "okay";
1002};
1003
1004&wdog1 {
1005	pinctrl-names = "default";
1006	pinctrl-0 = <&pinctrl_wdog>;
1007	fsl,ext-reset-output;
1008	status = "okay";
1009};
1010