1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2019 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include "dt-bindings/pwm/pwm.h"
11#include "dt-bindings/usb/pd.h"
12#include "imx8mq.dtsi"
13
14/ {
15	model = "Purism Librem 5 devkit";
16	compatible = "purism,librem5-devkit", "fsl,imx8mq";
17
18	backlight_dsi: backlight-dsi {
19		compatible = "pwm-backlight";
20		/* 200 Hz for the PAM2841 */
21		pwms = <&pwm1 0 5000000>;
22		brightness-levels = <0 100>;
23		num-interpolated-steps = <100>;
24		/* Default brightness level (index into the array defined by */
25		/* the "brightness-levels" property) */
26		default-brightness-level = <0>;
27		power-supply = <&reg_22v4_p>;
28	};
29
30	chosen {
31		stdout-path = &uart1;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36		pinctrl-names = "default";
37		pinctrl-0 = <&pinctrl_gpio_keys>;
38
39		btn1 {
40			label = "VOL_UP";
41			gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
42			wakeup-source;
43			linux,code = <KEY_VOLUMEUP>;
44		};
45
46		btn2 {
47			label = "VOL_DOWN";
48			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
49			wakeup-source;
50			linux,code = <KEY_VOLUMEDOWN>;
51		};
52
53		hp-det {
54			label = "HP_DET";
55			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
56			wakeup-source;
57			linux,code = <KEY_HP>;
58		};
59
60		wwan-wake {
61			label = "WWAN_WAKE";
62			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
63			interrupt-parent = <&gpio3>;
64			interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
65			wakeup-source;
66			linux,code = <KEY_PHONE>;
67		};
68	};
69
70	leds {
71		compatible = "gpio-leds";
72		pinctrl-names = "default";
73		pinctrl-0 = <&pinctrl_gpio_leds>;
74
75		led1 {
76			label = "LED 1";
77			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
78			default-state = "off";
79		};
80	};
81
82	pmic_osc: clock-pmic {
83		compatible = "fixed-clock";
84		#clock-cells = <0>;
85		clock-frequency = <32768>;
86		clock-output-names = "pmic_osc";
87	};
88
89	reg_1v8_p: regulator-1v8-p {
90		compatible = "regulator-fixed";
91		regulator-name = "1v8_p";
92		regulator-min-microvolt = <1800000>;
93		regulator-max-microvolt = <1800000>;
94		vin-supply = <&reg_pwr_en>;
95	};
96
97	reg_2v8_p: regulator-2v8-p {
98		compatible = "regulator-fixed";
99		regulator-name = "2v8_p";
100		regulator-min-microvolt = <2800000>;
101		regulator-max-microvolt = <2800000>;
102		vin-supply = <&reg_pwr_en>;
103	};
104
105	reg_3v3_p: regulator-3v3-p {
106		compatible = "regulator-fixed";
107		regulator-name = "3v3_p";
108		regulator-min-microvolt = <3300000>;
109		regulator-max-microvolt = <3300000>;
110		vin-supply = <&reg_pwr_en>;
111
112		regulator-state-mem {
113			regulator-on-in-suspend;
114		};
115	};
116
117	reg_5v_p: regulator-5v-p {
118		compatible = "regulator-fixed";
119		regulator-name = "5v_p";
120		regulator-min-microvolt = <5000000>;
121		regulator-max-microvolt = <5000000>;
122		vin-supply = <&reg_pwr_en>;
123
124		regulator-state-mem {
125			regulator-on-in-suspend;
126		};
127	};
128
129	reg_22v4_p: regulator-22v4-p  {
130		compatible = "regulator-fixed";
131		regulator-name = "22v4_P";
132		regulator-min-microvolt = <22400000>;
133		regulator-max-microvolt = <22400000>;
134		vin-supply = <&reg_pwr_en>;
135	};
136
137	reg_pwr_en: regulator-pwr-en {
138		compatible = "regulator-fixed";
139		pinctrl-names = "default";
140		pinctrl-0 = <&pinctrl_pwr_en>;
141		regulator-name = "PWR_EN";
142		regulator-min-microvolt = <3300000>;
143		regulator-max-microvolt = <3300000>;
144		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
145		enable-active-high;
146		regulator-always-on;
147	};
148
149	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
150		compatible = "regulator-fixed";
151		pinctrl-names = "default";
152		pinctrl-0 = <&pinctrl_usdhc2_pwr>;
153		regulator-name = "VSD_3V3";
154		regulator-min-microvolt = <3300000>;
155		regulator-max-microvolt = <3300000>;
156		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
157		enable-active-high;
158		regulator-always-on;
159	};
160
161	wwan_codec: sound-wwan-codec {
162		compatible = "option,gtm601";
163		#sound-dai-cells = <0>;
164	};
165
166	sound {
167		compatible = "simple-audio-card";
168		simple-audio-card,aux-devs = <&speaker_amp>;
169		simple-audio-card,name = "Librem 5 Devkit";
170		simple-audio-card,format = "i2s";
171		simple-audio-card,widgets =
172			"Microphone", "Microphone Jack",
173			"Headphone", "Headphone Jack",
174			"Speaker", "Builtin Speaker";
175		simple-audio-card,routing =
176			"MIC_IN", "Microphone Jack",
177			"Microphone Jack", "Mic Bias",
178			"Headphone Jack", "HP_OUT",
179			"Builtin Speaker", "Speaker Amp OUTR",
180			"Speaker Amp INR", "LINE_OUT";
181
182		simple-audio-card,cpu {
183			sound-dai = <&sai2>;
184		};
185
186		simple-audio-card,codec {
187			sound-dai = <&sgtl5000>;
188			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
189			frame-master;
190			bitclock-master;
191		};
192	};
193
194	sound-wwan {
195		compatible = "simple-audio-card";
196		simple-audio-card,name = "SIMCom SIM7100";
197		simple-audio-card,format = "dsp_a";
198
199		simple-audio-card,cpu {
200			sound-dai = <&sai6>;
201		};
202
203		telephony_link_master: simple-audio-card,codec {
204			sound-dai = <&wwan_codec>;
205			frame-master;
206			bitclock-master;
207		};
208	};
209
210	speaker_amp: speaker-amp {
211		compatible = "simple-audio-amplifier";
212		pinctrl-names = "default";
213		pinctrl-0 = <&pinctrl_spkamp>;
214		VCC-supply = <&reg_3v3_p>;
215		sound-name-prefix = "Speaker Amp";
216		enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
217	};
218
219	vibrator {
220		compatible = "gpio-vibrator";
221		pinctrl-names = "default";
222		pinctrl-0 = <&pinctrl_haptic>;
223	        enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
224		vcc-supply = <&reg_3v3_p>;
225	};
226
227	wifi_pwr_en: regulator-wifi-en {
228		compatible = "regulator-fixed";
229		pinctrl-names = "default";
230		pinctrl-0 = <&pinctrl_wifi_pwr_en>;
231		regulator-name = "WIFI_EN";
232		regulator-min-microvolt = <3300000>;
233		regulator-max-microvolt = <3300000>;
234		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
235		enable-active-high;
236		regulator-always-on;
237	};
238};
239
240&A53_0 {
241	cpu-supply = <&buck2_reg>;
242};
243
244&A53_1 {
245	cpu-supply = <&buck2_reg>;
246};
247
248&A53_2 {
249	cpu-supply = <&buck2_reg>;
250};
251
252&A53_3 {
253	cpu-supply = <&buck2_reg>;
254};
255
256&dphy {
257	status = "okay";
258};
259
260&fec1 {
261	pinctrl-names = "default";
262	pinctrl-0 = <&pinctrl_fec1>;
263	phy-mode = "rgmii-id";
264	phy-handle = <&ethphy0>;
265	fsl,magic-packet;
266	phy-supply = <&reg_3v3_p>;
267	status = "okay";
268
269	mdio {
270		#address-cells = <1>;
271		#size-cells = <0>;
272
273		ethphy0: ethernet-phy@1 {
274			compatible = "ethernet-phy-ieee802.3-c22";
275			reg = <1>;
276		};
277	};
278};
279
280&i2c1 {
281	clock-frequency = <100000>;
282	pinctrl-names = "default";
283	pinctrl-0 = <&pinctrl_i2c1>;
284	status = "okay";
285
286	pmic: pmic@4b {
287		compatible = "rohm,bd71837";
288		reg = <0x4b>;
289		pinctrl-names = "default";
290		pinctrl-0 = <&pinctrl_pmic>;
291		clocks = <&pmic_osc>;
292		clock-names = "osc";
293		#clock-cells = <0>;
294		clock-output-names = "pmic_clk";
295		interrupt-parent = <&gpio1>;
296		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
297		rohm,reset-snvs-powered;
298
299		regulators {
300			buck1_reg: BUCK1 {
301				regulator-name = "buck1";
302				regulator-min-microvolt = <700000>;
303				regulator-max-microvolt = <1300000>;
304				regulator-boot-on;
305				regulator-always-on;
306				regulator-ramp-delay = <1250>;
307				rohm,dvs-run-voltage = <900000>;
308				rohm,dvs-idle-voltage = <850000>;
309				rohm,dvs-suspend-voltage = <800000>;
310			};
311
312			buck2_reg: BUCK2 {
313				regulator-name = "buck2";
314				regulator-min-microvolt = <700000>;
315				regulator-max-microvolt = <1300000>;
316				regulator-boot-on;
317				regulator-ramp-delay = <1250>;
318				rohm,dvs-run-voltage = <1000000>;
319				rohm,dvs-idle-voltage = <900000>;
320			};
321
322			buck3_reg: BUCK3 {
323				regulator-name = "buck3";
324				regulator-min-microvolt = <700000>;
325				regulator-max-microvolt = <1300000>;
326				regulator-boot-on;
327				rohm,dvs-run-voltage = <900000>;
328			};
329
330			buck4_reg: BUCK4 {
331				regulator-name = "buck4";
332				regulator-min-microvolt = <700000>;
333				regulator-max-microvolt = <1300000>;
334				rohm,dvs-run-voltage = <1000000>;
335			};
336
337			buck5_reg: BUCK5 {
338				regulator-name = "buck5";
339				regulator-min-microvolt = <700000>;
340				regulator-max-microvolt = <1350000>;
341				regulator-boot-on;
342				regulator-always-on;
343			};
344
345			buck6_reg: BUCK6 {
346				regulator-name = "buck6";
347				regulator-min-microvolt = <3000000>;
348				regulator-max-microvolt = <3300000>;
349				regulator-boot-on;
350				regulator-always-on;
351			};
352
353			buck7_reg: BUCK7 {
354				regulator-name = "buck7";
355				regulator-min-microvolt = <1605000>;
356				regulator-max-microvolt = <1995000>;
357				regulator-boot-on;
358				regulator-always-on;
359			};
360
361			buck8_reg: BUCK8 {
362				regulator-name = "buck8";
363				regulator-min-microvolt = <800000>;
364				regulator-max-microvolt = <1400000>;
365				regulator-boot-on;
366				regulator-always-on;
367			};
368
369			ldo1_reg: LDO1 {
370				regulator-name = "ldo1";
371				regulator-min-microvolt = <3000000>;
372				regulator-max-microvolt = <3300000>;
373				regulator-boot-on;
374				/* leave on for snvs power button */
375				regulator-always-on;
376			};
377
378			ldo2_reg: LDO2 {
379				regulator-name = "ldo2";
380				regulator-min-microvolt = <900000>;
381				regulator-max-microvolt = <900000>;
382				regulator-boot-on;
383				/* leave on for snvs power button */
384				regulator-always-on;
385			};
386
387			ldo3_reg: LDO3 {
388				regulator-name = "ldo3";
389				regulator-min-microvolt = <1800000>;
390				regulator-max-microvolt = <3300000>;
391				regulator-boot-on;
392				regulator-always-on;
393			};
394
395			ldo4_reg: LDO4 {
396				regulator-name = "ldo4";
397				regulator-min-microvolt = <900000>;
398				regulator-max-microvolt = <1800000>;
399				regulator-boot-on;
400				regulator-always-on;
401			};
402
403			ldo5_reg: LDO5 {
404				regulator-name = "ldo5";
405				regulator-min-microvolt = <1800000>;
406				regulator-max-microvolt = <3300000>;
407				regulator-always-on;
408			};
409
410			ldo6_reg: LDO6 {
411				regulator-name = "ldo6";
412				regulator-min-microvolt = <900000>;
413				regulator-max-microvolt = <1800000>;
414				regulator-boot-on;
415				regulator-always-on;
416			};
417
418			ldo7_reg: LDO7 {
419				regulator-name = "ldo7";
420				regulator-min-microvolt = <1800000>;
421				regulator-max-microvolt = <3300000>;
422				regulator-boot-on;
423				regulator-always-on;
424			};
425		};
426	};
427
428	typec_ptn5100: usb-typec@52 {
429		compatible = "nxp,ptn5110";
430		reg = <0x52>;
431		pinctrl-names = "default";
432		pinctrl-0 = <&pinctrl_typec>;
433		interrupt-parent = <&gpio3>;
434		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
435
436		connector {
437			compatible = "usb-c-connector";
438			label = "USB-C";
439			data-role = "dual";
440			power-role = "dual";
441			try-power-role = "sink";
442			source-pdos = <PDO_FIXED(5000, 2000,
443				PDO_FIXED_USB_COMM |
444				PDO_FIXED_DUAL_ROLE |
445				PDO_FIXED_DATA_SWAP )>;
446			sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM |
447				PDO_FIXED_DUAL_ROLE |
448				PDO_FIXED_DATA_SWAP )
449			     PDO_VAR(5000, 5000, 3500)>;
450			op-sink-microwatt = <10000000>;
451
452			ports {
453				#address-cells = <1>;
454				#size-cells = <0>;
455
456				port@0 {
457					reg = <0>;
458
459					usb_con_hs: endpoint {
460						remote-endpoint = <&typec_hs>;
461					};
462				};
463
464				port@1 {
465					reg = <1>;
466
467					usb_con_ss: endpoint {
468						remote-endpoint = <&typec_ss>;
469					};
470				};
471			};
472		};
473	};
474
475	rtc@68 {
476		compatible = "microcrystal,rv4162";
477		reg = <0x68>;
478		pinctrl-names = "default";
479		pinctrl-0 = <&pinctrl_rtc>;
480		interrupt-parent = <&gpio4>;
481		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
482	};
483
484	charger@6b { /* bq25896 */
485		compatible = "ti,bq25890";
486		reg = <0x6b>;
487		pinctrl-names = "default";
488		pinctrl-0 = <&pinctrl_charger>;
489		interrupt-parent = <&gpio3>;
490		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
491		ti,battery-regulation-voltage = <4192000>; /* 4.192V */
492		ti,charge-current = <1600000>; /* 1.6A */
493		ti,termination-current = <66000>;  /* 66mA */
494		ti,precharge-current = <130000>; /* 130mA */
495		ti,minimum-sys-voltage = <3000000>; /* 3V */
496		ti,boost-voltage = <5000000>; /* 5V */
497		ti,boost-max-current = <50000>; /* 50mA */
498	};
499};
500
501&i2c3 {
502	clock-frequency = <100000>;
503	pinctrl-names = "default";
504	pinctrl-0 = <&pinctrl_i2c3>;
505	status = "okay";
506
507	magnetometer@1e	{
508		compatible = "st,lsm9ds1-magn";
509		reg = <0x1e>;
510		pinctrl-names = "default";
511		pinctrl-0 = <&pinctrl_imu>;
512		interrupt-parent = <&gpio3>;
513		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
514		vdd-supply = <&reg_3v3_p>;
515		vddio-supply = <&reg_3v3_p>;
516	};
517
518	sgtl5000: audio-codec@a {
519		compatible = "fsl,sgtl5000";
520		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
521		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
522		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
523		assigned-clock-rates = <24576000>;
524		#sound-dai-cells = <0>;
525		reg = <0x0a>;
526		VDDD-supply = <&reg_1v8_p>;
527		VDDIO-supply = <&reg_3v3_p>;
528		VDDA-supply = <&reg_3v3_p>;
529	};
530
531	touchscreen@5d {
532		compatible = "goodix,gt5688";
533		reg = <0x5d>;
534		pinctrl-names = "default";
535		pinctrl-0 = <&pinctrl_ts>;
536		interrupt-parent = <&gpio3>;
537		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
538		reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
539		irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
540		touchscreen-size-x = <720>;
541		touchscreen-size-y = <1440>;
542		AVDD28-supply = <&reg_2v8_p>;
543		VDDIO-supply = <&reg_1v8_p>;
544	};
545
546	proximity-sensor@60 {
547		compatible = "vishay,vcnl4040";
548		reg = <0x60>;
549		pinctrl-0 = <&pinctrl_prox>;
550	};
551
552	accel-gyro@6a {
553		compatible = "st,lsm9ds1-imu";
554		reg = <0x6a>;
555		vdd-supply = <&reg_3v3_p>;
556		vddio-supply = <&reg_3v3_p>;
557		mount-matrix =  "1",  "0",  "0",
558				"0",  "1",  "0",
559				"0",  "0", "-1";
560	};
561};
562
563&iomuxc {
564	pinctrl_bl: blgrp {
565		fsl,pins = <
566			MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT	0x6 /* DSI_BL_PWM */
567		>;
568	};
569
570	pinctrl_bt: btgrp {
571		fsl,pins = <
572			MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11	0x16 /* nBT_DISABLE */
573			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x10 /* BT_HOST_WAKE */
574		>;
575	};
576
577	pinctrl_charger: chargergrp {
578		fsl,pins = <
579			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x80 /* CHRG_nINT */
580		>;
581	};
582
583	pinctrl_fec1: fec1grp {
584		fsl,pins = <
585			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
586			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
587			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
588			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
589			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
590			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
591			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
592			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
593			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
594			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
595			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
596			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
597			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
598			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
599			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
600			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
601		>;
602	};
603
604	pinctrl_ts: tsgrp {
605		fsl,pins = <
606			MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0		0x16  /* TOUCH INT */
607			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x19  /* TOUCH RST */
608		>;
609	};
610
611	pinctrl_gpio_leds: gpioledgrp {
612		fsl,pins = <
613			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
614		>;
615	};
616
617	pinctrl_gpio_keys: gpiokeygrp {
618		fsl,pins = <
619			MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21	0x16
620			MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22	0x16
621			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x180  /* HP_DET */
622			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80   /* nWoWWAN */
623		>;
624	};
625
626	pinctrl_haptic: hapticgrp {
627		fsl,pins = <
628			MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4		0xc6   /* nHAPTIC */
629		>;
630	};
631
632	pinctrl_i2c1: i2c1grp {
633		fsl,pins = <
634			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x4000001f
635			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x4000001f
636		>;
637	};
638
639	pinctrl_i2c3: i2c3grp {
640		fsl,pins = <
641			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x4000001f
642			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x4000001f
643		>;
644	};
645
646	pinctrl_imu: imugrp {
647		fsl,pins = <
648			MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19	0x8  /* IMU_INT */
649		>;
650	};
651
652	pinctrl_spkamp: spkamp {
653		fsl,pins = <
654			MX8MQ_IOMUXC_SPDIF_TX_GPIO5_IO3		0x81  /* MUTE */
655		>;
656	};
657
658	pinctrl_pmic: pmicgrp {
659		fsl,pins = <
660			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x80  /* PMIC intr */
661		>;
662	};
663
664	pinctrl_prox: proxgrp {
665		fsl,pins = <
666			MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x80  /* prox intr */
667		>;
668	};
669
670	pinctrl_pwr_en: pwrengrp {
671		fsl,pins = <
672			MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x06
673		>;
674	};
675
676	pinctrl_rtc: rtcgrp {
677		fsl,pins = <
678			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x80  /* RTC intr */
679		>;
680	};
681
682	pinctrl_sai2: sai2grp {
683		fsl,pins = <
684			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
685			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
686			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
687			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
688			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
689		>;
690	};
691
692	pinctrl_sai6: sai6grp {
693		fsl,pins = <
694			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
695			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
696			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
697			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
698		>;
699	};
700
701	pinctrl_typec: typecgrp {
702		fsl,pins = <
703			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12		0x16
704			MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1		0x80
705		>;
706	};
707
708	pinctrl_uart1: uart1grp {
709		fsl,pins = <
710			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
711			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
712		>;
713	};
714
715	pinctrl_uart2: uart2grp {
716		fsl,pins = <
717			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
718			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
719			MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
720			MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
721		>;
722	};
723
724	pinctrl_uart3: uart3grp {
725		fsl,pins = <
726			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
727			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
728		>;
729	};
730
731	pinctrl_uart4: uart4grp {
732		fsl,pins = <
733			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
734			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
735			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
736			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
737			MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x49
738		>;
739	};
740
741	pinctrl_usdhc1: usdhc1grp {
742		fsl,pins = <
743			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
744			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
745			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
746			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
747			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
748			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
749			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
750			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
751			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
752			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
753			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
754			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
755		>;
756	};
757
758	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
759		fsl,pins = <
760			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
761			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
762			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
763			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
764			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
765			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
766			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
767			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
768			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
769			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
770			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
771			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
772		>;
773	};
774
775	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
776		fsl,pins = <
777			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
778			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
779			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
780			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
781			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
782			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
783			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
784			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
785			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
786			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
787			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
788			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
789		>;
790	};
791
792	pinctrl_usdhc2_pwr: usdhc2pwrgrp {
793		fsl,pins = <
794			MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
795		>;
796	};
797
798	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
799		fsl,pins = <
800			MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20		0x80 /* WIFI_WAKE */
801		>;
802	};
803
804	pinctrl_usdhc2: usdhc2grp {
805		fsl,pins = <
806			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
807			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
808			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
809			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
810			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
811			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
812		>;
813	};
814
815	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
816		fsl,pins = <
817			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
818			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
819			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
820			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
821			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
822			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
823		>;
824	};
825
826	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
827		fsl,pins = <
828			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
829			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
830			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
831			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
832			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
833			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
834		>;
835	};
836
837	pinctrl_wdog: wdoggrp {
838		fsl,pins = <
839			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0xc6
840		>;
841	};
842
843	pinctrl_wifi_pwr_en: wifipwrengrp {
844		fsl,pins = <
845			MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5         0x06
846		>;
847	};
848
849	pinctrl_wwan: wwangrp {
850		fsl,pins = <
851			MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4	0x09 /* nWWAN_DISABLE */
852			MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80 /* nWoWWAN */
853			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19 /* WWAN_RESET */
854		>;
855	};
856};
857
858&lcdif {
859	status = "okay";
860};
861
862&mipi_dsi {
863	status = "okay";
864	#address-cells = <1>;
865	#size-cells = <0>;
866
867	panel@0 {
868		compatible = "rocktech,jh057n00900";
869		reg = <0>;
870		backlight = <&backlight_dsi>;
871		reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
872		iovcc-supply = <&reg_1v8_p>;
873		vcc-supply = <&reg_2v8_p>;
874		port {
875			panel_in: endpoint {
876				remote-endpoint = <&mipi_dsi_out>;
877			};
878		};
879	};
880
881	ports {
882		port@1 {
883			reg = <1>;
884			mipi_dsi_out: endpoint {
885				remote-endpoint = <&panel_in>;
886			};
887		};
888	};
889};
890
891&pgc_gpu {
892	power-supply = <&buck3_reg>;
893};
894
895&pgc_vpu {
896	power-supply = <&buck4_reg>;
897};
898
899&pwm1 {
900	pinctrl-names = "default";
901	pinctrl-0 = <&pinctrl_bl>;
902	status = "okay";
903};
904
905&snvs_pwrkey {
906	status = "okay";
907};
908
909&snvs_rtc {
910	status = "disabled";
911};
912
913&sai2 {
914	pinctrl-names = "default";
915	pinctrl-0 = <&pinctrl_sai2>;
916	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
917	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
918	assigned-clock-rates = <24576000>;
919	status = "okay";
920};
921
922&sai6 {
923	pinctrl-names = "default";
924	pinctrl-0 = <&pinctrl_sai6>;
925	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
926	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
927	assigned-clock-rates = <24576000>;
928	fsl,sai-synchronous-rx;
929	status = "okay";
930};
931
932&uart1 { /* console */
933	pinctrl-names = "default";
934	pinctrl-0 = <&pinctrl_uart1>;
935	status = "okay";
936};
937
938&uart3 { /* GNSS */
939	pinctrl-names = "default";
940	pinctrl-0 = <&pinctrl_uart3>;
941	status = "okay";
942};
943
944&uart4 { /* BT */
945	pinctrl-names = "default";
946	pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
947	uart-has-rtscts;
948	status = "okay";
949};
950
951&usb3_phy0 {
952	vbus-supply = <&reg_5v_p>;
953	status = "okay";
954};
955
956&usb3_phy1 {
957	vbus-supply = <&reg_5v_p>;
958	status = "okay";
959};
960
961&usb_dwc3_0 {
962	#address-cells = <1>;
963	#size-cells = <0>;
964	dr_mode = "otg";
965	status = "okay";
966
967	port@0 {
968		reg = <0>;
969
970		typec_hs: endpoint {
971			remote-endpoint = <&usb_con_hs>;
972		};
973	};
974
975	port@1 {
976		reg = <1>;
977
978		typec_ss: endpoint {
979			remote-endpoint = <&usb_con_ss>;
980		};
981	};
982};
983
984&usb_dwc3_1 {
985	dr_mode = "host";
986	status = "okay";
987};
988
989&usdhc1 {
990	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
991	assigned-clock-rates = <400000000>;
992	pinctrl-names = "default", "state_100mhz", "state_200mhz";
993	pinctrl-0 = <&pinctrl_usdhc1>;
994	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
995	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
996	bus-width = <8>;
997	non-removable;
998	status = "okay";
999};
1000
1001&usdhc2 {
1002	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1003	assigned-clock-rates = <200000000>;
1004	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1005	pinctrl-0 = <&pinctrl_usdhc2>;
1006	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1007	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1008	bus-width = <4>;
1009	vmmc-supply = <&reg_usdhc2_vmmc>;
1010	power-supply = <&wifi_pwr_en>;
1011	broken-cd;
1012	disable-wp;
1013	cap-sdio-irq;
1014	keep-power-in-suspend;
1015	wakeup-source;
1016	status = "okay";
1017};
1018
1019&wdog1 {
1020	pinctrl-names = "default";
1021	pinctrl-0 = <&pinctrl_wdog>;
1022	fsl,ext-reset-output;
1023	status = "okay";
1024};
1025