1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/usb/pd.h"
9#include "imx8mq-sr-som.dtsi"
10
11/ {
12	model = "SolidRun i.MX8MQ HummingBoard Pulse";
13	compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
14
15	chosen {
16		stdout-path = &uart1;
17	};
18
19	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20		compatible = "regulator-fixed";
21		pinctrl-names = "default";
22		pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
23		regulator-name = "VSD_3V3";
24		regulator-min-microvolt = <3300000>;
25		regulator-max-microvolt = <3300000>;
26		gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
27	};
28
29	reg_v_5v0: regulator-v-5v0 {
30		compatible = "regulator-fixed";
31		regulator-name = "v_5v0";
32		regulator-max-microvolt = <5000000>;
33		regulator-min-microvolt = <5000000>;
34		regulator-always-on;
35	};
36};
37
38&i2c2 {
39	pinctrl-names = "default";
40	pinctrl-0 = <&pinctrl_i2c2>;
41	clock-frequency = <100000>;
42	status = "okay";
43
44	typec_ptn5100: usb-typec@50 {
45		compatible = "nxp,ptn5110";
46		reg = <0x50>;
47		pinctrl-names = "default";
48		pinctrl-0 = <&pinctrl_typec>;
49		interrupt-parent = <&gpio1>;
50		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
51
52		connector {
53			compatible = "usb-c-connector";
54			label = "USB-C";
55			data-role = "dual";
56			power-role = "dual";
57			try-power-role = "sink";
58			source-pdos = <PDO_FIXED(5000, 2000,
59						 PDO_FIXED_USB_COMM |
60						 PDO_FIXED_SUSPEND |
61						 PDO_FIXED_EXTPOWER)>;
62			sink-pdos = <PDO_FIXED(5000, 2000,
63					       PDO_FIXED_USB_COMM |
64					       PDO_FIXED_SUSPEND |
65					       PDO_FIXED_EXTPOWER)
66				     PDO_FIXED(9000, 2000,
67					       PDO_FIXED_USB_COMM |
68					       PDO_FIXED_SUSPEND |
69					       PDO_FIXED_EXTPOWER)>;
70			op-sink-microwatt = <9000000>;
71
72			port {
73				typec1_dr_sw: endpoint {
74					remote-endpoint = <&usb1_drd_sw>;
75				};
76			};
77		};
78	};
79};
80
81&i2c3 {
82	pinctrl-names = "default";
83	pinctrl-0 = <&pinctrl_i2c3>;
84	clock-frequency = <100000>;
85	status = "okay";
86
87	rtc@69 {
88		compatible = "abracon,ab1805";
89		reg = <0x69>;
90		abracon,tc-diode = "schottky";
91		abracon,tc-resistor = <3>;
92	};
93};
94
95&uart2 { /* J35 header */
96	pinctrl-names = "default";
97	pinctrl-0 = <&pinctrl_uart2>;
98	assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
99	assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
100	status = "okay";
101};
102
103&uart3 { /* Mikrobus */
104	pinctrl-names = "default";
105	pinctrl-0 = <&pinctrl_uart3>;
106	assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
107	assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
108	uart-has-rtscts;
109	status = "okay";
110};
111
112&usdhc2 {
113	pinctrl-names = "default", "state_100mhz", "state_200mhz";
114	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
115	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
116	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
117	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
118	vmmc-supply = <&reg_usdhc2_vmmc>;
119	status = "okay";
120};
121
122&usb_dwc3_0 {
123	dr_mode = "otg";
124	status = "okay";
125
126	port {
127		usb1_drd_sw: endpoint {
128			remote-endpoint = <&typec1_dr_sw>;
129		};
130	};
131};
132
133&usb_dwc3_1 {
134	dr_mode = "host";
135	status = "okay";
136};
137
138&usb3_phy0 {
139	status = "okay";
140};
141
142&usb3_phy1 {
143	status = "okay";
144};
145
146&iomuxc {
147	pinctrl-names = "default";
148	pinctrl-0 = <&pinctrl_hog>;
149
150	pinctrl_hog: hoggrp {
151		fsl,pins = <
152			/* MikroBus Analog */
153			MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11		0x41
154			/* MikroBus Reset */
155			MX8MQ_IOMUXC_SAI2_RXD0_GPIO4_IO23		0x41
156			/*
157			 * The following 2 pins need to be commented out and
158			 * reconfigured to enable RTS/CTS on UART3
159			 */
160			/* MikroBus PWM */
161			MX8MQ_IOMUXC_ECSPI1_MISO_GPIO5_IO8		0x41
162			/* MikroBus INT */
163			MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x41
164		>;
165	};
166
167	pinctrl_i2c2: i2c2grp {
168		fsl,pins = <
169			MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL		0x4000007f
170			MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA		0x4000007f
171		>;
172	};
173
174	pinctrl_i2c3: i2c3grp {
175		fsl,pins = <
176			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x4000007f
177			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x4000007f
178		>;
179	};
180
181	pinctrl_typec: typecgrp {
182		fsl,pins = <
183			MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15	0x16
184			MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6	0x17059
185		>;
186	};
187
188	pinctrl_uart2: uart2grp {
189		fsl,pins = <
190			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
191			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
192		>;
193	};
194
195	pinctrl_uart3: uart3grp {
196		fsl,pins = <
197			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
198			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
199			/*
200			 * These pins are by default GPIO on the Mikro Bus
201			 * Header. To use RTS/CTS on UART3 comment them out
202			 * of the hoggrp and enable them here
203			 */
204			/* MX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B	0x49 */
205			/* MX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B	0x49 */
206		>;
207	};
208
209	pinctrl_usdhc2_gpio: usdhc2grpgpio {
210		fsl,pins = <
211			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x41
212		>;
213	};
214
215	pinctrl_usdhc2_vmmc: usdhc2vmmcgpio {
216		fsl,pins = <
217			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x41
218		>;
219	};
220
221	pinctrl_usdhc2: usdhc2grp {
222		fsl,pins = <
223			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x83
224			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc3
225			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc3
226			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc3
227			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc3
228			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc3
229			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
230		>;
231	};
232
233	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
234		fsl,pins = <
235			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x8d
236			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xcd
237			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xcd
238			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xcd
239			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xcd
240			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xcd
241			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
242		>;
243	};
244
245	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
246		fsl,pins = <
247			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x9f
248			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xdf
249			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xdf
250			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xdf
251			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xdf
252			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xdf
253			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
254		>;
255	};
256};
257