1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2023 Gateworks Corporation 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/phy/phy-imx8-pcie.h> 9 10/ { 11 led-controller { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&pinctrl_gpio_leds>; 15 16 led-0 { 17 function = LED_FUNCTION_STATUS; 18 color = <LED_COLOR_ID_GREEN>; 19 gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; 20 default-state = "on"; 21 linux,default-trigger = "heartbeat"; 22 }; 23 24 led-1 { 25 function = LED_FUNCTION_STATUS; 26 color = <LED_COLOR_ID_RED>; 27 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; 28 default-state = "off"; 29 }; 30 }; 31 32 pcie0_refclk: clock-pcie0 { 33 compatible = "fixed-clock"; 34 #clock-cells = <0>; 35 clock-frequency = <100000000>; 36 }; 37 38 pps { 39 compatible = "pps-gpio"; 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_pps>; 42 gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; 43 status = "okay"; 44 }; 45 46 reg_usb1_vbus: regulator-usb1 { 47 compatible = "regulator-fixed"; 48 pinctrl-names = "default"; 49 pinctrl-0 = <&pinctrl_reg_usb1_en>; 50 regulator-name = "usb1_vbus"; 51 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; 52 enable-active-high; 53 regulator-min-microvolt = <5000000>; 54 regulator-max-microvolt = <5000000>; 55 }; 56 57 reg_usb2_vbus: regulator-usb2 { 58 compatible = "regulator-fixed"; 59 pinctrl-names = "default"; 60 pinctrl-0 = <&pinctrl_reg_usb2_en>; 61 regulator-name = "usb2_vbus"; 62 gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>; 63 enable-active-high; 64 regulator-min-microvolt = <5000000>; 65 regulator-max-microvolt = <5000000>; 66 }; 67 68 reg_wifi_en: regulator-wifi-en { 69 compatible = "regulator-fixed"; 70 pinctrl-names = "default"; 71 pinctrl-0 = <&pinctrl_reg_wl>; 72 regulator-name = "wl"; 73 gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>; 74 startup-delay-us = <100>; 75 enable-active-high; 76 regulator-min-microvolt = <3300000>; 77 regulator-max-microvolt = <3300000>; 78 }; 79 80 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 81 compatible = "regulator-fixed"; 82 pinctrl-names = "default"; 83 pinctrl-0 = <&pinctrl_usdhc2_vmmc>; 84 regulator-name = "VDD_3V3_SD"; 85 enable-active-high; 86 gpio = <&gpio2 19 0>; /* SD2_RESET */ 87 off-on-delay-us = <12000>; 88 regulator-max-microvolt = <3300000>; 89 regulator-min-microvolt = <3300000>; 90 startup-delay-us = <100>; 91 }; 92}; 93 94/* off-board header */ 95&ecspi2 { 96 pinctrl-names = "default"; 97 pinctrl-0 = <&pinctrl_spi2>; 98 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 99 status = "okay"; 100}; 101 102&gpio4 { 103 gpio-line-names = 104 "", "", "", "", 105 "", "", "", "", 106 "dio1", "", "", "dio0", 107 "", "", "pci_usb_sel", "", 108 "", "", "", "", 109 "", "", "rs485_en", "rs485_term", 110 "", "", "", "rs485_half", 111 "pci_wdis#", "", "", ""; 112}; 113 114&i2c2 { 115 clock-frequency = <400000>; 116 pinctrl-names = "default"; 117 pinctrl-0 = <&pinctrl_i2c2>; 118 status = "okay"; 119 120 accelerometer@19 { 121 compatible = "st,lis2de12"; 122 reg = <0x19>; 123 pinctrl-names = "default"; 124 pinctrl-0 = <&pinctrl_accel>; 125 st,drdy-int-pin = <1>; 126 interrupt-parent = <&gpio4>; 127 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 128 interrupt-names = "INT1"; 129 }; 130}; 131 132&pcie_phy { 133 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 134 fsl,clkreq-unsupported; 135 clocks = <&pcie0_refclk>; 136 clock-names = "ref"; 137 status = "okay"; 138}; 139 140&pcie { 141 pinctrl-names = "default"; 142 pinctrl-0 = <&pinctrl_pcie0>; 143 reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; 144 status = "okay"; 145}; 146 147/* GPS */ 148&uart1 { 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_uart1>; 151 status = "okay"; 152}; 153 154/* bluetooth HCI */ 155&uart3 { 156 pinctrl-names = "default"; 157 pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>; 158 cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 159 rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 160 status = "okay"; 161 162 bluetooth { 163 compatible = "brcm,bcm4330-bt"; 164 shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 165 }; 166}; 167 168/* RS232 */ 169&uart4 { 170 pinctrl-names = "default"; 171 pinctrl-0 = <&pinctrl_uart4>; 172 status = "okay"; 173}; 174 175/* USB1 - OTG */ 176&usb3_0 { 177 pinctrl-names = "default"; 178 pinctrl-0 = <&pinctrl_usb1>; 179 fsl,over-current-active-low; 180 status = "okay"; 181}; 182 183&usb3_phy0 { 184 vbus-supply = <®_usb1_vbus>; 185 status = "okay"; 186}; 187 188&usb_dwc3_0 { 189 /* dual role is implemented but not a full featured OTG */ 190 adp-disable; 191 hnp-disable; 192 srp-disable; 193 dr_mode = "otg"; 194 usb-role-switch; 195 role-switch-default-mode = "peripheral"; 196 status = "okay"; 197 198 connector { 199 compatible = "gpio-usb-b-connector", "usb-b-connector"; 200 pinctrl-names = "default"; 201 pinctrl-0 = <&pinctrl_usbcon1>; 202 type = "micro"; 203 label = "otg"; 204 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 205 }; 206}; 207 208/* USB2 - USB3.0 Hub */ 209&usb3_1 { 210 fsl,permanently-attached; 211 fsl,disable-port-power-control; 212 status = "okay"; 213}; 214 215&usb3_phy1 { 216 vbus-supply = <®_usb2_vbus>; 217 status = "okay"; 218}; 219 220&usb_dwc3_1 { 221 dr_mode = "host"; 222 status = "okay"; 223}; 224 225/* SDIO WiFi */ 226&usdhc1 { 227 pinctrl-names = "default"; 228 pinctrl-0 = <&pinctrl_usdhc1>; 229 bus-width = <4>; 230 non-removable; 231 vmmc-supply = <®_wifi_en>; 232 status = "okay"; 233}; 234 235/* microSD */ 236&usdhc2 { 237 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 238 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 239 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 240 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 241 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 242 bus-width = <4>; 243 vmmc-supply = <®_usdhc2_vmmc>; 244 status = "okay"; 245}; 246 247&iomuxc { 248 pinctrl-names = "default"; 249 pinctrl-0 = <&pinctrl_hog>; 250 251 pinctrl_hog: hoggrp { 252 fsl,pins = < 253 MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ 254 MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ 255 MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */ 256 MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */ 257 MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */ 258 MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */ 259 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */ 260 >; 261 }; 262 263 pinctrl_accel: accelgrp { 264 fsl,pins = < 265 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */ 266 >; 267 }; 268 269 pinctrl_bten: btengrp { 270 fsl,pins = < 271 MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x146 272 >; 273 }; 274 275 pinctrl_gpio_leds: gpioledgrp { 276 fsl,pins = < 277 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ 278 MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ 279 >; 280 }; 281 282 pinctrl_pcie0: pcie0grp { 283 fsl,pins = < 284 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 285 >; 286 }; 287 288 pinctrl_pps: ppsgrp { 289 fsl,pins = < 290 MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 291 >; 292 }; 293 294 pinctrl_reg_wl: regwlgrp { 295 fsl,pins = < 296 MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x146 297 >; 298 }; 299 300 pinctrl_reg_usb1_en: regusb1grp { 301 fsl,pins = < 302 MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* USB1_EN */ 303 >; 304 }; 305 306 pinctrl_usb1: usb1grp { 307 fsl,pins = < 308 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */ 309 >; 310 }; 311 312 pinctrl_usbcon1: usbcon1grp { 313 fsl,pins = < 314 MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */ 315 >; 316 }; 317 318 pinctrl_reg_usb2_en: regusb2grp { 319 fsl,pins = < 320 MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */ 321 >; 322 }; 323 324 pinctrl_spi2: spi2grp { 325 fsl,pins = < 326 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140 327 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140 328 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140 329 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 330 >; 331 }; 332 333 pinctrl_uart1: uart1grp { 334 fsl,pins = < 335 MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 336 MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 337 >; 338 }; 339 340 pinctrl_uart3: uart3grp { 341 fsl,pins = < 342 MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 343 MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 344 MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140 345 MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140 346 >; 347 }; 348 349 pinctrl_uart4: uart4grp { 350 fsl,pins = < 351 MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140 352 MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140 353 >; 354 }; 355 356 pinctrl_usdhc1: usdhc1grp { 357 fsl,pins = < 358 MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190 359 MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0 360 MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0 361 MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0 362 MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0 363 MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0 364 >; 365 }; 366 367 pinctrl_usdhc2: usdhc2grp { 368 fsl,pins = < 369 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 370 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 371 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 372 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 373 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 374 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 375 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 376 >; 377 }; 378 379 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 380 fsl,pins = < 381 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 382 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 383 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 384 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 385 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 386 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 387 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 388 >; 389 }; 390 391 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 392 fsl,pins = < 393 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 394 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 395 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 396 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 397 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 398 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 399 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 400 >; 401 }; 402 403 pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp { 404 fsl,pins = < 405 MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B 0x1d0 406 >; 407 }; 408 409 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 410 fsl,pins = < 411 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 412 >; 413 }; 414}; 415