1a05ea40eSJacky Bai// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2a05ea40eSJacky Bai/* 3a05ea40eSJacky Bai * Copyright 2019 NXP 4a05ea40eSJacky Bai */ 5a05ea40eSJacky Bai 6a05ea40eSJacky Bai#include <dt-bindings/clock/imx8mm-clock.h> 7a05ea40eSJacky Bai#include <dt-bindings/gpio/gpio.h> 8a05ea40eSJacky Bai#include <dt-bindings/input/input.h> 9a05ea40eSJacky Bai#include <dt-bindings/interrupt-controller/arm-gic.h> 10a05ea40eSJacky Bai#include <dt-bindings/thermal/thermal.h> 11a05ea40eSJacky Bai 12a05ea40eSJacky Bai#include "imx8mm-pinfunc.h" 13a05ea40eSJacky Bai 14a05ea40eSJacky Bai/ { 15a05ea40eSJacky Bai compatible = "fsl,imx8mm"; 16a05ea40eSJacky Bai interrupt-parent = <&gic>; 17a05ea40eSJacky Bai #address-cells = <2>; 18a05ea40eSJacky Bai #size-cells = <2>; 19a05ea40eSJacky Bai 20a05ea40eSJacky Bai aliases { 21a05ea40eSJacky Bai ethernet0 = &fec1; 22a05ea40eSJacky Bai i2c0 = &i2c1; 23a05ea40eSJacky Bai i2c1 = &i2c2; 24a05ea40eSJacky Bai i2c2 = &i2c3; 25a05ea40eSJacky Bai i2c3 = &i2c4; 26a05ea40eSJacky Bai serial0 = &uart1; 27a05ea40eSJacky Bai serial1 = &uart2; 28a05ea40eSJacky Bai serial2 = &uart3; 29a05ea40eSJacky Bai serial3 = &uart4; 30a05ea40eSJacky Bai spi0 = &ecspi1; 31a05ea40eSJacky Bai spi1 = &ecspi2; 32a05ea40eSJacky Bai spi2 = &ecspi3; 33a05ea40eSJacky Bai mmc0 = &usdhc1; 34a05ea40eSJacky Bai mmc1 = &usdhc2; 35a05ea40eSJacky Bai mmc2 = &usdhc3; 36a05ea40eSJacky Bai gpio0 = &gpio1; 37a05ea40eSJacky Bai gpio1 = &gpio2; 38a05ea40eSJacky Bai gpio2 = &gpio3; 39a05ea40eSJacky Bai gpio3 = &gpio4; 40a05ea40eSJacky Bai gpio4 = &gpio5; 41a05ea40eSJacky Bai }; 42a05ea40eSJacky Bai 43a05ea40eSJacky Bai cpus { 44a05ea40eSJacky Bai #address-cells = <1>; 45a05ea40eSJacky Bai #size-cells = <0>; 46a05ea40eSJacky Bai 47a1406b72SAnson Huang idle-states { 48a1406b72SAnson Huang entry-method = "psci"; 49a1406b72SAnson Huang 50a1406b72SAnson Huang cpu_pd_wait: cpu-pd-wait { 51a1406b72SAnson Huang compatible = "arm,idle-state"; 52a1406b72SAnson Huang arm,psci-suspend-param = <0x0010033>; 53a1406b72SAnson Huang local-timer-stop; 54a1406b72SAnson Huang entry-latency-us = <1000>; 55a1406b72SAnson Huang exit-latency-us = <700>; 56a1406b72SAnson Huang min-residency-us = <2700>; 57a1406b72SAnson Huang }; 58a1406b72SAnson Huang }; 59a1406b72SAnson Huang 60a05ea40eSJacky Bai A53_0: cpu@0 { 61a05ea40eSJacky Bai device_type = "cpu"; 62a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 63a05ea40eSJacky Bai reg = <0x0>; 64e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 65e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 66a05ea40eSJacky Bai enable-method = "psci"; 67a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 68e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 69f403a26cSLeonard Crestez nvmem-cells = <&cpu_speed_grade>; 70f403a26cSLeonard Crestez nvmem-cell-names = "speed_grade"; 71a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 72a05ea40eSJacky Bai }; 73a05ea40eSJacky Bai 74a05ea40eSJacky Bai A53_1: cpu@1 { 75a05ea40eSJacky Bai device_type = "cpu"; 76a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 77a05ea40eSJacky Bai reg = <0x1>; 78e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 79e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 80a05ea40eSJacky Bai enable-method = "psci"; 81a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 82e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 83a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 84a05ea40eSJacky Bai }; 85a05ea40eSJacky Bai 86a05ea40eSJacky Bai A53_2: cpu@2 { 87a05ea40eSJacky Bai device_type = "cpu"; 88a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 89a05ea40eSJacky Bai reg = <0x2>; 90e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 91e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 92a05ea40eSJacky Bai enable-method = "psci"; 93a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 94e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 95a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 96a05ea40eSJacky Bai }; 97a05ea40eSJacky Bai 98a05ea40eSJacky Bai A53_3: cpu@3 { 99a05ea40eSJacky Bai device_type = "cpu"; 100a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 101a05ea40eSJacky Bai reg = <0x3>; 102e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 103e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 104a05ea40eSJacky Bai enable-method = "psci"; 105a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 106e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 107a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 108a05ea40eSJacky Bai }; 109a05ea40eSJacky Bai 110a05ea40eSJacky Bai A53_L2: l2-cache0 { 111a05ea40eSJacky Bai compatible = "cache"; 112a05ea40eSJacky Bai }; 113a05ea40eSJacky Bai }; 114a05ea40eSJacky Bai 115e85c9d0fSLeonard Crestez a53_opp_table: opp-table { 116e85c9d0fSLeonard Crestez compatible = "operating-points-v2"; 117e85c9d0fSLeonard Crestez opp-shared; 118e85c9d0fSLeonard Crestez 119e85c9d0fSLeonard Crestez opp-1200000000 { 120e85c9d0fSLeonard Crestez opp-hz = /bits/ 64 <1200000000>; 121e85c9d0fSLeonard Crestez opp-microvolt = <850000>; 122f403a26cSLeonard Crestez opp-supported-hw = <0xe>, <0x7>; 123e85c9d0fSLeonard Crestez clock-latency-ns = <150000>; 1240d9df581SAnson Huang opp-suspend; 125e85c9d0fSLeonard Crestez }; 126e85c9d0fSLeonard Crestez 127e85c9d0fSLeonard Crestez opp-1600000000 { 128e85c9d0fSLeonard Crestez opp-hz = /bits/ 64 <1600000000>; 129e85c9d0fSLeonard Crestez opp-microvolt = <900000>; 130f403a26cSLeonard Crestez opp-supported-hw = <0xc>, <0x7>; 131e85c9d0fSLeonard Crestez clock-latency-ns = <150000>; 1320d9df581SAnson Huang opp-suspend; 133f403a26cSLeonard Crestez }; 134f403a26cSLeonard Crestez 135f403a26cSLeonard Crestez opp-1800000000 { 136f403a26cSLeonard Crestez opp-hz = /bits/ 64 <1800000000>; 137f403a26cSLeonard Crestez opp-microvolt = <1000000>; 138cd7c2ddfSAnson Huang opp-supported-hw = <0x8>, <0x3>; 139f403a26cSLeonard Crestez clock-latency-ns = <150000>; 1400d9df581SAnson Huang opp-suspend; 141e85c9d0fSLeonard Crestez }; 142e85c9d0fSLeonard Crestez }; 143e85c9d0fSLeonard Crestez 144a05ea40eSJacky Bai memory@40000000 { 145a05ea40eSJacky Bai device_type = "memory"; 146a05ea40eSJacky Bai reg = <0x0 0x40000000 0 0x80000000>; 147a05ea40eSJacky Bai }; 148a05ea40eSJacky Bai 149a05ea40eSJacky Bai osc_32k: clock-osc-32k { 150a05ea40eSJacky Bai compatible = "fixed-clock"; 151a05ea40eSJacky Bai #clock-cells = <0>; 152a05ea40eSJacky Bai clock-frequency = <32768>; 153a05ea40eSJacky Bai clock-output-names = "osc_32k"; 154a05ea40eSJacky Bai }; 155a05ea40eSJacky Bai 156a05ea40eSJacky Bai osc_24m: clock-osc-24m { 157a05ea40eSJacky Bai compatible = "fixed-clock"; 158a05ea40eSJacky Bai #clock-cells = <0>; 159a05ea40eSJacky Bai clock-frequency = <24000000>; 160a05ea40eSJacky Bai clock-output-names = "osc_24m"; 161a05ea40eSJacky Bai }; 162a05ea40eSJacky Bai 163a05ea40eSJacky Bai clk_ext1: clock-ext1 { 164a05ea40eSJacky Bai compatible = "fixed-clock"; 165a05ea40eSJacky Bai #clock-cells = <0>; 166a05ea40eSJacky Bai clock-frequency = <133000000>; 167a05ea40eSJacky Bai clock-output-names = "clk_ext1"; 168a05ea40eSJacky Bai }; 169a05ea40eSJacky Bai 170a05ea40eSJacky Bai clk_ext2: clock-ext2 { 171a05ea40eSJacky Bai compatible = "fixed-clock"; 172a05ea40eSJacky Bai #clock-cells = <0>; 173a05ea40eSJacky Bai clock-frequency = <133000000>; 174a05ea40eSJacky Bai clock-output-names = "clk_ext2"; 175a05ea40eSJacky Bai }; 176a05ea40eSJacky Bai 177a05ea40eSJacky Bai clk_ext3: clock-ext3 { 178a05ea40eSJacky Bai compatible = "fixed-clock"; 179a05ea40eSJacky Bai #clock-cells = <0>; 180a05ea40eSJacky Bai clock-frequency = <133000000>; 181a05ea40eSJacky Bai clock-output-names = "clk_ext3"; 182a05ea40eSJacky Bai }; 183a05ea40eSJacky Bai 184a05ea40eSJacky Bai clk_ext4: clock-ext4 { 185a05ea40eSJacky Bai compatible = "fixed-clock"; 186a05ea40eSJacky Bai #clock-cells = <0>; 187a05ea40eSJacky Bai clock-frequency= <133000000>; 188a05ea40eSJacky Bai clock-output-names = "clk_ext4"; 189a05ea40eSJacky Bai }; 190a05ea40eSJacky Bai 191a05ea40eSJacky Bai psci { 192a05ea40eSJacky Bai compatible = "arm,psci-1.0"; 193a05ea40eSJacky Bai method = "smc"; 194a05ea40eSJacky Bai }; 195a05ea40eSJacky Bai 196a05ea40eSJacky Bai pmu { 197a05ea40eSJacky Bai compatible = "arm,armv8-pmuv3"; 198a05ea40eSJacky Bai interrupts = <GIC_PPI 7 199a05ea40eSJacky Bai (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 200a05ea40eSJacky Bai interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>; 201a05ea40eSJacky Bai }; 202a05ea40eSJacky Bai 203a05ea40eSJacky Bai timer { 204a05ea40eSJacky Bai compatible = "arm,armv8-timer"; 205a05ea40eSJacky Bai interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */ 206a05ea40eSJacky Bai <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */ 207a05ea40eSJacky Bai <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */ 208a05ea40eSJacky Bai <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */ 209a05ea40eSJacky Bai clock-frequency = <8000000>; 210a05ea40eSJacky Bai arm,no-tick-in-suspend; 211a05ea40eSJacky Bai }; 212a05ea40eSJacky Bai 213a656622aSFabio Estevam usbphynop1: usbphynop1 { 214a656622aSFabio Estevam compatible = "usb-nop-xceiv"; 215a656622aSFabio Estevam clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 216a656622aSFabio Estevam assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 217a656622aSFabio Estevam assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; 218a656622aSFabio Estevam clock-names = "main_clk"; 219a656622aSFabio Estevam }; 220a656622aSFabio Estevam 221a656622aSFabio Estevam usbphynop2: usbphynop2 { 222a656622aSFabio Estevam compatible = "usb-nop-xceiv"; 223a656622aSFabio Estevam clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 224a656622aSFabio Estevam assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 225a656622aSFabio Estevam assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; 226a656622aSFabio Estevam clock-names = "main_clk"; 227a656622aSFabio Estevam }; 228a656622aSFabio Estevam 229951c1d37SFabio Estevam soc@0 { 230a05ea40eSJacky Bai compatible = "simple-bus"; 231a05ea40eSJacky Bai #address-cells = <1>; 232a05ea40eSJacky Bai #size-cells = <1>; 233a05ea40eSJacky Bai ranges = <0x0 0x0 0x0 0x3e000000>; 234a05ea40eSJacky Bai 235a05ea40eSJacky Bai aips1: bus@30000000 { 236a05ea40eSJacky Bai compatible = "fsl,aips-bus", "simple-bus"; 237a05ea40eSJacky Bai #address-cells = <1>; 238a05ea40eSJacky Bai #size-cells = <1>; 23910c74207SFabio Estevam ranges = <0x30000000 0x30000000 0x400000>; 240a05ea40eSJacky Bai 2414bee4357SDaniel Baluta sai1: sai@30010000 { 2424bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 2434bee4357SDaniel Baluta reg = <0x30010000 0x10000>; 2444bee4357SDaniel Baluta interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 2454bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI1_IPG>, 2464bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI1_ROOT>, 2474bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 2484bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 2494bee4357SDaniel Baluta dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>; 2504bee4357SDaniel Baluta dma-names = "rx", "tx"; 2514bee4357SDaniel Baluta status = "disabled"; 2524bee4357SDaniel Baluta }; 2534bee4357SDaniel Baluta 2544bee4357SDaniel Baluta sai2: sai@30020000 { 2554bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 2564bee4357SDaniel Baluta reg = <0x30020000 0x10000>; 2574bee4357SDaniel Baluta interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 2584bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI2_IPG>, 2594bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI2_ROOT>, 2604bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 2614bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 2624bee4357SDaniel Baluta dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>; 2634bee4357SDaniel Baluta dma-names = "rx", "tx"; 2644bee4357SDaniel Baluta status = "disabled"; 2654bee4357SDaniel Baluta }; 2664bee4357SDaniel Baluta 2674bee4357SDaniel Baluta sai3: sai@30030000 { 2684bee4357SDaniel Baluta #sound-dai-cells = <0>; 2694bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 2704bee4357SDaniel Baluta reg = <0x30030000 0x10000>; 2714bee4357SDaniel Baluta interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 2724bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI3_IPG>, 2734bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI3_ROOT>, 2744bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 2754bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 2764bee4357SDaniel Baluta dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>; 2774bee4357SDaniel Baluta dma-names = "rx", "tx"; 2784bee4357SDaniel Baluta status = "disabled"; 2794bee4357SDaniel Baluta }; 2804bee4357SDaniel Baluta 2814bee4357SDaniel Baluta sai5: sai@30050000 { 2824bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 2834bee4357SDaniel Baluta reg = <0x30050000 0x10000>; 2844bee4357SDaniel Baluta interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 2854bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI5_IPG>, 2864bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI5_ROOT>, 2874bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 2884bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 2894bee4357SDaniel Baluta dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>; 2904bee4357SDaniel Baluta dma-names = "rx", "tx"; 2914bee4357SDaniel Baluta status = "disabled"; 2924bee4357SDaniel Baluta }; 2934bee4357SDaniel Baluta 2944bee4357SDaniel Baluta sai6: sai@30060000 { 2954bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 2964bee4357SDaniel Baluta reg = <0x30060000 0x10000>; 2974bee4357SDaniel Baluta interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 2984bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI6_IPG>, 2994bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI6_ROOT>, 3004bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 3014bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 3024bee4357SDaniel Baluta dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>; 3034bee4357SDaniel Baluta dma-names = "rx", "tx"; 3044bee4357SDaniel Baluta status = "disabled"; 3054bee4357SDaniel Baluta }; 306a05ea40eSJacky Bai 307a05ea40eSJacky Bai gpio1: gpio@30200000 { 308a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 309a05ea40eSJacky Bai reg = <0x30200000 0x10000>; 310a05ea40eSJacky Bai interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 311a05ea40eSJacky Bai <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 31209892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO1_ROOT>; 313a05ea40eSJacky Bai gpio-controller; 314a05ea40eSJacky Bai #gpio-cells = <2>; 315a05ea40eSJacky Bai interrupt-controller; 316a05ea40eSJacky Bai #interrupt-cells = <2>; 31715626359SAnson Huang gpio-ranges = <&iomuxc 0 10 30>; 318a05ea40eSJacky Bai }; 319a05ea40eSJacky Bai 320a05ea40eSJacky Bai gpio2: gpio@30210000 { 321a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 322a05ea40eSJacky Bai reg = <0x30210000 0x10000>; 323a05ea40eSJacky Bai interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 324a05ea40eSJacky Bai <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 32509892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO2_ROOT>; 326a05ea40eSJacky Bai gpio-controller; 327a05ea40eSJacky Bai #gpio-cells = <2>; 328a05ea40eSJacky Bai interrupt-controller; 329a05ea40eSJacky Bai #interrupt-cells = <2>; 33015626359SAnson Huang gpio-ranges = <&iomuxc 0 40 21>; 331a05ea40eSJacky Bai }; 332a05ea40eSJacky Bai 333a05ea40eSJacky Bai gpio3: gpio@30220000 { 334a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 335a05ea40eSJacky Bai reg = <0x30220000 0x10000>; 336a05ea40eSJacky Bai interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 337a05ea40eSJacky Bai <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 33809892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO3_ROOT>; 339a05ea40eSJacky Bai gpio-controller; 340a05ea40eSJacky Bai #gpio-cells = <2>; 341a05ea40eSJacky Bai interrupt-controller; 342a05ea40eSJacky Bai #interrupt-cells = <2>; 34315626359SAnson Huang gpio-ranges = <&iomuxc 0 61 26>; 344a05ea40eSJacky Bai }; 345a05ea40eSJacky Bai 346a05ea40eSJacky Bai gpio4: gpio@30230000 { 347a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 348a05ea40eSJacky Bai reg = <0x30230000 0x10000>; 349a05ea40eSJacky Bai interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 350a05ea40eSJacky Bai <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 35109892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO4_ROOT>; 352a05ea40eSJacky Bai gpio-controller; 353a05ea40eSJacky Bai #gpio-cells = <2>; 354a05ea40eSJacky Bai interrupt-controller; 355a05ea40eSJacky Bai #interrupt-cells = <2>; 35615626359SAnson Huang gpio-ranges = <&iomuxc 0 87 32>; 357a05ea40eSJacky Bai }; 358a05ea40eSJacky Bai 359a05ea40eSJacky Bai gpio5: gpio@30240000 { 360a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 361a05ea40eSJacky Bai reg = <0x30240000 0x10000>; 362a05ea40eSJacky Bai interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 363a05ea40eSJacky Bai <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 36409892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO5_ROOT>; 365a05ea40eSJacky Bai gpio-controller; 366a05ea40eSJacky Bai #gpio-cells = <2>; 367a05ea40eSJacky Bai interrupt-controller; 368a05ea40eSJacky Bai #interrupt-cells = <2>; 36915626359SAnson Huang gpio-ranges = <&iomuxc 0 119 30>; 370a05ea40eSJacky Bai }; 371a05ea40eSJacky Bai 372a05ea40eSJacky Bai wdog1: watchdog@30280000 { 373a05ea40eSJacky Bai compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; 374a05ea40eSJacky Bai reg = <0x30280000 0x10000>; 375a05ea40eSJacky Bai interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 376a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_WDOG1_ROOT>; 377a05ea40eSJacky Bai status = "disabled"; 378a05ea40eSJacky Bai }; 379a05ea40eSJacky Bai 380a05ea40eSJacky Bai wdog2: watchdog@30290000 { 381a05ea40eSJacky Bai compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; 382a05ea40eSJacky Bai reg = <0x30290000 0x10000>; 383a05ea40eSJacky Bai interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 384a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_WDOG2_ROOT>; 385a05ea40eSJacky Bai status = "disabled"; 386a05ea40eSJacky Bai }; 387a05ea40eSJacky Bai 388a05ea40eSJacky Bai wdog3: watchdog@302a0000 { 389a05ea40eSJacky Bai compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; 390a05ea40eSJacky Bai reg = <0x302a0000 0x10000>; 391a05ea40eSJacky Bai interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 392a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_WDOG3_ROOT>; 393a05ea40eSJacky Bai status = "disabled"; 394a05ea40eSJacky Bai }; 395a05ea40eSJacky Bai 396a05ea40eSJacky Bai sdma2: dma-controller@302c0000 { 397a05ea40eSJacky Bai compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; 398a05ea40eSJacky Bai reg = <0x302c0000 0x10000>; 399a05ea40eSJacky Bai interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 400a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_SDMA2_ROOT>, 401a05ea40eSJacky Bai <&clk IMX8MM_CLK_SDMA2_ROOT>; 402a05ea40eSJacky Bai clock-names = "ipg", "ahb"; 403a05ea40eSJacky Bai #dma-cells = <3>; 404a05ea40eSJacky Bai fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; 405a05ea40eSJacky Bai }; 406a05ea40eSJacky Bai 407a05ea40eSJacky Bai sdma3: dma-controller@302b0000 { 408a05ea40eSJacky Bai compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; 409a05ea40eSJacky Bai reg = <0x302b0000 0x10000>; 410a05ea40eSJacky Bai interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 411a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_SDMA3_ROOT>, 412a05ea40eSJacky Bai <&clk IMX8MM_CLK_SDMA3_ROOT>; 413a05ea40eSJacky Bai clock-names = "ipg", "ahb"; 414a05ea40eSJacky Bai #dma-cells = <3>; 415a05ea40eSJacky Bai fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; 416a05ea40eSJacky Bai }; 417a05ea40eSJacky Bai 418a05ea40eSJacky Bai iomuxc: pinctrl@30330000 { 419a05ea40eSJacky Bai compatible = "fsl,imx8mm-iomuxc"; 420a05ea40eSJacky Bai reg = <0x30330000 0x10000>; 421a05ea40eSJacky Bai }; 422a05ea40eSJacky Bai 423a05ea40eSJacky Bai gpr: iomuxc-gpr@30340000 { 424a05ea40eSJacky Bai compatible = "fsl,imx8mm-iomuxc-gpr", "syscon"; 425a05ea40eSJacky Bai reg = <0x30340000 0x10000>; 426a05ea40eSJacky Bai }; 427a05ea40eSJacky Bai 428a05ea40eSJacky Bai ocotp: ocotp-ctrl@30350000 { 429b09802a0SAnson Huang compatible = "fsl,imx8mm-ocotp", "syscon"; 430a05ea40eSJacky Bai reg = <0x30350000 0x10000>; 431a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_OCOTP_ROOT>; 432a05ea40eSJacky Bai /* For nvmem subnodes */ 433a05ea40eSJacky Bai #address-cells = <1>; 434a05ea40eSJacky Bai #size-cells = <1>; 435f403a26cSLeonard Crestez 436f403a26cSLeonard Crestez cpu_speed_grade: speed-grade@10 { 437f403a26cSLeonard Crestez reg = <0x10 4>; 438f403a26cSLeonard Crestez }; 439a05ea40eSJacky Bai }; 440a05ea40eSJacky Bai 441a05ea40eSJacky Bai anatop: anatop@30360000 { 442a05ea40eSJacky Bai compatible = "fsl,imx8mm-anatop", "syscon", "simple-bus"; 443a05ea40eSJacky Bai reg = <0x30360000 0x10000>; 444a05ea40eSJacky Bai }; 445a05ea40eSJacky Bai 446a05ea40eSJacky Bai snvs: snvs@30370000 { 447a05ea40eSJacky Bai compatible = "fsl,sec-v4.0-mon","syscon", "simple-mfd"; 448a05ea40eSJacky Bai reg = <0x30370000 0x10000>; 449a05ea40eSJacky Bai 450a05ea40eSJacky Bai snvs_rtc: snvs-rtc-lp { 451a05ea40eSJacky Bai compatible = "fsl,sec-v4.0-mon-rtc-lp"; 452a05ea40eSJacky Bai regmap = <&snvs>; 453a05ea40eSJacky Bai offset = <0x34>; 454a05ea40eSJacky Bai interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 455a05ea40eSJacky Bai <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 456f145b209SAnson Huang clocks = <&clk IMX8MM_CLK_SNVS_ROOT>; 457f145b209SAnson Huang clock-names = "snvs-rtc"; 458a05ea40eSJacky Bai }; 459a05ea40eSJacky Bai 460a05ea40eSJacky Bai snvs_pwrkey: snvs-powerkey { 461a05ea40eSJacky Bai compatible = "fsl,sec-v4.0-pwrkey"; 462a05ea40eSJacky Bai regmap = <&snvs>; 463a05ea40eSJacky Bai interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 464a05ea40eSJacky Bai linux,keycode = <KEY_POWER>; 465a05ea40eSJacky Bai wakeup-source; 466d038c1dcSAnson Huang status = "disabled"; 467a05ea40eSJacky Bai }; 468a05ea40eSJacky Bai }; 469a05ea40eSJacky Bai 470a05ea40eSJacky Bai clk: clock-controller@30380000 { 471a05ea40eSJacky Bai compatible = "fsl,imx8mm-ccm"; 472a05ea40eSJacky Bai reg = <0x30380000 0x10000>; 473a05ea40eSJacky Bai #clock-cells = <1>; 474a05ea40eSJacky Bai clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, 475a05ea40eSJacky Bai <&clk_ext3>, <&clk_ext4>; 476a05ea40eSJacky Bai clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", 477a05ea40eSJacky Bai "clk_ext3", "clk_ext4"; 4786b392e16SAbel Vesa assigned-clocks = <&clk IMX8MM_CLK_NOC>, 4796b392e16SAbel Vesa <&clk IMX8MM_CLK_AUDIO_AHB>, 4806b392e16SAbel Vesa <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>, 4816b392e16SAbel Vesa <&clk IMX8MM_SYS_PLL3>, 4826b392e16SAbel Vesa <&clk IMX8MM_VIDEO_PLL1>; 4836b392e16SAbel Vesa assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>, 4846b392e16SAbel Vesa <&clk IMX8MM_SYS_PLL1_800M>; 4856b392e16SAbel Vesa assigned-clock-rates = <0>, 4866b392e16SAbel Vesa <400000000>, 4876b392e16SAbel Vesa <400000000>, 4886b392e16SAbel Vesa <750000000>, 4896b392e16SAbel Vesa <594000000>; 490a05ea40eSJacky Bai }; 491a05ea40eSJacky Bai 492a05ea40eSJacky Bai src: reset-controller@30390000 { 49346b29f4bSAnson Huang compatible = "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon"; 494a05ea40eSJacky Bai reg = <0x30390000 0x10000>; 495a05ea40eSJacky Bai interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 496a05ea40eSJacky Bai #reset-cells = <1>; 497a05ea40eSJacky Bai }; 498a05ea40eSJacky Bai }; 499a05ea40eSJacky Bai 500a05ea40eSJacky Bai aips2: bus@30400000 { 501a05ea40eSJacky Bai compatible = "fsl,aips-bus", "simple-bus"; 502a05ea40eSJacky Bai #address-cells = <1>; 503a05ea40eSJacky Bai #size-cells = <1>; 50410c74207SFabio Estevam ranges = <0x30400000 0x30400000 0x400000>; 505a05ea40eSJacky Bai 506a05ea40eSJacky Bai pwm1: pwm@30660000 { 507a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 508a05ea40eSJacky Bai reg = <0x30660000 0x10000>; 509a05ea40eSJacky Bai interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 510a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM1_ROOT>, 511a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM1_ROOT>; 512a05ea40eSJacky Bai clock-names = "ipg", "per"; 513a05ea40eSJacky Bai #pwm-cells = <2>; 514a05ea40eSJacky Bai status = "disabled"; 515a05ea40eSJacky Bai }; 516a05ea40eSJacky Bai 517a05ea40eSJacky Bai pwm2: pwm@30670000 { 518a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 519a05ea40eSJacky Bai reg = <0x30670000 0x10000>; 520a05ea40eSJacky Bai interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 521a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM2_ROOT>, 522a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM2_ROOT>; 523a05ea40eSJacky Bai clock-names = "ipg", "per"; 524a05ea40eSJacky Bai #pwm-cells = <2>; 525a05ea40eSJacky Bai status = "disabled"; 526a05ea40eSJacky Bai }; 527a05ea40eSJacky Bai 528a05ea40eSJacky Bai pwm3: pwm@30680000 { 529a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 530a05ea40eSJacky Bai reg = <0x30680000 0x10000>; 531a05ea40eSJacky Bai interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 532a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM3_ROOT>, 533a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM3_ROOT>; 534a05ea40eSJacky Bai clock-names = "ipg", "per"; 535a05ea40eSJacky Bai #pwm-cells = <2>; 536a05ea40eSJacky Bai status = "disabled"; 537a05ea40eSJacky Bai }; 538a05ea40eSJacky Bai 539a05ea40eSJacky Bai pwm4: pwm@30690000 { 540a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 541a05ea40eSJacky Bai reg = <0x30690000 0x10000>; 542a05ea40eSJacky Bai interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 543a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM4_ROOT>, 544a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM4_ROOT>; 545a05ea40eSJacky Bai clock-names = "ipg", "per"; 546a05ea40eSJacky Bai #pwm-cells = <2>; 547a05ea40eSJacky Bai status = "disabled"; 548a05ea40eSJacky Bai }; 5495b0221bfSAnson Huang 5505b0221bfSAnson Huang system_counter: timer@306a0000 { 5515b0221bfSAnson Huang compatible = "nxp,sysctr-timer"; 5525b0221bfSAnson Huang reg = <0x306a0000 0x20000>; 5535b0221bfSAnson Huang interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 5545b0221bfSAnson Huang clocks = <&osc_24m>; 5555b0221bfSAnson Huang clock-names = "per"; 5565b0221bfSAnson Huang }; 557a05ea40eSJacky Bai }; 558a05ea40eSJacky Bai 559a05ea40eSJacky Bai aips3: bus@30800000 { 560a05ea40eSJacky Bai compatible = "fsl,aips-bus", "simple-bus"; 561a05ea40eSJacky Bai #address-cells = <1>; 562a05ea40eSJacky Bai #size-cells = <1>; 56310c74207SFabio Estevam ranges = <0x30800000 0x30800000 0x400000>; 564a05ea40eSJacky Bai 565a05ea40eSJacky Bai ecspi1: spi@30820000 { 566a05ea40eSJacky Bai compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; 567a05ea40eSJacky Bai #address-cells = <1>; 568a05ea40eSJacky Bai #size-cells = <0>; 569a05ea40eSJacky Bai reg = <0x30820000 0x10000>; 570a05ea40eSJacky Bai interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 571a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>, 572a05ea40eSJacky Bai <&clk IMX8MM_CLK_ECSPI1_ROOT>; 573a05ea40eSJacky Bai clock-names = "ipg", "per"; 574a05ea40eSJacky Bai dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; 575a05ea40eSJacky Bai dma-names = "rx", "tx"; 576a05ea40eSJacky Bai status = "disabled"; 577a05ea40eSJacky Bai }; 578a05ea40eSJacky Bai 579a05ea40eSJacky Bai ecspi2: spi@30830000 { 580a05ea40eSJacky Bai compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; 581a05ea40eSJacky Bai #address-cells = <1>; 582a05ea40eSJacky Bai #size-cells = <0>; 583a05ea40eSJacky Bai reg = <0x30830000 0x10000>; 584a05ea40eSJacky Bai interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 585a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>, 586a05ea40eSJacky Bai <&clk IMX8MM_CLK_ECSPI2_ROOT>; 587a05ea40eSJacky Bai clock-names = "ipg", "per"; 588a05ea40eSJacky Bai dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; 589a05ea40eSJacky Bai dma-names = "rx", "tx"; 590a05ea40eSJacky Bai status = "disabled"; 591a05ea40eSJacky Bai }; 592a05ea40eSJacky Bai 593a05ea40eSJacky Bai ecspi3: spi@30840000 { 594a05ea40eSJacky Bai compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; 595a05ea40eSJacky Bai #address-cells = <1>; 596a05ea40eSJacky Bai #size-cells = <0>; 597a05ea40eSJacky Bai reg = <0x30840000 0x10000>; 598a05ea40eSJacky Bai interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 599a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>, 600a05ea40eSJacky Bai <&clk IMX8MM_CLK_ECSPI3_ROOT>; 601a05ea40eSJacky Bai clock-names = "ipg", "per"; 602a05ea40eSJacky Bai dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; 603a05ea40eSJacky Bai dma-names = "rx", "tx"; 604a05ea40eSJacky Bai status = "disabled"; 605a05ea40eSJacky Bai }; 606a05ea40eSJacky Bai 607a05ea40eSJacky Bai uart1: serial@30860000 { 608a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 609a05ea40eSJacky Bai reg = <0x30860000 0x10000>; 610a05ea40eSJacky Bai interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 611a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART1_ROOT>, 612a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART1_ROOT>; 613a05ea40eSJacky Bai clock-names = "ipg", "per"; 614a05ea40eSJacky Bai dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>; 615a05ea40eSJacky Bai dma-names = "rx", "tx"; 616a05ea40eSJacky Bai status = "disabled"; 617a05ea40eSJacky Bai }; 618a05ea40eSJacky Bai 619a05ea40eSJacky Bai uart3: serial@30880000 { 620a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 621a05ea40eSJacky Bai reg = <0x30880000 0x10000>; 622a05ea40eSJacky Bai interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 623a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART3_ROOT>, 624a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART3_ROOT>; 625a05ea40eSJacky Bai clock-names = "ipg", "per"; 626a05ea40eSJacky Bai dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; 627a05ea40eSJacky Bai dma-names = "rx", "tx"; 628a05ea40eSJacky Bai status = "disabled"; 629a05ea40eSJacky Bai }; 630a05ea40eSJacky Bai 631a05ea40eSJacky Bai uart2: serial@30890000 { 632a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 633a05ea40eSJacky Bai reg = <0x30890000 0x10000>; 634a05ea40eSJacky Bai interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 635a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART2_ROOT>, 636a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART2_ROOT>; 637a05ea40eSJacky Bai clock-names = "ipg", "per"; 638a05ea40eSJacky Bai status = "disabled"; 639a05ea40eSJacky Bai }; 640a05ea40eSJacky Bai 641a05ea40eSJacky Bai i2c1: i2c@30a20000 { 642a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 643a05ea40eSJacky Bai #address-cells = <1>; 644a05ea40eSJacky Bai #size-cells = <0>; 645a05ea40eSJacky Bai reg = <0x30a20000 0x10000>; 646a05ea40eSJacky Bai interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 647a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C1_ROOT>; 648a05ea40eSJacky Bai status = "disabled"; 649a05ea40eSJacky Bai }; 650a05ea40eSJacky Bai 651a05ea40eSJacky Bai i2c2: i2c@30a30000 { 652a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 653a05ea40eSJacky Bai #address-cells = <1>; 654a05ea40eSJacky Bai #size-cells = <0>; 655a05ea40eSJacky Bai reg = <0x30a30000 0x10000>; 656a05ea40eSJacky Bai interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 657a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C2_ROOT>; 658a05ea40eSJacky Bai status = "disabled"; 659a05ea40eSJacky Bai }; 660a05ea40eSJacky Bai 661a05ea40eSJacky Bai i2c3: i2c@30a40000 { 662a05ea40eSJacky Bai #address-cells = <1>; 663a05ea40eSJacky Bai #size-cells = <0>; 664a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 665a05ea40eSJacky Bai reg = <0x30a40000 0x10000>; 666a05ea40eSJacky Bai interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 667a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C3_ROOT>; 668a05ea40eSJacky Bai status = "disabled"; 669a05ea40eSJacky Bai }; 670a05ea40eSJacky Bai 671a05ea40eSJacky Bai i2c4: i2c@30a50000 { 672a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 673a05ea40eSJacky Bai #address-cells = <1>; 674a05ea40eSJacky Bai #size-cells = <0>; 675a05ea40eSJacky Bai reg = <0x30a50000 0x10000>; 676a05ea40eSJacky Bai interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 677a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C4_ROOT>; 678a05ea40eSJacky Bai status = "disabled"; 679a05ea40eSJacky Bai }; 680a05ea40eSJacky Bai 681a05ea40eSJacky Bai uart4: serial@30a60000 { 682a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 683a05ea40eSJacky Bai reg = <0x30a60000 0x10000>; 684a05ea40eSJacky Bai interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 685a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART4_ROOT>, 686a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART4_ROOT>; 687a05ea40eSJacky Bai clock-names = "ipg", "per"; 688a05ea40eSJacky Bai dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>; 689a05ea40eSJacky Bai dma-names = "rx", "tx"; 690a05ea40eSJacky Bai status = "disabled"; 691a05ea40eSJacky Bai }; 692a05ea40eSJacky Bai 693a05ea40eSJacky Bai usdhc1: mmc@30b40000 { 694a05ea40eSJacky Bai compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; 695a05ea40eSJacky Bai reg = <0x30b40000 0x10000>; 696a05ea40eSJacky Bai interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 697a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_DUMMY>, 698a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS>, 699a05ea40eSJacky Bai <&clk IMX8MM_CLK_USDHC1_ROOT>; 700a05ea40eSJacky Bai clock-names = "ipg", "ahb", "per"; 701a05ea40eSJacky Bai assigned-clocks = <&clk IMX8MM_CLK_USDHC1>; 702a05ea40eSJacky Bai assigned-clock-rates = <400000000>; 703a05ea40eSJacky Bai fsl,tuning-start-tap = <20>; 704a05ea40eSJacky Bai fsl,tuning-step= <2>; 705a05ea40eSJacky Bai bus-width = <4>; 706a05ea40eSJacky Bai status = "disabled"; 707a05ea40eSJacky Bai }; 708a05ea40eSJacky Bai 709a05ea40eSJacky Bai usdhc2: mmc@30b50000 { 710a05ea40eSJacky Bai compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; 711a05ea40eSJacky Bai reg = <0x30b50000 0x10000>; 712a05ea40eSJacky Bai interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 713a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_DUMMY>, 714a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS>, 715a05ea40eSJacky Bai <&clk IMX8MM_CLK_USDHC2_ROOT>; 716a05ea40eSJacky Bai clock-names = "ipg", "ahb", "per"; 717a05ea40eSJacky Bai fsl,tuning-start-tap = <20>; 718a05ea40eSJacky Bai fsl,tuning-step= <2>; 719a05ea40eSJacky Bai bus-width = <4>; 720a05ea40eSJacky Bai status = "disabled"; 721a05ea40eSJacky Bai }; 722a05ea40eSJacky Bai 723a05ea40eSJacky Bai usdhc3: mmc@30b60000 { 724a05ea40eSJacky Bai compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; 725a05ea40eSJacky Bai reg = <0x30b60000 0x10000>; 726a05ea40eSJacky Bai interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 727a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_DUMMY>, 728a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS>, 729a05ea40eSJacky Bai <&clk IMX8MM_CLK_USDHC3_ROOT>; 730a05ea40eSJacky Bai clock-names = "ipg", "ahb", "per"; 731a05ea40eSJacky Bai assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>; 732a05ea40eSJacky Bai assigned-clock-rates = <400000000>; 733a05ea40eSJacky Bai fsl,tuning-start-tap = <20>; 734a05ea40eSJacky Bai fsl,tuning-step= <2>; 735a05ea40eSJacky Bai bus-width = <4>; 736a05ea40eSJacky Bai status = "disabled"; 737a05ea40eSJacky Bai }; 738a05ea40eSJacky Bai 739a05ea40eSJacky Bai sdma1: dma-controller@30bd0000 { 740a05ea40eSJacky Bai compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; 741a05ea40eSJacky Bai reg = <0x30bd0000 0x10000>; 742a05ea40eSJacky Bai interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 743a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>, 744a05ea40eSJacky Bai <&clk IMX8MM_CLK_SDMA1_ROOT>; 745a05ea40eSJacky Bai clock-names = "ipg", "ahb"; 746a05ea40eSJacky Bai #dma-cells = <3>; 747a05ea40eSJacky Bai fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; 748a05ea40eSJacky Bai }; 749a05ea40eSJacky Bai 750a05ea40eSJacky Bai fec1: ethernet@30be0000 { 751a05ea40eSJacky Bai compatible = "fsl,imx8mm-fec", "fsl,imx6sx-fec"; 752a05ea40eSJacky Bai reg = <0x30be0000 0x10000>; 753a05ea40eSJacky Bai interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 754a05ea40eSJacky Bai <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 755a05ea40eSJacky Bai <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 756a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ENET1_ROOT>, 757a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET1_ROOT>, 758a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_TIMER>, 759a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_REF>, 760a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_PHY_REF>; 761a05ea40eSJacky Bai clock-names = "ipg", "ahb", "ptp", 762a05ea40eSJacky Bai "enet_clk_ref", "enet_out"; 763a05ea40eSJacky Bai assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>, 764a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_TIMER>, 765a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_REF>, 766a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_TIMER>; 767a05ea40eSJacky Bai assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>, 768a05ea40eSJacky Bai <&clk IMX8MM_SYS_PLL2_100M>, 769a05ea40eSJacky Bai <&clk IMX8MM_SYS_PLL2_125M>; 770a05ea40eSJacky Bai assigned-clock-rates = <0>, <0>, <125000000>, <100000000>; 771a05ea40eSJacky Bai fsl,num-tx-queues = <3>; 772a05ea40eSJacky Bai fsl,num-rx-queues = <3>; 773a05ea40eSJacky Bai status = "disabled"; 774a05ea40eSJacky Bai }; 775a05ea40eSJacky Bai 776a05ea40eSJacky Bai }; 777a05ea40eSJacky Bai 778a05ea40eSJacky Bai aips4: bus@32c00000 { 779a05ea40eSJacky Bai compatible = "fsl,aips-bus", "simple-bus"; 780a05ea40eSJacky Bai #address-cells = <1>; 781a05ea40eSJacky Bai #size-cells = <1>; 78210c74207SFabio Estevam ranges = <0x32c00000 0x32c00000 0x400000>; 783a05ea40eSJacky Bai 784a05ea40eSJacky Bai usbotg1: usb@32e40000 { 785a05ea40eSJacky Bai compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb"; 786a05ea40eSJacky Bai reg = <0x32e40000 0x200>; 787a05ea40eSJacky Bai interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 788a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; 789a05ea40eSJacky Bai clock-names = "usb1_ctrl_root_clk"; 7908b01840eSLi Jun assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; 7918b01840eSLi Jun assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; 792a05ea40eSJacky Bai fsl,usbphy = <&usbphynop1>; 793a05ea40eSJacky Bai fsl,usbmisc = <&usbmisc1 0>; 794a05ea40eSJacky Bai status = "disabled"; 795a05ea40eSJacky Bai }; 796a05ea40eSJacky Bai 797a05ea40eSJacky Bai usbmisc1: usbmisc@32e40200 { 798a05ea40eSJacky Bai compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc"; 799a05ea40eSJacky Bai #index-cells = <1>; 800a05ea40eSJacky Bai reg = <0x32e40200 0x200>; 801a05ea40eSJacky Bai }; 802a05ea40eSJacky Bai 803a05ea40eSJacky Bai usbotg2: usb@32e50000 { 804a05ea40eSJacky Bai compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb"; 805a05ea40eSJacky Bai reg = <0x32e50000 0x200>; 806a05ea40eSJacky Bai interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 807a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; 808a05ea40eSJacky Bai clock-names = "usb1_ctrl_root_clk"; 8098b01840eSLi Jun assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; 8108b01840eSLi Jun assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; 811a05ea40eSJacky Bai fsl,usbphy = <&usbphynop2>; 812a05ea40eSJacky Bai fsl,usbmisc = <&usbmisc2 0>; 813a05ea40eSJacky Bai status = "disabled"; 814a05ea40eSJacky Bai }; 815a05ea40eSJacky Bai 816a05ea40eSJacky Bai usbmisc2: usbmisc@32e50200 { 817a05ea40eSJacky Bai compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc"; 818a05ea40eSJacky Bai #index-cells = <1>; 819a05ea40eSJacky Bai reg = <0x32e50200 0x200>; 820a05ea40eSJacky Bai }; 821a05ea40eSJacky Bai 822a05ea40eSJacky Bai }; 823a05ea40eSJacky Bai 824a05ea40eSJacky Bai dma_apbh: dma-controller@33000000 { 825a05ea40eSJacky Bai compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh"; 826a05ea40eSJacky Bai reg = <0x33000000 0x2000>; 827a05ea40eSJacky Bai interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 828a05ea40eSJacky Bai <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 829a05ea40eSJacky Bai <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 830a05ea40eSJacky Bai <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 831a05ea40eSJacky Bai interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; 832a05ea40eSJacky Bai #dma-cells = <1>; 833a05ea40eSJacky Bai dma-channels = <4>; 834a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>; 835a05ea40eSJacky Bai }; 836a05ea40eSJacky Bai 837a05ea40eSJacky Bai gpmi: nand-controller@33002000{ 838a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpmi-nand", "fsl,imx7d-gpmi-nand"; 839a05ea40eSJacky Bai #address-cells = <1>; 840a05ea40eSJacky Bai #size-cells = <1>; 841a05ea40eSJacky Bai reg = <0x33002000 0x2000>, <0x33004000 0x4000>; 842a05ea40eSJacky Bai reg-names = "gpmi-nand", "bch"; 843a05ea40eSJacky Bai interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 844a05ea40eSJacky Bai interrupt-names = "bch"; 845a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_NAND_ROOT>, 846a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>; 847a05ea40eSJacky Bai clock-names = "gpmi_io", "gpmi_bch_apb"; 848a05ea40eSJacky Bai dmas = <&dma_apbh 0>; 849a05ea40eSJacky Bai dma-names = "rx-tx"; 850a05ea40eSJacky Bai status = "disabled"; 851a05ea40eSJacky Bai }; 852b4e3e54aSAnson Huang 853b4e3e54aSAnson Huang gic: interrupt-controller@38800000 { 854b4e3e54aSAnson Huang compatible = "arm,gic-v3"; 855b4e3e54aSAnson Huang reg = <0x38800000 0x10000>, /* GIC Dist */ 856b4e3e54aSAnson Huang <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */ 857b4e3e54aSAnson Huang #interrupt-cells = <3>; 858b4e3e54aSAnson Huang interrupt-controller; 859b4e3e54aSAnson Huang interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 860b4e3e54aSAnson Huang }; 8611efe85c9SLeonard Crestez 8621efe85c9SLeonard Crestez ddr-pmu@3d800000 { 8631efe85c9SLeonard Crestez compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu"; 8641efe85c9SLeonard Crestez reg = <0x3d800000 0x400000>; 8651efe85c9SLeonard Crestez interrupt-parent = <&gic>; 8661efe85c9SLeonard Crestez interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 8671efe85c9SLeonard Crestez }; 868a05ea40eSJacky Bai }; 869a05ea40eSJacky Bai}; 870