1a05ea40eSJacky Bai// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2a05ea40eSJacky Bai/* 3a05ea40eSJacky Bai * Copyright 2019 NXP 4a05ea40eSJacky Bai */ 5a05ea40eSJacky Bai 6a05ea40eSJacky Bai#include <dt-bindings/clock/imx8mm-clock.h> 7a05ea40eSJacky Bai#include <dt-bindings/gpio/gpio.h> 8a05ea40eSJacky Bai#include <dt-bindings/input/input.h> 9a05ea40eSJacky Bai#include <dt-bindings/interrupt-controller/arm-gic.h> 10a05ea40eSJacky Bai#include <dt-bindings/thermal/thermal.h> 11a05ea40eSJacky Bai 12a05ea40eSJacky Bai#include "imx8mm-pinfunc.h" 13a05ea40eSJacky Bai 14a05ea40eSJacky Bai/ { 15a05ea40eSJacky Bai interrupt-parent = <&gic>; 16a05ea40eSJacky Bai #address-cells = <2>; 17a05ea40eSJacky Bai #size-cells = <2>; 18a05ea40eSJacky Bai 19a05ea40eSJacky Bai aliases { 20a05ea40eSJacky Bai ethernet0 = &fec1; 21a05ea40eSJacky Bai i2c0 = &i2c1; 22a05ea40eSJacky Bai i2c1 = &i2c2; 23a05ea40eSJacky Bai i2c2 = &i2c3; 24a05ea40eSJacky Bai i2c3 = &i2c4; 25a05ea40eSJacky Bai serial0 = &uart1; 26a05ea40eSJacky Bai serial1 = &uart2; 27a05ea40eSJacky Bai serial2 = &uart3; 28a05ea40eSJacky Bai serial3 = &uart4; 29a05ea40eSJacky Bai spi0 = &ecspi1; 30a05ea40eSJacky Bai spi1 = &ecspi2; 31a05ea40eSJacky Bai spi2 = &ecspi3; 32a05ea40eSJacky Bai mmc0 = &usdhc1; 33a05ea40eSJacky Bai mmc1 = &usdhc2; 34a05ea40eSJacky Bai mmc2 = &usdhc3; 35a05ea40eSJacky Bai gpio0 = &gpio1; 36a05ea40eSJacky Bai gpio1 = &gpio2; 37a05ea40eSJacky Bai gpio2 = &gpio3; 38a05ea40eSJacky Bai gpio3 = &gpio4; 39a05ea40eSJacky Bai gpio4 = &gpio5; 40a05ea40eSJacky Bai }; 41a05ea40eSJacky Bai 42a05ea40eSJacky Bai cpus { 43a05ea40eSJacky Bai #address-cells = <1>; 44a05ea40eSJacky Bai #size-cells = <0>; 45a05ea40eSJacky Bai 46a1406b72SAnson Huang idle-states { 47a1406b72SAnson Huang entry-method = "psci"; 48a1406b72SAnson Huang 49a1406b72SAnson Huang cpu_pd_wait: cpu-pd-wait { 50a1406b72SAnson Huang compatible = "arm,idle-state"; 51a1406b72SAnson Huang arm,psci-suspend-param = <0x0010033>; 52a1406b72SAnson Huang local-timer-stop; 53a1406b72SAnson Huang entry-latency-us = <1000>; 54a1406b72SAnson Huang exit-latency-us = <700>; 55a1406b72SAnson Huang min-residency-us = <2700>; 56a1406b72SAnson Huang }; 57a1406b72SAnson Huang }; 58a1406b72SAnson Huang 59a05ea40eSJacky Bai A53_0: cpu@0 { 60a05ea40eSJacky Bai device_type = "cpu"; 61a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 62a05ea40eSJacky Bai reg = <0x0>; 63e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 64e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 65a05ea40eSJacky Bai enable-method = "psci"; 66a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 67e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 68f403a26cSLeonard Crestez nvmem-cells = <&cpu_speed_grade>; 69f403a26cSLeonard Crestez nvmem-cell-names = "speed_grade"; 70a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 7111699fd5SAnson Huang #cooling-cells = <2>; 72a05ea40eSJacky Bai }; 73a05ea40eSJacky Bai 74a05ea40eSJacky Bai A53_1: cpu@1 { 75a05ea40eSJacky Bai device_type = "cpu"; 76a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 77a05ea40eSJacky Bai reg = <0x1>; 78e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 79e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 80a05ea40eSJacky Bai enable-method = "psci"; 81a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 82e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 83a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 8411699fd5SAnson Huang #cooling-cells = <2>; 85a05ea40eSJacky Bai }; 86a05ea40eSJacky Bai 87a05ea40eSJacky Bai A53_2: cpu@2 { 88a05ea40eSJacky Bai device_type = "cpu"; 89a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 90a05ea40eSJacky Bai reg = <0x2>; 91e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 92e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 93a05ea40eSJacky Bai enable-method = "psci"; 94a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 95e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 96a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 9711699fd5SAnson Huang #cooling-cells = <2>; 98a05ea40eSJacky Bai }; 99a05ea40eSJacky Bai 100a05ea40eSJacky Bai A53_3: cpu@3 { 101a05ea40eSJacky Bai device_type = "cpu"; 102a05ea40eSJacky Bai compatible = "arm,cortex-a53"; 103a05ea40eSJacky Bai reg = <0x3>; 104e85c9d0fSLeonard Crestez clock-latency = <61036>; /* two CLK32 periods */ 105e85c9d0fSLeonard Crestez clocks = <&clk IMX8MM_CLK_ARM>; 106a05ea40eSJacky Bai enable-method = "psci"; 107a05ea40eSJacky Bai next-level-cache = <&A53_L2>; 108e85c9d0fSLeonard Crestez operating-points-v2 = <&a53_opp_table>; 109a1406b72SAnson Huang cpu-idle-states = <&cpu_pd_wait>; 11011699fd5SAnson Huang #cooling-cells = <2>; 111a05ea40eSJacky Bai }; 112a05ea40eSJacky Bai 113a05ea40eSJacky Bai A53_L2: l2-cache0 { 114a05ea40eSJacky Bai compatible = "cache"; 115a05ea40eSJacky Bai }; 116a05ea40eSJacky Bai }; 117a05ea40eSJacky Bai 118e85c9d0fSLeonard Crestez a53_opp_table: opp-table { 119e85c9d0fSLeonard Crestez compatible = "operating-points-v2"; 120e85c9d0fSLeonard Crestez opp-shared; 121e85c9d0fSLeonard Crestez 122e85c9d0fSLeonard Crestez opp-1200000000 { 123e85c9d0fSLeonard Crestez opp-hz = /bits/ 64 <1200000000>; 124e85c9d0fSLeonard Crestez opp-microvolt = <850000>; 125f403a26cSLeonard Crestez opp-supported-hw = <0xe>, <0x7>; 126e85c9d0fSLeonard Crestez clock-latency-ns = <150000>; 1270d9df581SAnson Huang opp-suspend; 128e85c9d0fSLeonard Crestez }; 129e85c9d0fSLeonard Crestez 130e85c9d0fSLeonard Crestez opp-1600000000 { 131e85c9d0fSLeonard Crestez opp-hz = /bits/ 64 <1600000000>; 132e85c9d0fSLeonard Crestez opp-microvolt = <900000>; 133f403a26cSLeonard Crestez opp-supported-hw = <0xc>, <0x7>; 134e85c9d0fSLeonard Crestez clock-latency-ns = <150000>; 1350d9df581SAnson Huang opp-suspend; 136f403a26cSLeonard Crestez }; 137f403a26cSLeonard Crestez 138f403a26cSLeonard Crestez opp-1800000000 { 139f403a26cSLeonard Crestez opp-hz = /bits/ 64 <1800000000>; 140f403a26cSLeonard Crestez opp-microvolt = <1000000>; 141cd7c2ddfSAnson Huang opp-supported-hw = <0x8>, <0x3>; 142f403a26cSLeonard Crestez clock-latency-ns = <150000>; 1430d9df581SAnson Huang opp-suspend; 144e85c9d0fSLeonard Crestez }; 145e85c9d0fSLeonard Crestez }; 146e85c9d0fSLeonard Crestez 147a05ea40eSJacky Bai osc_32k: clock-osc-32k { 148a05ea40eSJacky Bai compatible = "fixed-clock"; 149a05ea40eSJacky Bai #clock-cells = <0>; 150a05ea40eSJacky Bai clock-frequency = <32768>; 151a05ea40eSJacky Bai clock-output-names = "osc_32k"; 152a05ea40eSJacky Bai }; 153a05ea40eSJacky Bai 154a05ea40eSJacky Bai osc_24m: clock-osc-24m { 155a05ea40eSJacky Bai compatible = "fixed-clock"; 156a05ea40eSJacky Bai #clock-cells = <0>; 157a05ea40eSJacky Bai clock-frequency = <24000000>; 158a05ea40eSJacky Bai clock-output-names = "osc_24m"; 159a05ea40eSJacky Bai }; 160a05ea40eSJacky Bai 161a05ea40eSJacky Bai clk_ext1: clock-ext1 { 162a05ea40eSJacky Bai compatible = "fixed-clock"; 163a05ea40eSJacky Bai #clock-cells = <0>; 164a05ea40eSJacky Bai clock-frequency = <133000000>; 165a05ea40eSJacky Bai clock-output-names = "clk_ext1"; 166a05ea40eSJacky Bai }; 167a05ea40eSJacky Bai 168a05ea40eSJacky Bai clk_ext2: clock-ext2 { 169a05ea40eSJacky Bai compatible = "fixed-clock"; 170a05ea40eSJacky Bai #clock-cells = <0>; 171a05ea40eSJacky Bai clock-frequency = <133000000>; 172a05ea40eSJacky Bai clock-output-names = "clk_ext2"; 173a05ea40eSJacky Bai }; 174a05ea40eSJacky Bai 175a05ea40eSJacky Bai clk_ext3: clock-ext3 { 176a05ea40eSJacky Bai compatible = "fixed-clock"; 177a05ea40eSJacky Bai #clock-cells = <0>; 178a05ea40eSJacky Bai clock-frequency = <133000000>; 179a05ea40eSJacky Bai clock-output-names = "clk_ext3"; 180a05ea40eSJacky Bai }; 181a05ea40eSJacky Bai 182a05ea40eSJacky Bai clk_ext4: clock-ext4 { 183a05ea40eSJacky Bai compatible = "fixed-clock"; 184a05ea40eSJacky Bai #clock-cells = <0>; 185a05ea40eSJacky Bai clock-frequency= <133000000>; 186a05ea40eSJacky Bai clock-output-names = "clk_ext4"; 187a05ea40eSJacky Bai }; 188a05ea40eSJacky Bai 189a05ea40eSJacky Bai psci { 190a05ea40eSJacky Bai compatible = "arm,psci-1.0"; 191a05ea40eSJacky Bai method = "smc"; 192a05ea40eSJacky Bai }; 193a05ea40eSJacky Bai 194a05ea40eSJacky Bai pmu { 195a05ea40eSJacky Bai compatible = "arm,armv8-pmuv3"; 196a05ea40eSJacky Bai interrupts = <GIC_PPI 7 197a05ea40eSJacky Bai (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 198a05ea40eSJacky Bai interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>; 199a05ea40eSJacky Bai }; 200a05ea40eSJacky Bai 201a05ea40eSJacky Bai timer { 202a05ea40eSJacky Bai compatible = "arm,armv8-timer"; 203a05ea40eSJacky Bai interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */ 204a05ea40eSJacky Bai <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */ 205a05ea40eSJacky Bai <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */ 206a05ea40eSJacky Bai <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */ 207a05ea40eSJacky Bai clock-frequency = <8000000>; 208a05ea40eSJacky Bai arm,no-tick-in-suspend; 209a05ea40eSJacky Bai }; 210a05ea40eSJacky Bai 21111699fd5SAnson Huang thermal-zones { 21211699fd5SAnson Huang cpu-thermal { 21311699fd5SAnson Huang polling-delay-passive = <250>; 21411699fd5SAnson Huang polling-delay = <2000>; 21511699fd5SAnson Huang thermal-sensors = <&tmu>; 21611699fd5SAnson Huang trips { 21711699fd5SAnson Huang cpu_alert0: trip0 { 21811699fd5SAnson Huang temperature = <85000>; 21911699fd5SAnson Huang hysteresis = <2000>; 22011699fd5SAnson Huang type = "passive"; 22111699fd5SAnson Huang }; 22211699fd5SAnson Huang 22311699fd5SAnson Huang cpu_crit0: trip1 { 22411699fd5SAnson Huang temperature = <95000>; 22511699fd5SAnson Huang hysteresis = <2000>; 22611699fd5SAnson Huang type = "critical"; 22711699fd5SAnson Huang }; 22811699fd5SAnson Huang }; 22911699fd5SAnson Huang 23011699fd5SAnson Huang cooling-maps { 23111699fd5SAnson Huang map0 { 23211699fd5SAnson Huang trip = <&cpu_alert0>; 23311699fd5SAnson Huang cooling-device = 23411699fd5SAnson Huang <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 23511699fd5SAnson Huang <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 23611699fd5SAnson Huang <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 23711699fd5SAnson Huang <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 23811699fd5SAnson Huang }; 23911699fd5SAnson Huang }; 24011699fd5SAnson Huang }; 24111699fd5SAnson Huang }; 24211699fd5SAnson Huang 243a656622aSFabio Estevam usbphynop1: usbphynop1 { 244a656622aSFabio Estevam compatible = "usb-nop-xceiv"; 245a656622aSFabio Estevam clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 246a656622aSFabio Estevam assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 247a656622aSFabio Estevam assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; 248a656622aSFabio Estevam clock-names = "main_clk"; 249a656622aSFabio Estevam }; 250a656622aSFabio Estevam 251a656622aSFabio Estevam usbphynop2: usbphynop2 { 252a656622aSFabio Estevam compatible = "usb-nop-xceiv"; 253a656622aSFabio Estevam clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 254a656622aSFabio Estevam assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; 255a656622aSFabio Estevam assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; 256a656622aSFabio Estevam clock-names = "main_clk"; 257a656622aSFabio Estevam }; 258a656622aSFabio Estevam 259951c1d37SFabio Estevam soc@0 { 260a05ea40eSJacky Bai compatible = "simple-bus"; 261a05ea40eSJacky Bai #address-cells = <1>; 262a05ea40eSJacky Bai #size-cells = <1>; 263a05ea40eSJacky Bai ranges = <0x0 0x0 0x0 0x3e000000>; 264a05ea40eSJacky Bai 265a05ea40eSJacky Bai aips1: bus@30000000 { 266aebf07e6SPeng Fan compatible = "simple-bus"; 267a05ea40eSJacky Bai #address-cells = <1>; 268a05ea40eSJacky Bai #size-cells = <1>; 26910c74207SFabio Estevam ranges = <0x30000000 0x30000000 0x400000>; 270a05ea40eSJacky Bai 2714bee4357SDaniel Baluta sai1: sai@30010000 { 2724bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 2734bee4357SDaniel Baluta reg = <0x30010000 0x10000>; 2744bee4357SDaniel Baluta interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 2754bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI1_IPG>, 2764bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI1_ROOT>, 2774bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 2784bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 2794bee4357SDaniel Baluta dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>; 2804bee4357SDaniel Baluta dma-names = "rx", "tx"; 2814bee4357SDaniel Baluta status = "disabled"; 2824bee4357SDaniel Baluta }; 2834bee4357SDaniel Baluta 2844bee4357SDaniel Baluta sai2: sai@30020000 { 2854bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 2864bee4357SDaniel Baluta reg = <0x30020000 0x10000>; 2874bee4357SDaniel Baluta interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 2884bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI2_IPG>, 2894bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI2_ROOT>, 2904bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 2914bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 2924bee4357SDaniel Baluta dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>; 2934bee4357SDaniel Baluta dma-names = "rx", "tx"; 2944bee4357SDaniel Baluta status = "disabled"; 2954bee4357SDaniel Baluta }; 2964bee4357SDaniel Baluta 2974bee4357SDaniel Baluta sai3: sai@30030000 { 2984bee4357SDaniel Baluta #sound-dai-cells = <0>; 2994bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 3004bee4357SDaniel Baluta reg = <0x30030000 0x10000>; 3014bee4357SDaniel Baluta interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 3024bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI3_IPG>, 3034bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI3_ROOT>, 3044bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 3054bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 3064bee4357SDaniel Baluta dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>; 3074bee4357SDaniel Baluta dma-names = "rx", "tx"; 3084bee4357SDaniel Baluta status = "disabled"; 3094bee4357SDaniel Baluta }; 3104bee4357SDaniel Baluta 3114bee4357SDaniel Baluta sai5: sai@30050000 { 3124bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 3134bee4357SDaniel Baluta reg = <0x30050000 0x10000>; 3144bee4357SDaniel Baluta interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 3154bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI5_IPG>, 3164bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI5_ROOT>, 3174bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 3184bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 3194bee4357SDaniel Baluta dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>; 3204bee4357SDaniel Baluta dma-names = "rx", "tx"; 3214bee4357SDaniel Baluta status = "disabled"; 3224bee4357SDaniel Baluta }; 3234bee4357SDaniel Baluta 3244bee4357SDaniel Baluta sai6: sai@30060000 { 3254bee4357SDaniel Baluta compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; 3264bee4357SDaniel Baluta reg = <0x30060000 0x10000>; 3274bee4357SDaniel Baluta interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 3284bee4357SDaniel Baluta clocks = <&clk IMX8MM_CLK_SAI6_IPG>, 3294bee4357SDaniel Baluta <&clk IMX8MM_CLK_SAI6_ROOT>, 3304bee4357SDaniel Baluta <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; 3314bee4357SDaniel Baluta clock-names = "bus", "mclk1", "mclk2", "mclk3"; 3324bee4357SDaniel Baluta dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>; 3334bee4357SDaniel Baluta dma-names = "rx", "tx"; 3344bee4357SDaniel Baluta status = "disabled"; 3354bee4357SDaniel Baluta }; 336a05ea40eSJacky Bai 337a05ea40eSJacky Bai gpio1: gpio@30200000 { 338a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 339a05ea40eSJacky Bai reg = <0x30200000 0x10000>; 340a05ea40eSJacky Bai interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 341a05ea40eSJacky Bai <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 34209892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO1_ROOT>; 343a05ea40eSJacky Bai gpio-controller; 344a05ea40eSJacky Bai #gpio-cells = <2>; 345a05ea40eSJacky Bai interrupt-controller; 346a05ea40eSJacky Bai #interrupt-cells = <2>; 34715626359SAnson Huang gpio-ranges = <&iomuxc 0 10 30>; 348a05ea40eSJacky Bai }; 349a05ea40eSJacky Bai 350a05ea40eSJacky Bai gpio2: gpio@30210000 { 351a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 352a05ea40eSJacky Bai reg = <0x30210000 0x10000>; 353a05ea40eSJacky Bai interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 354a05ea40eSJacky Bai <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 35509892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO2_ROOT>; 356a05ea40eSJacky Bai gpio-controller; 357a05ea40eSJacky Bai #gpio-cells = <2>; 358a05ea40eSJacky Bai interrupt-controller; 359a05ea40eSJacky Bai #interrupt-cells = <2>; 36015626359SAnson Huang gpio-ranges = <&iomuxc 0 40 21>; 361a05ea40eSJacky Bai }; 362a05ea40eSJacky Bai 363a05ea40eSJacky Bai gpio3: gpio@30220000 { 364a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 365a05ea40eSJacky Bai reg = <0x30220000 0x10000>; 366a05ea40eSJacky Bai interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 367a05ea40eSJacky Bai <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 36809892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO3_ROOT>; 369a05ea40eSJacky Bai gpio-controller; 370a05ea40eSJacky Bai #gpio-cells = <2>; 371a05ea40eSJacky Bai interrupt-controller; 372a05ea40eSJacky Bai #interrupt-cells = <2>; 37315626359SAnson Huang gpio-ranges = <&iomuxc 0 61 26>; 374a05ea40eSJacky Bai }; 375a05ea40eSJacky Bai 376a05ea40eSJacky Bai gpio4: gpio@30230000 { 377a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 378a05ea40eSJacky Bai reg = <0x30230000 0x10000>; 379a05ea40eSJacky Bai interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 380a05ea40eSJacky Bai <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 38109892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO4_ROOT>; 382a05ea40eSJacky Bai gpio-controller; 383a05ea40eSJacky Bai #gpio-cells = <2>; 384a05ea40eSJacky Bai interrupt-controller; 385a05ea40eSJacky Bai #interrupt-cells = <2>; 38615626359SAnson Huang gpio-ranges = <&iomuxc 0 87 32>; 387a05ea40eSJacky Bai }; 388a05ea40eSJacky Bai 389a05ea40eSJacky Bai gpio5: gpio@30240000 { 390a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; 391a05ea40eSJacky Bai reg = <0x30240000 0x10000>; 392a05ea40eSJacky Bai interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 393a05ea40eSJacky Bai <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 39409892aa1SAnson Huang clocks = <&clk IMX8MM_CLK_GPIO5_ROOT>; 395a05ea40eSJacky Bai gpio-controller; 396a05ea40eSJacky Bai #gpio-cells = <2>; 397a05ea40eSJacky Bai interrupt-controller; 398a05ea40eSJacky Bai #interrupt-cells = <2>; 39915626359SAnson Huang gpio-ranges = <&iomuxc 0 119 30>; 400a05ea40eSJacky Bai }; 401a05ea40eSJacky Bai 40211699fd5SAnson Huang tmu: tmu@30260000 { 40311699fd5SAnson Huang compatible = "fsl,imx8mm-tmu"; 40411699fd5SAnson Huang reg = <0x30260000 0x10000>; 40511699fd5SAnson Huang clocks = <&clk IMX8MM_CLK_TMU_ROOT>; 40611699fd5SAnson Huang #thermal-sensor-cells = <0>; 40711699fd5SAnson Huang }; 40811699fd5SAnson Huang 409a05ea40eSJacky Bai wdog1: watchdog@30280000 { 410a05ea40eSJacky Bai compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; 411a05ea40eSJacky Bai reg = <0x30280000 0x10000>; 412a05ea40eSJacky Bai interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 413a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_WDOG1_ROOT>; 414a05ea40eSJacky Bai status = "disabled"; 415a05ea40eSJacky Bai }; 416a05ea40eSJacky Bai 417a05ea40eSJacky Bai wdog2: watchdog@30290000 { 418a05ea40eSJacky Bai compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; 419a05ea40eSJacky Bai reg = <0x30290000 0x10000>; 420a05ea40eSJacky Bai interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 421a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_WDOG2_ROOT>; 422a05ea40eSJacky Bai status = "disabled"; 423a05ea40eSJacky Bai }; 424a05ea40eSJacky Bai 425a05ea40eSJacky Bai wdog3: watchdog@302a0000 { 426a05ea40eSJacky Bai compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; 427a05ea40eSJacky Bai reg = <0x302a0000 0x10000>; 428a05ea40eSJacky Bai interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 429a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_WDOG3_ROOT>; 430a05ea40eSJacky Bai status = "disabled"; 431a05ea40eSJacky Bai }; 432a05ea40eSJacky Bai 433a05ea40eSJacky Bai sdma2: dma-controller@302c0000 { 434e346ff93SShengjiu Wang compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma"; 435a05ea40eSJacky Bai reg = <0x302c0000 0x10000>; 436a05ea40eSJacky Bai interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 437a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_SDMA2_ROOT>, 438a05ea40eSJacky Bai <&clk IMX8MM_CLK_SDMA2_ROOT>; 439a05ea40eSJacky Bai clock-names = "ipg", "ahb"; 440a05ea40eSJacky Bai #dma-cells = <3>; 441a05ea40eSJacky Bai fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; 442a05ea40eSJacky Bai }; 443a05ea40eSJacky Bai 444a05ea40eSJacky Bai sdma3: dma-controller@302b0000 { 445e346ff93SShengjiu Wang compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma"; 446a05ea40eSJacky Bai reg = <0x302b0000 0x10000>; 447a05ea40eSJacky Bai interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 448a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_SDMA3_ROOT>, 449a05ea40eSJacky Bai <&clk IMX8MM_CLK_SDMA3_ROOT>; 450a05ea40eSJacky Bai clock-names = "ipg", "ahb"; 451a05ea40eSJacky Bai #dma-cells = <3>; 452a05ea40eSJacky Bai fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; 453a05ea40eSJacky Bai }; 454a05ea40eSJacky Bai 455a05ea40eSJacky Bai iomuxc: pinctrl@30330000 { 456a05ea40eSJacky Bai compatible = "fsl,imx8mm-iomuxc"; 457a05ea40eSJacky Bai reg = <0x30330000 0x10000>; 458a05ea40eSJacky Bai }; 459a05ea40eSJacky Bai 460a05ea40eSJacky Bai gpr: iomuxc-gpr@30340000 { 461a05ea40eSJacky Bai compatible = "fsl,imx8mm-iomuxc-gpr", "syscon"; 462a05ea40eSJacky Bai reg = <0x30340000 0x10000>; 463a05ea40eSJacky Bai }; 464a05ea40eSJacky Bai 465a05ea40eSJacky Bai ocotp: ocotp-ctrl@30350000 { 466b09802a0SAnson Huang compatible = "fsl,imx8mm-ocotp", "syscon"; 467a05ea40eSJacky Bai reg = <0x30350000 0x10000>; 468a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_OCOTP_ROOT>; 469a05ea40eSJacky Bai /* For nvmem subnodes */ 470a05ea40eSJacky Bai #address-cells = <1>; 471a05ea40eSJacky Bai #size-cells = <1>; 472f403a26cSLeonard Crestez 473f403a26cSLeonard Crestez cpu_speed_grade: speed-grade@10 { 474f403a26cSLeonard Crestez reg = <0x10 4>; 475f403a26cSLeonard Crestez }; 476a05ea40eSJacky Bai }; 477a05ea40eSJacky Bai 478a05ea40eSJacky Bai anatop: anatop@30360000 { 4790900a484SFancy Fang compatible = "fsl,imx8mm-anatop", "syscon"; 480a05ea40eSJacky Bai reg = <0x30360000 0x10000>; 481a05ea40eSJacky Bai }; 482a05ea40eSJacky Bai 483a05ea40eSJacky Bai snvs: snvs@30370000 { 484a05ea40eSJacky Bai compatible = "fsl,sec-v4.0-mon","syscon", "simple-mfd"; 485a05ea40eSJacky Bai reg = <0x30370000 0x10000>; 486a05ea40eSJacky Bai 487a05ea40eSJacky Bai snvs_rtc: snvs-rtc-lp { 488a05ea40eSJacky Bai compatible = "fsl,sec-v4.0-mon-rtc-lp"; 489a05ea40eSJacky Bai regmap = <&snvs>; 490a05ea40eSJacky Bai offset = <0x34>; 491a05ea40eSJacky Bai interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 492a05ea40eSJacky Bai <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 493f145b209SAnson Huang clocks = <&clk IMX8MM_CLK_SNVS_ROOT>; 494f145b209SAnson Huang clock-names = "snvs-rtc"; 495a05ea40eSJacky Bai }; 496a05ea40eSJacky Bai 497a05ea40eSJacky Bai snvs_pwrkey: snvs-powerkey { 498a05ea40eSJacky Bai compatible = "fsl,sec-v4.0-pwrkey"; 499a05ea40eSJacky Bai regmap = <&snvs>; 500a05ea40eSJacky Bai interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 50146770eaeSAndré Draszik clocks = <&clk IMX8MM_CLK_SNVS_ROOT>; 50246770eaeSAndré Draszik clock-names = "snvs-pwrkey"; 503a05ea40eSJacky Bai linux,keycode = <KEY_POWER>; 504a05ea40eSJacky Bai wakeup-source; 505d038c1dcSAnson Huang status = "disabled"; 506a05ea40eSJacky Bai }; 507a05ea40eSJacky Bai }; 508a05ea40eSJacky Bai 509a05ea40eSJacky Bai clk: clock-controller@30380000 { 510a05ea40eSJacky Bai compatible = "fsl,imx8mm-ccm"; 511a05ea40eSJacky Bai reg = <0x30380000 0x10000>; 512a05ea40eSJacky Bai #clock-cells = <1>; 513a05ea40eSJacky Bai clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, 514a05ea40eSJacky Bai <&clk_ext3>, <&clk_ext4>; 515a05ea40eSJacky Bai clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", 516a05ea40eSJacky Bai "clk_ext3", "clk_ext4"; 5176b392e16SAbel Vesa assigned-clocks = <&clk IMX8MM_CLK_NOC>, 5186b392e16SAbel Vesa <&clk IMX8MM_CLK_AUDIO_AHB>, 5196b392e16SAbel Vesa <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>, 5206b392e16SAbel Vesa <&clk IMX8MM_SYS_PLL3>, 521e8b395b2SS.j. Wang <&clk IMX8MM_VIDEO_PLL1>, 522e8b395b2SS.j. Wang <&clk IMX8MM_AUDIO_PLL1>, 523e8b395b2SS.j. Wang <&clk IMX8MM_AUDIO_PLL2>; 5246b392e16SAbel Vesa assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>, 5256b392e16SAbel Vesa <&clk IMX8MM_SYS_PLL1_800M>; 5266b392e16SAbel Vesa assigned-clock-rates = <0>, 5276b392e16SAbel Vesa <400000000>, 5286b392e16SAbel Vesa <400000000>, 5296b392e16SAbel Vesa <750000000>, 530e8b395b2SS.j. Wang <594000000>, 531e8b395b2SS.j. Wang <393216000>, 532e8b395b2SS.j. Wang <361267200>; 533a05ea40eSJacky Bai }; 534a05ea40eSJacky Bai 535a05ea40eSJacky Bai src: reset-controller@30390000 { 53646b29f4bSAnson Huang compatible = "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon"; 537a05ea40eSJacky Bai reg = <0x30390000 0x10000>; 538a05ea40eSJacky Bai interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 539a05ea40eSJacky Bai #reset-cells = <1>; 540a05ea40eSJacky Bai }; 541a05ea40eSJacky Bai }; 542a05ea40eSJacky Bai 543a05ea40eSJacky Bai aips2: bus@30400000 { 544aebf07e6SPeng Fan compatible = "simple-bus"; 545a05ea40eSJacky Bai #address-cells = <1>; 546a05ea40eSJacky Bai #size-cells = <1>; 54710c74207SFabio Estevam ranges = <0x30400000 0x30400000 0x400000>; 548a05ea40eSJacky Bai 549a05ea40eSJacky Bai pwm1: pwm@30660000 { 550a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 551a05ea40eSJacky Bai reg = <0x30660000 0x10000>; 552a05ea40eSJacky Bai interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 553a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM1_ROOT>, 554a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM1_ROOT>; 555a05ea40eSJacky Bai clock-names = "ipg", "per"; 556a05ea40eSJacky Bai #pwm-cells = <2>; 557a05ea40eSJacky Bai status = "disabled"; 558a05ea40eSJacky Bai }; 559a05ea40eSJacky Bai 560a05ea40eSJacky Bai pwm2: pwm@30670000 { 561a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 562a05ea40eSJacky Bai reg = <0x30670000 0x10000>; 563a05ea40eSJacky Bai interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 564a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM2_ROOT>, 565a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM2_ROOT>; 566a05ea40eSJacky Bai clock-names = "ipg", "per"; 567a05ea40eSJacky Bai #pwm-cells = <2>; 568a05ea40eSJacky Bai status = "disabled"; 569a05ea40eSJacky Bai }; 570a05ea40eSJacky Bai 571a05ea40eSJacky Bai pwm3: pwm@30680000 { 572a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 573a05ea40eSJacky Bai reg = <0x30680000 0x10000>; 574a05ea40eSJacky Bai interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 575a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM3_ROOT>, 576a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM3_ROOT>; 577a05ea40eSJacky Bai clock-names = "ipg", "per"; 578a05ea40eSJacky Bai #pwm-cells = <2>; 579a05ea40eSJacky Bai status = "disabled"; 580a05ea40eSJacky Bai }; 581a05ea40eSJacky Bai 582a05ea40eSJacky Bai pwm4: pwm@30690000 { 583a05ea40eSJacky Bai compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; 584a05ea40eSJacky Bai reg = <0x30690000 0x10000>; 585a05ea40eSJacky Bai interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 586a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_PWM4_ROOT>, 587a05ea40eSJacky Bai <&clk IMX8MM_CLK_PWM4_ROOT>; 588a05ea40eSJacky Bai clock-names = "ipg", "per"; 589a05ea40eSJacky Bai #pwm-cells = <2>; 590a05ea40eSJacky Bai status = "disabled"; 591a05ea40eSJacky Bai }; 5925b0221bfSAnson Huang 5935b0221bfSAnson Huang system_counter: timer@306a0000 { 5945b0221bfSAnson Huang compatible = "nxp,sysctr-timer"; 5955b0221bfSAnson Huang reg = <0x306a0000 0x20000>; 5965b0221bfSAnson Huang interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 5975b0221bfSAnson Huang clocks = <&osc_24m>; 5985b0221bfSAnson Huang clock-names = "per"; 5995b0221bfSAnson Huang }; 600a05ea40eSJacky Bai }; 601a05ea40eSJacky Bai 602a05ea40eSJacky Bai aips3: bus@30800000 { 603aebf07e6SPeng Fan compatible = "simple-bus"; 604a05ea40eSJacky Bai #address-cells = <1>; 605a05ea40eSJacky Bai #size-cells = <1>; 606f0692bb8SAdam Ford ranges = <0x30800000 0x30800000 0x400000>, 607f0692bb8SAdam Ford <0x8000000 0x8000000 0x10000000>; 608a05ea40eSJacky Bai 609a05ea40eSJacky Bai ecspi1: spi@30820000 { 610a05ea40eSJacky Bai compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; 611a05ea40eSJacky Bai #address-cells = <1>; 612a05ea40eSJacky Bai #size-cells = <0>; 613a05ea40eSJacky Bai reg = <0x30820000 0x10000>; 614a05ea40eSJacky Bai interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 615a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>, 616a05ea40eSJacky Bai <&clk IMX8MM_CLK_ECSPI1_ROOT>; 617a05ea40eSJacky Bai clock-names = "ipg", "per"; 618a05ea40eSJacky Bai dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; 619a05ea40eSJacky Bai dma-names = "rx", "tx"; 620a05ea40eSJacky Bai status = "disabled"; 621a05ea40eSJacky Bai }; 622a05ea40eSJacky Bai 623a05ea40eSJacky Bai ecspi2: spi@30830000 { 624a05ea40eSJacky Bai compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; 625a05ea40eSJacky Bai #address-cells = <1>; 626a05ea40eSJacky Bai #size-cells = <0>; 627a05ea40eSJacky Bai reg = <0x30830000 0x10000>; 628a05ea40eSJacky Bai interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 629a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>, 630a05ea40eSJacky Bai <&clk IMX8MM_CLK_ECSPI2_ROOT>; 631a05ea40eSJacky Bai clock-names = "ipg", "per"; 632a05ea40eSJacky Bai dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; 633a05ea40eSJacky Bai dma-names = "rx", "tx"; 634a05ea40eSJacky Bai status = "disabled"; 635a05ea40eSJacky Bai }; 636a05ea40eSJacky Bai 637a05ea40eSJacky Bai ecspi3: spi@30840000 { 638a05ea40eSJacky Bai compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; 639a05ea40eSJacky Bai #address-cells = <1>; 640a05ea40eSJacky Bai #size-cells = <0>; 641a05ea40eSJacky Bai reg = <0x30840000 0x10000>; 642a05ea40eSJacky Bai interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 643a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>, 644a05ea40eSJacky Bai <&clk IMX8MM_CLK_ECSPI3_ROOT>; 645a05ea40eSJacky Bai clock-names = "ipg", "per"; 646a05ea40eSJacky Bai dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; 647a05ea40eSJacky Bai dma-names = "rx", "tx"; 648a05ea40eSJacky Bai status = "disabled"; 649a05ea40eSJacky Bai }; 650a05ea40eSJacky Bai 651a05ea40eSJacky Bai uart1: serial@30860000 { 652a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 653a05ea40eSJacky Bai reg = <0x30860000 0x10000>; 654a05ea40eSJacky Bai interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 655a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART1_ROOT>, 656a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART1_ROOT>; 657a05ea40eSJacky Bai clock-names = "ipg", "per"; 658a05ea40eSJacky Bai dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>; 659a05ea40eSJacky Bai dma-names = "rx", "tx"; 660a05ea40eSJacky Bai status = "disabled"; 661a05ea40eSJacky Bai }; 662a05ea40eSJacky Bai 663a05ea40eSJacky Bai uart3: serial@30880000 { 664a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 665a05ea40eSJacky Bai reg = <0x30880000 0x10000>; 666a05ea40eSJacky Bai interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 667a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART3_ROOT>, 668a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART3_ROOT>; 669a05ea40eSJacky Bai clock-names = "ipg", "per"; 670a05ea40eSJacky Bai dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; 671a05ea40eSJacky Bai dma-names = "rx", "tx"; 672a05ea40eSJacky Bai status = "disabled"; 673a05ea40eSJacky Bai }; 674a05ea40eSJacky Bai 675a05ea40eSJacky Bai uart2: serial@30890000 { 676a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 677a05ea40eSJacky Bai reg = <0x30890000 0x10000>; 678a05ea40eSJacky Bai interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 679a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART2_ROOT>, 680a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART2_ROOT>; 681a05ea40eSJacky Bai clock-names = "ipg", "per"; 682a05ea40eSJacky Bai status = "disabled"; 683a05ea40eSJacky Bai }; 684a05ea40eSJacky Bai 685bff5b972SAdam Ford crypto: crypto@30900000 { 686bff5b972SAdam Ford compatible = "fsl,sec-v4.0"; 687bff5b972SAdam Ford #address-cells = <1>; 688bff5b972SAdam Ford #size-cells = <1>; 689bff5b972SAdam Ford reg = <0x30900000 0x40000>; 690bff5b972SAdam Ford ranges = <0 0x30900000 0x40000>; 691bff5b972SAdam Ford interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 692bff5b972SAdam Ford clocks = <&clk IMX8MM_CLK_AHB>, 693bff5b972SAdam Ford <&clk IMX8MM_CLK_IPG_ROOT>; 694bff5b972SAdam Ford clock-names = "aclk", "ipg"; 695bff5b972SAdam Ford 696bff5b972SAdam Ford sec_jr0: jr@1000 { 697bff5b972SAdam Ford compatible = "fsl,sec-v4.0-job-ring"; 698bff5b972SAdam Ford reg = <0x1000 0x1000>; 699bff5b972SAdam Ford interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 700bff5b972SAdam Ford }; 701bff5b972SAdam Ford 702bff5b972SAdam Ford sec_jr1: jr@2000 { 703bff5b972SAdam Ford compatible = "fsl,sec-v4.0-job-ring"; 704bff5b972SAdam Ford reg = <0x2000 0x1000>; 705bff5b972SAdam Ford interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 706bff5b972SAdam Ford }; 707bff5b972SAdam Ford 708bff5b972SAdam Ford sec_jr2: jr@3000 { 709bff5b972SAdam Ford compatible = "fsl,sec-v4.0-job-ring"; 710bff5b972SAdam Ford reg = <0x3000 0x1000>; 711bff5b972SAdam Ford interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 712bff5b972SAdam Ford }; 713bff5b972SAdam Ford }; 714bff5b972SAdam Ford 715a05ea40eSJacky Bai i2c1: i2c@30a20000 { 716a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 717a05ea40eSJacky Bai #address-cells = <1>; 718a05ea40eSJacky Bai #size-cells = <0>; 719a05ea40eSJacky Bai reg = <0x30a20000 0x10000>; 720a05ea40eSJacky Bai interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 721a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C1_ROOT>; 722a05ea40eSJacky Bai status = "disabled"; 723a05ea40eSJacky Bai }; 724a05ea40eSJacky Bai 725a05ea40eSJacky Bai i2c2: i2c@30a30000 { 726a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 727a05ea40eSJacky Bai #address-cells = <1>; 728a05ea40eSJacky Bai #size-cells = <0>; 729a05ea40eSJacky Bai reg = <0x30a30000 0x10000>; 730a05ea40eSJacky Bai interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 731a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C2_ROOT>; 732a05ea40eSJacky Bai status = "disabled"; 733a05ea40eSJacky Bai }; 734a05ea40eSJacky Bai 735a05ea40eSJacky Bai i2c3: i2c@30a40000 { 736a05ea40eSJacky Bai #address-cells = <1>; 737a05ea40eSJacky Bai #size-cells = <0>; 738a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 739a05ea40eSJacky Bai reg = <0x30a40000 0x10000>; 740a05ea40eSJacky Bai interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 741a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C3_ROOT>; 742a05ea40eSJacky Bai status = "disabled"; 743a05ea40eSJacky Bai }; 744a05ea40eSJacky Bai 745a05ea40eSJacky Bai i2c4: i2c@30a50000 { 746a05ea40eSJacky Bai compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; 747a05ea40eSJacky Bai #address-cells = <1>; 748a05ea40eSJacky Bai #size-cells = <0>; 749a05ea40eSJacky Bai reg = <0x30a50000 0x10000>; 750a05ea40eSJacky Bai interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 751a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_I2C4_ROOT>; 752a05ea40eSJacky Bai status = "disabled"; 753a05ea40eSJacky Bai }; 754a05ea40eSJacky Bai 755a05ea40eSJacky Bai uart4: serial@30a60000 { 756a05ea40eSJacky Bai compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; 757a05ea40eSJacky Bai reg = <0x30a60000 0x10000>; 758a05ea40eSJacky Bai interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 759a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_UART4_ROOT>, 760a05ea40eSJacky Bai <&clk IMX8MM_CLK_UART4_ROOT>; 761a05ea40eSJacky Bai clock-names = "ipg", "per"; 762a05ea40eSJacky Bai dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>; 763a05ea40eSJacky Bai dma-names = "rx", "tx"; 764a05ea40eSJacky Bai status = "disabled"; 765a05ea40eSJacky Bai }; 766a05ea40eSJacky Bai 767a05ea40eSJacky Bai usdhc1: mmc@30b40000 { 768a05ea40eSJacky Bai compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; 769a05ea40eSJacky Bai reg = <0x30b40000 0x10000>; 770a05ea40eSJacky Bai interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 771a6a40d56SAnson Huang clocks = <&clk IMX8MM_CLK_IPG_ROOT>, 772a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS>, 773a05ea40eSJacky Bai <&clk IMX8MM_CLK_USDHC1_ROOT>; 774a05ea40eSJacky Bai clock-names = "ipg", "ahb", "per"; 775a05ea40eSJacky Bai fsl,tuning-start-tap = <20>; 776a05ea40eSJacky Bai fsl,tuning-step= <2>; 777a05ea40eSJacky Bai bus-width = <4>; 778a05ea40eSJacky Bai status = "disabled"; 779a05ea40eSJacky Bai }; 780a05ea40eSJacky Bai 781a05ea40eSJacky Bai usdhc2: mmc@30b50000 { 782a05ea40eSJacky Bai compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; 783a05ea40eSJacky Bai reg = <0x30b50000 0x10000>; 784a05ea40eSJacky Bai interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 785a6a40d56SAnson Huang clocks = <&clk IMX8MM_CLK_IPG_ROOT>, 786a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS>, 787a05ea40eSJacky Bai <&clk IMX8MM_CLK_USDHC2_ROOT>; 788a05ea40eSJacky Bai clock-names = "ipg", "ahb", "per"; 789a05ea40eSJacky Bai fsl,tuning-start-tap = <20>; 790a05ea40eSJacky Bai fsl,tuning-step= <2>; 791a05ea40eSJacky Bai bus-width = <4>; 792a05ea40eSJacky Bai status = "disabled"; 793a05ea40eSJacky Bai }; 794a05ea40eSJacky Bai 795a05ea40eSJacky Bai usdhc3: mmc@30b60000 { 796a05ea40eSJacky Bai compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; 797a05ea40eSJacky Bai reg = <0x30b60000 0x10000>; 798a05ea40eSJacky Bai interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 799a6a40d56SAnson Huang clocks = <&clk IMX8MM_CLK_IPG_ROOT>, 800a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS>, 801a05ea40eSJacky Bai <&clk IMX8MM_CLK_USDHC3_ROOT>; 802a05ea40eSJacky Bai clock-names = "ipg", "ahb", "per"; 803a05ea40eSJacky Bai fsl,tuning-start-tap = <20>; 804a05ea40eSJacky Bai fsl,tuning-step= <2>; 805a05ea40eSJacky Bai bus-width = <4>; 806a05ea40eSJacky Bai status = "disabled"; 807a05ea40eSJacky Bai }; 808a05ea40eSJacky Bai 809f0692bb8SAdam Ford flexspi: spi@30bb0000 { 810f0692bb8SAdam Ford #address-cells = <1>; 811f0692bb8SAdam Ford #size-cells = <0>; 812f0692bb8SAdam Ford compatible = "nxp,imx8mm-fspi"; 813f0692bb8SAdam Ford reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>; 814f0692bb8SAdam Ford reg-names = "fspi_base", "fspi_mmap"; 815f0692bb8SAdam Ford interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 816f0692bb8SAdam Ford clocks = <&clk IMX8MM_CLK_QSPI_ROOT>, 817f0692bb8SAdam Ford <&clk IMX8MM_CLK_QSPI_ROOT>; 818f0692bb8SAdam Ford clock-names = "fspi", "fspi_en"; 819f0692bb8SAdam Ford status = "disabled"; 820f0692bb8SAdam Ford }; 821f0692bb8SAdam Ford 822a05ea40eSJacky Bai sdma1: dma-controller@30bd0000 { 823e346ff93SShengjiu Wang compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma"; 824a05ea40eSJacky Bai reg = <0x30bd0000 0x10000>; 825a05ea40eSJacky Bai interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 826a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>, 82724a572bfSAdam Ford <&clk IMX8MM_CLK_AHB>; 828a05ea40eSJacky Bai clock-names = "ipg", "ahb"; 829a05ea40eSJacky Bai #dma-cells = <3>; 830a05ea40eSJacky Bai fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; 831a05ea40eSJacky Bai }; 832a05ea40eSJacky Bai 833a05ea40eSJacky Bai fec1: ethernet@30be0000 { 834a05ea40eSJacky Bai compatible = "fsl,imx8mm-fec", "fsl,imx6sx-fec"; 835a05ea40eSJacky Bai reg = <0x30be0000 0x10000>; 836a05ea40eSJacky Bai interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 837a05ea40eSJacky Bai <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, 838a05ea40eSJacky Bai <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 839a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_ENET1_ROOT>, 840a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET1_ROOT>, 841a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_TIMER>, 842a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_REF>, 843a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_PHY_REF>; 844a05ea40eSJacky Bai clock-names = "ipg", "ahb", "ptp", 845a05ea40eSJacky Bai "enet_clk_ref", "enet_out"; 846a05ea40eSJacky Bai assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>, 847a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_TIMER>, 848a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_REF>, 849a05ea40eSJacky Bai <&clk IMX8MM_CLK_ENET_TIMER>; 850a05ea40eSJacky Bai assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>, 851a05ea40eSJacky Bai <&clk IMX8MM_SYS_PLL2_100M>, 852a05ea40eSJacky Bai <&clk IMX8MM_SYS_PLL2_125M>; 853a05ea40eSJacky Bai assigned-clock-rates = <0>, <0>, <125000000>, <100000000>; 854a05ea40eSJacky Bai fsl,num-tx-queues = <3>; 855a05ea40eSJacky Bai fsl,num-rx-queues = <3>; 856a05ea40eSJacky Bai status = "disabled"; 857a05ea40eSJacky Bai }; 858a05ea40eSJacky Bai 859a05ea40eSJacky Bai }; 860a05ea40eSJacky Bai 861a05ea40eSJacky Bai aips4: bus@32c00000 { 862aebf07e6SPeng Fan compatible = "simple-bus"; 863a05ea40eSJacky Bai #address-cells = <1>; 864a05ea40eSJacky Bai #size-cells = <1>; 86510c74207SFabio Estevam ranges = <0x32c00000 0x32c00000 0x400000>; 866a05ea40eSJacky Bai 867a05ea40eSJacky Bai usbotg1: usb@32e40000 { 868a05ea40eSJacky Bai compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb"; 869a05ea40eSJacky Bai reg = <0x32e40000 0x200>; 870a05ea40eSJacky Bai interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 871a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; 872a05ea40eSJacky Bai clock-names = "usb1_ctrl_root_clk"; 8738b01840eSLi Jun assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; 8748b01840eSLi Jun assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; 875a05ea40eSJacky Bai fsl,usbphy = <&usbphynop1>; 876a05ea40eSJacky Bai fsl,usbmisc = <&usbmisc1 0>; 877a05ea40eSJacky Bai status = "disabled"; 878a05ea40eSJacky Bai }; 879a05ea40eSJacky Bai 880a05ea40eSJacky Bai usbmisc1: usbmisc@32e40200 { 881a05ea40eSJacky Bai compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc"; 882a05ea40eSJacky Bai #index-cells = <1>; 883a05ea40eSJacky Bai reg = <0x32e40200 0x200>; 884a05ea40eSJacky Bai }; 885a05ea40eSJacky Bai 886a05ea40eSJacky Bai usbotg2: usb@32e50000 { 887a05ea40eSJacky Bai compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb"; 888a05ea40eSJacky Bai reg = <0x32e50000 0x200>; 889a05ea40eSJacky Bai interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 890a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; 891a05ea40eSJacky Bai clock-names = "usb1_ctrl_root_clk"; 8928b01840eSLi Jun assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; 8938b01840eSLi Jun assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; 894a05ea40eSJacky Bai fsl,usbphy = <&usbphynop2>; 895a05ea40eSJacky Bai fsl,usbmisc = <&usbmisc2 0>; 896a05ea40eSJacky Bai status = "disabled"; 897a05ea40eSJacky Bai }; 898a05ea40eSJacky Bai 899a05ea40eSJacky Bai usbmisc2: usbmisc@32e50200 { 900a05ea40eSJacky Bai compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc"; 901a05ea40eSJacky Bai #index-cells = <1>; 902a05ea40eSJacky Bai reg = <0x32e50200 0x200>; 903a05ea40eSJacky Bai }; 904a05ea40eSJacky Bai 905a05ea40eSJacky Bai }; 906a05ea40eSJacky Bai 907a05ea40eSJacky Bai dma_apbh: dma-controller@33000000 { 908a05ea40eSJacky Bai compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh"; 909a05ea40eSJacky Bai reg = <0x33000000 0x2000>; 910a05ea40eSJacky Bai interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 911a05ea40eSJacky Bai <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 912a05ea40eSJacky Bai <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 913a05ea40eSJacky Bai <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 914a05ea40eSJacky Bai interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; 915a05ea40eSJacky Bai #dma-cells = <1>; 916a05ea40eSJacky Bai dma-channels = <4>; 917a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>; 918a05ea40eSJacky Bai }; 919a05ea40eSJacky Bai 920a05ea40eSJacky Bai gpmi: nand-controller@33002000{ 921a05ea40eSJacky Bai compatible = "fsl,imx8mm-gpmi-nand", "fsl,imx7d-gpmi-nand"; 922a05ea40eSJacky Bai #address-cells = <1>; 923a05ea40eSJacky Bai #size-cells = <1>; 924a05ea40eSJacky Bai reg = <0x33002000 0x2000>, <0x33004000 0x4000>; 925a05ea40eSJacky Bai reg-names = "gpmi-nand", "bch"; 926a05ea40eSJacky Bai interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 927a05ea40eSJacky Bai interrupt-names = "bch"; 928a05ea40eSJacky Bai clocks = <&clk IMX8MM_CLK_NAND_ROOT>, 929a05ea40eSJacky Bai <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>; 930a05ea40eSJacky Bai clock-names = "gpmi_io", "gpmi_bch_apb"; 931a05ea40eSJacky Bai dmas = <&dma_apbh 0>; 932a05ea40eSJacky Bai dma-names = "rx-tx"; 933a05ea40eSJacky Bai status = "disabled"; 934a05ea40eSJacky Bai }; 935b4e3e54aSAnson Huang 936b4e3e54aSAnson Huang gic: interrupt-controller@38800000 { 937b4e3e54aSAnson Huang compatible = "arm,gic-v3"; 938b4e3e54aSAnson Huang reg = <0x38800000 0x10000>, /* GIC Dist */ 939b4e3e54aSAnson Huang <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */ 940b4e3e54aSAnson Huang #interrupt-cells = <3>; 941b4e3e54aSAnson Huang interrupt-controller; 942b4e3e54aSAnson Huang interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 943b4e3e54aSAnson Huang }; 9441efe85c9SLeonard Crestez 9450376f6ecSLeonard Crestez ddrc: memory-controller@3d400000 { 9460376f6ecSLeonard Crestez compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc"; 9470376f6ecSLeonard Crestez reg = <0x3d400000 0x400000>; 9480376f6ecSLeonard Crestez clock-names = "core", "pll", "alt", "apb"; 9490376f6ecSLeonard Crestez clocks = <&clk IMX8MM_CLK_DRAM_CORE>, 9500376f6ecSLeonard Crestez <&clk IMX8MM_DRAM_PLL>, 9510376f6ecSLeonard Crestez <&clk IMX8MM_CLK_DRAM_ALT>, 9520376f6ecSLeonard Crestez <&clk IMX8MM_CLK_DRAM_APB>; 9530376f6ecSLeonard Crestez }; 9540376f6ecSLeonard Crestez 9551efe85c9SLeonard Crestez ddr-pmu@3d800000 { 9561efe85c9SLeonard Crestez compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu"; 9571efe85c9SLeonard Crestez reg = <0x3d800000 0x400000>; 9581efe85c9SLeonard Crestez interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 9591efe85c9SLeonard Crestez }; 960a05ea40eSJacky Bai }; 961a05ea40eSJacky Bai}; 962