1*7e1894ebSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*7e1894ebSTim Harvey/* 3*7e1894ebSTim Harvey * Copyright 2023 Gateworks Corporation 4*7e1894ebSTim Harvey */ 5*7e1894ebSTim Harvey 6*7e1894ebSTim Harvey#include <dt-bindings/gpio/gpio.h> 7*7e1894ebSTim Harvey#include <dt-bindings/leds/common.h> 8*7e1894ebSTim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h> 9*7e1894ebSTim Harvey 10*7e1894ebSTim Harvey/ { 11*7e1894ebSTim Harvey led-controller { 12*7e1894ebSTim Harvey compatible = "gpio-leds"; 13*7e1894ebSTim Harvey pinctrl-names = "default"; 14*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 15*7e1894ebSTim Harvey 16*7e1894ebSTim Harvey led-0 { 17*7e1894ebSTim Harvey function = LED_FUNCTION_STATUS; 18*7e1894ebSTim Harvey color = <LED_COLOR_ID_GREEN>; 19*7e1894ebSTim Harvey gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>; 20*7e1894ebSTim Harvey default-state = "on"; 21*7e1894ebSTim Harvey linux,default-trigger = "heartbeat"; 22*7e1894ebSTim Harvey }; 23*7e1894ebSTim Harvey 24*7e1894ebSTim Harvey led-1 { 25*7e1894ebSTim Harvey function = LED_FUNCTION_STATUS; 26*7e1894ebSTim Harvey color = <LED_COLOR_ID_RED>; 27*7e1894ebSTim Harvey gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>; 28*7e1894ebSTim Harvey default-state = "off"; 29*7e1894ebSTim Harvey }; 30*7e1894ebSTim Harvey }; 31*7e1894ebSTim Harvey 32*7e1894ebSTim Harvey pcie0_refclk: clock-pcie0 { 33*7e1894ebSTim Harvey compatible = "fixed-clock"; 34*7e1894ebSTim Harvey #clock-cells = <0>; 35*7e1894ebSTim Harvey clock-frequency = <100000000>; 36*7e1894ebSTim Harvey }; 37*7e1894ebSTim Harvey 38*7e1894ebSTim Harvey pps { 39*7e1894ebSTim Harvey compatible = "pps-gpio"; 40*7e1894ebSTim Harvey pinctrl-names = "default"; 41*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_pps>; 42*7e1894ebSTim Harvey gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; 43*7e1894ebSTim Harvey status = "okay"; 44*7e1894ebSTim Harvey }; 45*7e1894ebSTim Harvey 46*7e1894ebSTim Harvey reg_usb2_vbus: regulator-usb2-vbus { 47*7e1894ebSTim Harvey compatible = "regulator-fixed"; 48*7e1894ebSTim Harvey pinctrl-names = "default"; 49*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_reg_usb2_en>; 50*7e1894ebSTim Harvey regulator-name = "usb2_vbus"; 51*7e1894ebSTim Harvey gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; 52*7e1894ebSTim Harvey enable-active-high; 53*7e1894ebSTim Harvey regulator-min-microvolt = <5000000>; 54*7e1894ebSTim Harvey regulator-max-microvolt = <5000000>; 55*7e1894ebSTim Harvey }; 56*7e1894ebSTim Harvey 57*7e1894ebSTim Harvey reg_usdhc2_vmmc: regulator-usdhc2 { 58*7e1894ebSTim Harvey compatible = "regulator-fixed"; 59*7e1894ebSTim Harvey pinctrl-names = "default"; 60*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 61*7e1894ebSTim Harvey regulator-name = "SD2_3P3V"; 62*7e1894ebSTim Harvey regulator-min-microvolt = <3300000>; 63*7e1894ebSTim Harvey regulator-max-microvolt = <3300000>; 64*7e1894ebSTim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 65*7e1894ebSTim Harvey enable-active-high; 66*7e1894ebSTim Harvey }; 67*7e1894ebSTim Harvey}; 68*7e1894ebSTim Harvey 69*7e1894ebSTim Harvey/* off-board header */ 70*7e1894ebSTim Harvey&ecspi2 { 71*7e1894ebSTim Harvey pinctrl-names = "default"; 72*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_spi2>; 73*7e1894ebSTim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 74*7e1894ebSTim Harvey status = "okay"; 75*7e1894ebSTim Harvey}; 76*7e1894ebSTim Harvey 77*7e1894ebSTim Harvey&gpio1 { 78*7e1894ebSTim Harvey gpio-line-names = 79*7e1894ebSTim Harvey "", "", "", "", 80*7e1894ebSTim Harvey "", "", "", "", 81*7e1894ebSTim Harvey "", "", "", "", 82*7e1894ebSTim Harvey "", "gpioa", "gpiob", "", 83*7e1894ebSTim Harvey "", "", "", "", 84*7e1894ebSTim Harvey "", "", "", "", 85*7e1894ebSTim Harvey "", "", "", "", 86*7e1894ebSTim Harvey "", "", "", ""; 87*7e1894ebSTim Harvey}; 88*7e1894ebSTim Harvey 89*7e1894ebSTim Harvey&gpio4 { 90*7e1894ebSTim Harvey gpio-line-names = 91*7e1894ebSTim Harvey "", "", "", "pci_usb_sel", 92*7e1894ebSTim Harvey "", "", "", "pci_wdis#", 93*7e1894ebSTim Harvey "", "", "", "", 94*7e1894ebSTim Harvey "", "", "", "", 95*7e1894ebSTim Harvey "", "", "", "", 96*7e1894ebSTim Harvey "", "", "", "", 97*7e1894ebSTim Harvey "", "", "", "", 98*7e1894ebSTim Harvey "", "", "", ""; 99*7e1894ebSTim Harvey}; 100*7e1894ebSTim Harvey 101*7e1894ebSTim Harvey&gpio5 { 102*7e1894ebSTim Harvey gpio-line-names = 103*7e1894ebSTim Harvey "", "", "", "", 104*7e1894ebSTim Harvey "gpioc", "gpiod", "", "", 105*7e1894ebSTim Harvey "", "", "", "", 106*7e1894ebSTim Harvey "", "", "", "", 107*7e1894ebSTim Harvey "", "", "", "", 108*7e1894ebSTim Harvey "", "", "", "", 109*7e1894ebSTim Harvey "", "", "", "", 110*7e1894ebSTim Harvey "", "", "", ""; 111*7e1894ebSTim Harvey}; 112*7e1894ebSTim Harvey 113*7e1894ebSTim Harvey&i2c2 { 114*7e1894ebSTim Harvey clock-frequency = <400000>; 115*7e1894ebSTim Harvey pinctrl-names = "default"; 116*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_i2c2>; 117*7e1894ebSTim Harvey status = "okay"; 118*7e1894ebSTim Harvey 119*7e1894ebSTim Harvey eeprom@52 { 120*7e1894ebSTim Harvey compatible = "atmel,24c32"; 121*7e1894ebSTim Harvey reg = <0x52>; 122*7e1894ebSTim Harvey pagesize = <32>; 123*7e1894ebSTim Harvey }; 124*7e1894ebSTim Harvey}; 125*7e1894ebSTim Harvey 126*7e1894ebSTim Harvey/* off-board header */ 127*7e1894ebSTim Harvey&i2c3 { 128*7e1894ebSTim Harvey clock-frequency = <400000>; 129*7e1894ebSTim Harvey pinctrl-names = "default"; 130*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_i2c3>; 131*7e1894ebSTim Harvey status = "okay"; 132*7e1894ebSTim Harvey}; 133*7e1894ebSTim Harvey 134*7e1894ebSTim Harvey&pcie_phy { 135*7e1894ebSTim Harvey fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 136*7e1894ebSTim Harvey fsl,clkreq-unsupported; 137*7e1894ebSTim Harvey clocks = <&pcie0_refclk>; 138*7e1894ebSTim Harvey clock-names = "ref"; 139*7e1894ebSTim Harvey status = "okay"; 140*7e1894ebSTim Harvey}; 141*7e1894ebSTim Harvey 142*7e1894ebSTim Harvey&pcie0 { 143*7e1894ebSTim Harvey pinctrl-names = "default"; 144*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_pcie0>; 145*7e1894ebSTim Harvey reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>; 146*7e1894ebSTim Harvey status = "okay"; 147*7e1894ebSTim Harvey}; 148*7e1894ebSTim Harvey 149*7e1894ebSTim Harvey/* GPS */ 150*7e1894ebSTim Harvey&uart1 { 151*7e1894ebSTim Harvey pinctrl-names = "default"; 152*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_uart1>; 153*7e1894ebSTim Harvey status = "okay"; 154*7e1894ebSTim Harvey}; 155*7e1894ebSTim Harvey 156*7e1894ebSTim Harvey/* USB1 - Type C front panel SINK port J14 */ 157*7e1894ebSTim Harvey&usbotg1 { 158*7e1894ebSTim Harvey dr_mode = "peripheral"; 159*7e1894ebSTim Harvey status = "okay"; 160*7e1894ebSTim Harvey}; 161*7e1894ebSTim Harvey 162*7e1894ebSTim Harvey/* USB2 4-port USB3.0 HUB: 163*7e1894ebSTim Harvey * P1 - USBC connector (host only) 164*7e1894ebSTim Harvey * P2 - USB2 test connector 165*7e1894ebSTim Harvey * P3 - miniPCIe full card 166*7e1894ebSTim Harvey * P4 - miniPCIe half card 167*7e1894ebSTim Harvey */ 168*7e1894ebSTim Harvey&usbotg2 { 169*7e1894ebSTim Harvey dr_mode = "host"; 170*7e1894ebSTim Harvey vbus-supply = <®_usb2_vbus>; 171*7e1894ebSTim Harvey status = "okay"; 172*7e1894ebSTim Harvey}; 173*7e1894ebSTim Harvey 174*7e1894ebSTim Harvey/* microSD */ 175*7e1894ebSTim Harvey&usdhc2 { 176*7e1894ebSTim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 177*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 178*7e1894ebSTim Harvey pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 179*7e1894ebSTim Harvey pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 180*7e1894ebSTim Harvey cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 181*7e1894ebSTim Harvey vmmc-supply = <®_usdhc2_vmmc>; 182*7e1894ebSTim Harvey bus-width = <4>; 183*7e1894ebSTim Harvey status = "okay"; 184*7e1894ebSTim Harvey}; 185*7e1894ebSTim Harvey 186*7e1894ebSTim Harvey&iomuxc { 187*7e1894ebSTim Harvey pinctrl-names = "default"; 188*7e1894ebSTim Harvey pinctrl-0 = <&pinctrl_hog>; 189*7e1894ebSTim Harvey 190*7e1894ebSTim Harvey pinctrl_hog: hoggrp { 191*7e1894ebSTim Harvey fsl,pins = < 192*7e1894ebSTim Harvey MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000040 /* GPIOA */ 193*7e1894ebSTim Harvey MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x40000040 /* GPIOB */ 194*7e1894ebSTim Harvey MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000106 /* PCI_USBSEL */ 195*7e1894ebSTim Harvey MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000106 /* PCIE_WDIS# */ 196*7e1894ebSTim Harvey MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000040 /* GPIOD */ 197*7e1894ebSTim Harvey MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */ 198*7e1894ebSTim Harvey >; 199*7e1894ebSTim Harvey }; 200*7e1894ebSTim Harvey 201*7e1894ebSTim Harvey pinctrl_gpio_leds: gpioledgrp { 202*7e1894ebSTim Harvey fsl,pins = < 203*7e1894ebSTim Harvey MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */ 204*7e1894ebSTim Harvey MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x6 /* LEDR */ 205*7e1894ebSTim Harvey >; 206*7e1894ebSTim Harvey }; 207*7e1894ebSTim Harvey 208*7e1894ebSTim Harvey pinctrl_i2c2: i2c2grp { 209*7e1894ebSTim Harvey fsl,pins = < 210*7e1894ebSTim Harvey MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2 211*7e1894ebSTim Harvey MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2 212*7e1894ebSTim Harvey >; 213*7e1894ebSTim Harvey }; 214*7e1894ebSTim Harvey 215*7e1894ebSTim Harvey pinctrl_i2c3: i2c3grp { 216*7e1894ebSTim Harvey fsl,pins = < 217*7e1894ebSTim Harvey MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2 218*7e1894ebSTim Harvey MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2 219*7e1894ebSTim Harvey >; 220*7e1894ebSTim Harvey }; 221*7e1894ebSTim Harvey 222*7e1894ebSTim Harvey pinctrl_pcie0: pciegrp { 223*7e1894ebSTim Harvey fsl,pins = < 224*7e1894ebSTim Harvey MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x106 225*7e1894ebSTim Harvey >; 226*7e1894ebSTim Harvey }; 227*7e1894ebSTim Harvey 228*7e1894ebSTim Harvey pinctrl_pps: ppsgrp { 229*7e1894ebSTim Harvey fsl,pins = < 230*7e1894ebSTim Harvey MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x106 231*7e1894ebSTim Harvey >; 232*7e1894ebSTim Harvey }; 233*7e1894ebSTim Harvey 234*7e1894ebSTim Harvey pinctrl_reg_usb2_en: regusb2grp { 235*7e1894ebSTim Harvey fsl,pins = < 236*7e1894ebSTim Harvey MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x6 /* USBHUB_RST# (ext p/u) */ 237*7e1894ebSTim Harvey >; 238*7e1894ebSTim Harvey }; 239*7e1894ebSTim Harvey 240*7e1894ebSTim Harvey pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { 241*7e1894ebSTim Harvey fsl,pins = < 242*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40 243*7e1894ebSTim Harvey >; 244*7e1894ebSTim Harvey }; 245*7e1894ebSTim Harvey 246*7e1894ebSTim Harvey pinctrl_spi2: spi2grp { 247*7e1894ebSTim Harvey fsl,pins = < 248*7e1894ebSTim Harvey MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x140 249*7e1894ebSTim Harvey MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x140 250*7e1894ebSTim Harvey MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x140 251*7e1894ebSTim Harvey MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140 252*7e1894ebSTim Harvey >; 253*7e1894ebSTim Harvey }; 254*7e1894ebSTim Harvey 255*7e1894ebSTim Harvey pinctrl_uart1: uart1grp { 256*7e1894ebSTim Harvey fsl,pins = < 257*7e1894ebSTim Harvey MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 258*7e1894ebSTim Harvey MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 259*7e1894ebSTim Harvey >; 260*7e1894ebSTim Harvey }; 261*7e1894ebSTim Harvey 262*7e1894ebSTim Harvey pinctrl_usdhc2: usdhc2grp { 263*7e1894ebSTim Harvey fsl,pins = < 264*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 265*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 266*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 267*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 268*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 269*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 270*7e1894ebSTim Harvey MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0 271*7e1894ebSTim Harvey >; 272*7e1894ebSTim Harvey }; 273*7e1894ebSTim Harvey 274*7e1894ebSTim Harvey pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 275*7e1894ebSTim Harvey fsl,pins = < 276*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 277*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 278*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 279*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 280*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 281*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 282*7e1894ebSTim Harvey MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0 283*7e1894ebSTim Harvey >; 284*7e1894ebSTim Harvey }; 285*7e1894ebSTim Harvey 286*7e1894ebSTim Harvey pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 287*7e1894ebSTim Harvey fsl,pins = < 288*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 289*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 290*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 291*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 292*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 293*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 294*7e1894ebSTim Harvey MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0 295*7e1894ebSTim Harvey >; 296*7e1894ebSTim Harvey }; 297*7e1894ebSTim Harvey 298*7e1894ebSTim Harvey pinctrl_usdhc2_gpio: usdhc2gpiogrp { 299*7e1894ebSTim Harvey fsl,pins = < 300*7e1894ebSTim Harvey MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 301*7e1894ebSTim Harvey >; 302*7e1894ebSTim Harvey }; 303*7e1894ebSTim Harvey}; 304