1*ef484dfcSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*ef484dfcSTim Harvey/* 3*ef484dfcSTim Harvey * Copyright 2021 Gateworks Corporation 4*ef484dfcSTim Harvey */ 5*ef484dfcSTim Harvey 6*ef484dfcSTim Harvey/dts-v1/; 7*ef484dfcSTim Harvey 8*ef484dfcSTim Harvey#include <dt-bindings/gpio/gpio.h> 9*ef484dfcSTim Harvey#include <dt-bindings/input/linux-event-codes.h> 10*ef484dfcSTim Harvey#include <dt-bindings/leds/common.h> 11*ef484dfcSTim Harvey#include <dt-bindings/net/ti-dp83867.h> 12*ef484dfcSTim Harvey 13*ef484dfcSTim Harvey#include "imx8mm.dtsi" 14*ef484dfcSTim Harvey 15*ef484dfcSTim Harvey/ { 16*ef484dfcSTim Harvey model = "Gateworks Venice GW7902 i.MX8MM board"; 17*ef484dfcSTim Harvey compatible = "gw,imx8mm-gw7902", "fsl,imx8mm"; 18*ef484dfcSTim Harvey 19*ef484dfcSTim Harvey aliases { 20*ef484dfcSTim Harvey usb0 = &usbotg1; 21*ef484dfcSTim Harvey usb1 = &usbotg2; 22*ef484dfcSTim Harvey }; 23*ef484dfcSTim Harvey 24*ef484dfcSTim Harvey chosen { 25*ef484dfcSTim Harvey stdout-path = &uart2; 26*ef484dfcSTim Harvey }; 27*ef484dfcSTim Harvey 28*ef484dfcSTim Harvey memory@40000000 { 29*ef484dfcSTim Harvey device_type = "memory"; 30*ef484dfcSTim Harvey reg = <0x0 0x40000000 0 0x80000000>; 31*ef484dfcSTim Harvey }; 32*ef484dfcSTim Harvey 33*ef484dfcSTim Harvey can20m: can20m { 34*ef484dfcSTim Harvey compatible = "fixed-clock"; 35*ef484dfcSTim Harvey #clock-cells = <0>; 36*ef484dfcSTim Harvey clock-frequency = <20000000>; 37*ef484dfcSTim Harvey clock-output-names = "can20m"; 38*ef484dfcSTim Harvey }; 39*ef484dfcSTim Harvey 40*ef484dfcSTim Harvey gpio-keys { 41*ef484dfcSTim Harvey compatible = "gpio-keys"; 42*ef484dfcSTim Harvey 43*ef484dfcSTim Harvey user-pb { 44*ef484dfcSTim Harvey label = "user_pb"; 45*ef484dfcSTim Harvey gpios = <&gpio 2 GPIO_ACTIVE_LOW>; 46*ef484dfcSTim Harvey linux,code = <BTN_0>; 47*ef484dfcSTim Harvey }; 48*ef484dfcSTim Harvey 49*ef484dfcSTim Harvey user-pb1x { 50*ef484dfcSTim Harvey label = "user_pb1x"; 51*ef484dfcSTim Harvey linux,code = <BTN_1>; 52*ef484dfcSTim Harvey interrupt-parent = <&gsc>; 53*ef484dfcSTim Harvey interrupts = <0>; 54*ef484dfcSTim Harvey }; 55*ef484dfcSTim Harvey 56*ef484dfcSTim Harvey key-erased { 57*ef484dfcSTim Harvey label = "key_erased"; 58*ef484dfcSTim Harvey linux,code = <BTN_2>; 59*ef484dfcSTim Harvey interrupt-parent = <&gsc>; 60*ef484dfcSTim Harvey interrupts = <1>; 61*ef484dfcSTim Harvey }; 62*ef484dfcSTim Harvey 63*ef484dfcSTim Harvey eeprom-wp { 64*ef484dfcSTim Harvey label = "eeprom_wp"; 65*ef484dfcSTim Harvey linux,code = <BTN_3>; 66*ef484dfcSTim Harvey interrupt-parent = <&gsc>; 67*ef484dfcSTim Harvey interrupts = <2>; 68*ef484dfcSTim Harvey }; 69*ef484dfcSTim Harvey 70*ef484dfcSTim Harvey tamper { 71*ef484dfcSTim Harvey label = "tamper"; 72*ef484dfcSTim Harvey linux,code = <BTN_4>; 73*ef484dfcSTim Harvey interrupt-parent = <&gsc>; 74*ef484dfcSTim Harvey interrupts = <5>; 75*ef484dfcSTim Harvey }; 76*ef484dfcSTim Harvey 77*ef484dfcSTim Harvey switch-hold { 78*ef484dfcSTim Harvey label = "switch_hold"; 79*ef484dfcSTim Harvey linux,code = <BTN_5>; 80*ef484dfcSTim Harvey interrupt-parent = <&gsc>; 81*ef484dfcSTim Harvey interrupts = <7>; 82*ef484dfcSTim Harvey }; 83*ef484dfcSTim Harvey }; 84*ef484dfcSTim Harvey 85*ef484dfcSTim Harvey led-controller { 86*ef484dfcSTim Harvey compatible = "gpio-leds"; 87*ef484dfcSTim Harvey pinctrl-names = "default"; 88*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 89*ef484dfcSTim Harvey 90*ef484dfcSTim Harvey led-0 { 91*ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 92*ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 93*ef484dfcSTim Harvey label = "panel1"; 94*ef484dfcSTim Harvey gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 95*ef484dfcSTim Harvey default-state = "off"; 96*ef484dfcSTim Harvey }; 97*ef484dfcSTim Harvey 98*ef484dfcSTim Harvey led-1 { 99*ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 100*ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 101*ef484dfcSTim Harvey label = "panel2"; 102*ef484dfcSTim Harvey gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 103*ef484dfcSTim Harvey default-state = "off"; 104*ef484dfcSTim Harvey }; 105*ef484dfcSTim Harvey 106*ef484dfcSTim Harvey led-2 { 107*ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 108*ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 109*ef484dfcSTim Harvey label = "panel3"; 110*ef484dfcSTim Harvey gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 111*ef484dfcSTim Harvey default-state = "off"; 112*ef484dfcSTim Harvey }; 113*ef484dfcSTim Harvey 114*ef484dfcSTim Harvey led-3 { 115*ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 116*ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 117*ef484dfcSTim Harvey label = "panel4"; 118*ef484dfcSTim Harvey gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 119*ef484dfcSTim Harvey default-state = "off"; 120*ef484dfcSTim Harvey }; 121*ef484dfcSTim Harvey 122*ef484dfcSTim Harvey led-4 { 123*ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 124*ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 125*ef484dfcSTim Harvey label = "panel5"; 126*ef484dfcSTim Harvey gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 127*ef484dfcSTim Harvey default-state = "off"; 128*ef484dfcSTim Harvey }; 129*ef484dfcSTim Harvey }; 130*ef484dfcSTim Harvey 131*ef484dfcSTim Harvey pps { 132*ef484dfcSTim Harvey compatible = "pps-gpio"; 133*ef484dfcSTim Harvey pinctrl-names = "default"; 134*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pps>; 135*ef484dfcSTim Harvey gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 136*ef484dfcSTim Harvey status = "okay"; 137*ef484dfcSTim Harvey }; 138*ef484dfcSTim Harvey 139*ef484dfcSTim Harvey reg_3p3v: regulator-3p3v { 140*ef484dfcSTim Harvey compatible = "regulator-fixed"; 141*ef484dfcSTim Harvey regulator-name = "3P3V"; 142*ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 143*ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 144*ef484dfcSTim Harvey regulator-always-on; 145*ef484dfcSTim Harvey }; 146*ef484dfcSTim Harvey 147*ef484dfcSTim Harvey reg_usb1_vbus: regulator-usb1 { 148*ef484dfcSTim Harvey compatible = "regulator-fixed"; 149*ef484dfcSTim Harvey pinctrl-names = "default"; 150*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_usb1>; 151*ef484dfcSTim Harvey regulator-name = "usb_usb1_vbus"; 152*ef484dfcSTim Harvey gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; 153*ef484dfcSTim Harvey enable-active-high; 154*ef484dfcSTim Harvey regulator-min-microvolt = <5000000>; 155*ef484dfcSTim Harvey regulator-max-microvolt = <5000000>; 156*ef484dfcSTim Harvey }; 157*ef484dfcSTim Harvey 158*ef484dfcSTim Harvey reg_wifi: regulator-wifi { 159*ef484dfcSTim Harvey compatible = "regulator-fixed"; 160*ef484dfcSTim Harvey pinctrl-names = "default"; 161*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_wl>; 162*ef484dfcSTim Harvey regulator-name = "wifi"; 163*ef484dfcSTim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 164*ef484dfcSTim Harvey enable-active-high; 165*ef484dfcSTim Harvey startup-delay-us = <100>; 166*ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 167*ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 168*ef484dfcSTim Harvey }; 169*ef484dfcSTim Harvey}; 170*ef484dfcSTim Harvey 171*ef484dfcSTim Harvey&A53_0 { 172*ef484dfcSTim Harvey cpu-supply = <&buck2>; 173*ef484dfcSTim Harvey}; 174*ef484dfcSTim Harvey 175*ef484dfcSTim Harvey&A53_1 { 176*ef484dfcSTim Harvey cpu-supply = <&buck2>; 177*ef484dfcSTim Harvey}; 178*ef484dfcSTim Harvey 179*ef484dfcSTim Harvey&A53_2 { 180*ef484dfcSTim Harvey cpu-supply = <&buck2>; 181*ef484dfcSTim Harvey}; 182*ef484dfcSTim Harvey 183*ef484dfcSTim Harvey&A53_3 { 184*ef484dfcSTim Harvey cpu-supply = <&buck2>; 185*ef484dfcSTim Harvey}; 186*ef484dfcSTim Harvey 187*ef484dfcSTim Harvey&ddrc { 188*ef484dfcSTim Harvey operating-points-v2 = <&ddrc_opp_table>; 189*ef484dfcSTim Harvey 190*ef484dfcSTim Harvey ddrc_opp_table: opp-table { 191*ef484dfcSTim Harvey compatible = "operating-points-v2"; 192*ef484dfcSTim Harvey 193*ef484dfcSTim Harvey opp-25M { 194*ef484dfcSTim Harvey opp-hz = /bits/ 64 <25000000>; 195*ef484dfcSTim Harvey }; 196*ef484dfcSTim Harvey 197*ef484dfcSTim Harvey opp-100M { 198*ef484dfcSTim Harvey opp-hz = /bits/ 64 <100000000>; 199*ef484dfcSTim Harvey }; 200*ef484dfcSTim Harvey 201*ef484dfcSTim Harvey opp-750M { 202*ef484dfcSTim Harvey opp-hz = /bits/ 64 <750000000>; 203*ef484dfcSTim Harvey }; 204*ef484dfcSTim Harvey }; 205*ef484dfcSTim Harvey}; 206*ef484dfcSTim Harvey 207*ef484dfcSTim Harvey&ecspi1 { 208*ef484dfcSTim Harvey pinctrl-names = "default"; 209*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi1>; 210*ef484dfcSTim Harvey cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 211*ef484dfcSTim Harvey status = "okay"; 212*ef484dfcSTim Harvey 213*ef484dfcSTim Harvey can@0 { 214*ef484dfcSTim Harvey compatible = "microchip,mcp2515"; 215*ef484dfcSTim Harvey reg = <0>; 216*ef484dfcSTim Harvey clocks = <&can20m>; 217*ef484dfcSTim Harvey oscillator-frequency = <20000000>; 218*ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 219*ef484dfcSTim Harvey interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 220*ef484dfcSTim Harvey spi-max-frequency = <10000000>; 221*ef484dfcSTim Harvey }; 222*ef484dfcSTim Harvey}; 223*ef484dfcSTim Harvey 224*ef484dfcSTim Harvey/* off-board header */ 225*ef484dfcSTim Harvey&ecspi2 { 226*ef484dfcSTim Harvey pinctrl-names = "default"; 227*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi2>; 228*ef484dfcSTim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 229*ef484dfcSTim Harvey status = "okay"; 230*ef484dfcSTim Harvey}; 231*ef484dfcSTim Harvey 232*ef484dfcSTim Harvey&fec1 { 233*ef484dfcSTim Harvey pinctrl-names = "default"; 234*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_fec1>; 235*ef484dfcSTim Harvey phy-mode = "rgmii-id"; 236*ef484dfcSTim Harvey phy-handle = <ðphy0>; 237*ef484dfcSTim Harvey local-mac-address = [00 00 00 00 00 00]; 238*ef484dfcSTim Harvey status = "okay"; 239*ef484dfcSTim Harvey 240*ef484dfcSTim Harvey mdio { 241*ef484dfcSTim Harvey #address-cells = <1>; 242*ef484dfcSTim Harvey #size-cells = <0>; 243*ef484dfcSTim Harvey 244*ef484dfcSTim Harvey ethphy0: ethernet-phy@0 { 245*ef484dfcSTim Harvey compatible = "ethernet-phy-ieee802.3-c22"; 246*ef484dfcSTim Harvey reg = <0>; 247*ef484dfcSTim Harvey ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 248*ef484dfcSTim Harvey ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 249*ef484dfcSTim Harvey tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 250*ef484dfcSTim Harvey rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 251*ef484dfcSTim Harvey }; 252*ef484dfcSTim Harvey }; 253*ef484dfcSTim Harvey}; 254*ef484dfcSTim Harvey 255*ef484dfcSTim Harvey&i2c1 { 256*ef484dfcSTim Harvey clock-frequency = <100000>; 257*ef484dfcSTim Harvey pinctrl-names = "default"; 258*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c1>; 259*ef484dfcSTim Harvey status = "okay"; 260*ef484dfcSTim Harvey 261*ef484dfcSTim Harvey gsc: gsc@20 { 262*ef484dfcSTim Harvey compatible = "gw,gsc"; 263*ef484dfcSTim Harvey reg = <0x20>; 264*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gsc>; 265*ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 266*ef484dfcSTim Harvey interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 267*ef484dfcSTim Harvey interrupt-controller; 268*ef484dfcSTim Harvey #interrupt-cells = <1>; 269*ef484dfcSTim Harvey 270*ef484dfcSTim Harvey adc { 271*ef484dfcSTim Harvey compatible = "gw,gsc-adc"; 272*ef484dfcSTim Harvey #address-cells = <1>; 273*ef484dfcSTim Harvey #size-cells = <0>; 274*ef484dfcSTim Harvey 275*ef484dfcSTim Harvey channel@6 { 276*ef484dfcSTim Harvey gw,mode = <0>; 277*ef484dfcSTim Harvey reg = <0x06>; 278*ef484dfcSTim Harvey label = "temp"; 279*ef484dfcSTim Harvey }; 280*ef484dfcSTim Harvey 281*ef484dfcSTim Harvey channel@8 { 282*ef484dfcSTim Harvey gw,mode = <1>; 283*ef484dfcSTim Harvey reg = <0x08>; 284*ef484dfcSTim Harvey label = "vdd_bat"; 285*ef484dfcSTim Harvey }; 286*ef484dfcSTim Harvey 287*ef484dfcSTim Harvey channel@82 { 288*ef484dfcSTim Harvey gw,mode = <2>; 289*ef484dfcSTim Harvey reg = <0x82>; 290*ef484dfcSTim Harvey label = "vin"; 291*ef484dfcSTim Harvey gw,voltage-divider-ohms = <22100 1000>; 292*ef484dfcSTim Harvey gw,voltage-offset-microvolt = <700000>; 293*ef484dfcSTim Harvey }; 294*ef484dfcSTim Harvey 295*ef484dfcSTim Harvey channel@84 { 296*ef484dfcSTim Harvey gw,mode = <2>; 297*ef484dfcSTim Harvey reg = <0x84>; 298*ef484dfcSTim Harvey label = "vin_4p0"; 299*ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 300*ef484dfcSTim Harvey }; 301*ef484dfcSTim Harvey 302*ef484dfcSTim Harvey channel@86 { 303*ef484dfcSTim Harvey gw,mode = <2>; 304*ef484dfcSTim Harvey reg = <0x86>; 305*ef484dfcSTim Harvey label = "vdd_3p3"; 306*ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 307*ef484dfcSTim Harvey }; 308*ef484dfcSTim Harvey 309*ef484dfcSTim Harvey channel@88 { 310*ef484dfcSTim Harvey gw,mode = <2>; 311*ef484dfcSTim Harvey reg = <0x88>; 312*ef484dfcSTim Harvey label = "vdd_0p9"; 313*ef484dfcSTim Harvey }; 314*ef484dfcSTim Harvey 315*ef484dfcSTim Harvey channel@8c { 316*ef484dfcSTim Harvey gw,mode = <2>; 317*ef484dfcSTim Harvey reg = <0x8c>; 318*ef484dfcSTim Harvey label = "vdd_soc"; 319*ef484dfcSTim Harvey }; 320*ef484dfcSTim Harvey 321*ef484dfcSTim Harvey channel@8e { 322*ef484dfcSTim Harvey gw,mode = <2>; 323*ef484dfcSTim Harvey reg = <0x8e>; 324*ef484dfcSTim Harvey label = "vdd_arm"; 325*ef484dfcSTim Harvey }; 326*ef484dfcSTim Harvey 327*ef484dfcSTim Harvey channel@90 { 328*ef484dfcSTim Harvey gw,mode = <2>; 329*ef484dfcSTim Harvey reg = <0x90>; 330*ef484dfcSTim Harvey label = "vdd_1p8"; 331*ef484dfcSTim Harvey }; 332*ef484dfcSTim Harvey 333*ef484dfcSTim Harvey channel@92 { 334*ef484dfcSTim Harvey gw,mode = <2>; 335*ef484dfcSTim Harvey reg = <0x92>; 336*ef484dfcSTim Harvey label = "vdd_dram"; 337*ef484dfcSTim Harvey }; 338*ef484dfcSTim Harvey 339*ef484dfcSTim Harvey channel@98 { 340*ef484dfcSTim Harvey gw,mode = <2>; 341*ef484dfcSTim Harvey reg = <0x98>; 342*ef484dfcSTim Harvey label = "vdd_1p0"; 343*ef484dfcSTim Harvey }; 344*ef484dfcSTim Harvey 345*ef484dfcSTim Harvey channel@9a { 346*ef484dfcSTim Harvey gw,mode = <2>; 347*ef484dfcSTim Harvey reg = <0x9a>; 348*ef484dfcSTim Harvey label = "vdd_2p5"; 349*ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 350*ef484dfcSTim Harvey }; 351*ef484dfcSTim Harvey 352*ef484dfcSTim Harvey channel@a2 { 353*ef484dfcSTim Harvey gw,mode = <2>; 354*ef484dfcSTim Harvey reg = <0xa2>; 355*ef484dfcSTim Harvey label = "vdd_gsc"; 356*ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 357*ef484dfcSTim Harvey }; 358*ef484dfcSTim Harvey }; 359*ef484dfcSTim Harvey }; 360*ef484dfcSTim Harvey 361*ef484dfcSTim Harvey gpio: gpio@23 { 362*ef484dfcSTim Harvey compatible = "nxp,pca9555"; 363*ef484dfcSTim Harvey reg = <0x23>; 364*ef484dfcSTim Harvey gpio-controller; 365*ef484dfcSTim Harvey #gpio-cells = <2>; 366*ef484dfcSTim Harvey interrupt-parent = <&gsc>; 367*ef484dfcSTim Harvey interrupts = <4>; 368*ef484dfcSTim Harvey }; 369*ef484dfcSTim Harvey 370*ef484dfcSTim Harvey pmic@4b { 371*ef484dfcSTim Harvey compatible = "rohm,bd71847"; 372*ef484dfcSTim Harvey reg = <0x4b>; 373*ef484dfcSTim Harvey pinctrl-names = "default"; 374*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pmic>; 375*ef484dfcSTim Harvey interrupt-parent = <&gpio3>; 376*ef484dfcSTim Harvey interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 377*ef484dfcSTim Harvey rohm,reset-snvs-powered; 378*ef484dfcSTim Harvey #clock-cells = <0>; 379*ef484dfcSTim Harvey clocks = <&osc_32k 0>; 380*ef484dfcSTim Harvey clock-output-names = "clk-32k-out"; 381*ef484dfcSTim Harvey 382*ef484dfcSTim Harvey regulators { 383*ef484dfcSTim Harvey /* vdd_soc: 0.805-0.900V (typ=0.8V) */ 384*ef484dfcSTim Harvey BUCK1 { 385*ef484dfcSTim Harvey regulator-name = "buck1"; 386*ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 387*ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 388*ef484dfcSTim Harvey regulator-boot-on; 389*ef484dfcSTim Harvey regulator-always-on; 390*ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 391*ef484dfcSTim Harvey }; 392*ef484dfcSTim Harvey 393*ef484dfcSTim Harvey /* vdd_arm: 0.805-1.0V (typ=0.9V) */ 394*ef484dfcSTim Harvey buck2: BUCK2 { 395*ef484dfcSTim Harvey regulator-name = "buck2"; 396*ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 397*ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 398*ef484dfcSTim Harvey regulator-boot-on; 399*ef484dfcSTim Harvey regulator-always-on; 400*ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 401*ef484dfcSTim Harvey rohm,dvs-run-voltage = <1000000>; 402*ef484dfcSTim Harvey rohm,dvs-idle-voltage = <900000>; 403*ef484dfcSTim Harvey }; 404*ef484dfcSTim Harvey 405*ef484dfcSTim Harvey /* vdd_0p9: 0.805-1.0V (typ=0.9V) */ 406*ef484dfcSTim Harvey BUCK3 { 407*ef484dfcSTim Harvey regulator-name = "buck3"; 408*ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 409*ef484dfcSTim Harvey regulator-max-microvolt = <1350000>; 410*ef484dfcSTim Harvey regulator-boot-on; 411*ef484dfcSTim Harvey regulator-always-on; 412*ef484dfcSTim Harvey }; 413*ef484dfcSTim Harvey 414*ef484dfcSTim Harvey /* vdd_3p3 */ 415*ef484dfcSTim Harvey BUCK4 { 416*ef484dfcSTim Harvey regulator-name = "buck4"; 417*ef484dfcSTim Harvey regulator-min-microvolt = <3000000>; 418*ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 419*ef484dfcSTim Harvey regulator-boot-on; 420*ef484dfcSTim Harvey regulator-always-on; 421*ef484dfcSTim Harvey }; 422*ef484dfcSTim Harvey 423*ef484dfcSTim Harvey /* vdd_1p8 */ 424*ef484dfcSTim Harvey BUCK5 { 425*ef484dfcSTim Harvey regulator-name = "buck5"; 426*ef484dfcSTim Harvey regulator-min-microvolt = <1605000>; 427*ef484dfcSTim Harvey regulator-max-microvolt = <1995000>; 428*ef484dfcSTim Harvey regulator-boot-on; 429*ef484dfcSTim Harvey regulator-always-on; 430*ef484dfcSTim Harvey }; 431*ef484dfcSTim Harvey 432*ef484dfcSTim Harvey /* vdd_dram */ 433*ef484dfcSTim Harvey BUCK6 { 434*ef484dfcSTim Harvey regulator-name = "buck6"; 435*ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 436*ef484dfcSTim Harvey regulator-max-microvolt = <1400000>; 437*ef484dfcSTim Harvey regulator-boot-on; 438*ef484dfcSTim Harvey regulator-always-on; 439*ef484dfcSTim Harvey }; 440*ef484dfcSTim Harvey 441*ef484dfcSTim Harvey /* nvcc_snvs_1p8 */ 442*ef484dfcSTim Harvey LDO1 { 443*ef484dfcSTim Harvey regulator-name = "ldo1"; 444*ef484dfcSTim Harvey regulator-min-microvolt = <1600000>; 445*ef484dfcSTim Harvey regulator-max-microvolt = <1900000>; 446*ef484dfcSTim Harvey regulator-boot-on; 447*ef484dfcSTim Harvey regulator-always-on; 448*ef484dfcSTim Harvey }; 449*ef484dfcSTim Harvey 450*ef484dfcSTim Harvey /* vdd_snvs_0p8 */ 451*ef484dfcSTim Harvey LDO2 { 452*ef484dfcSTim Harvey regulator-name = "ldo2"; 453*ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 454*ef484dfcSTim Harvey regulator-max-microvolt = <900000>; 455*ef484dfcSTim Harvey regulator-boot-on; 456*ef484dfcSTim Harvey regulator-always-on; 457*ef484dfcSTim Harvey }; 458*ef484dfcSTim Harvey 459*ef484dfcSTim Harvey /* vdda_1p8 */ 460*ef484dfcSTim Harvey LDO3 { 461*ef484dfcSTim Harvey regulator-name = "ldo3"; 462*ef484dfcSTim Harvey regulator-min-microvolt = <1800000>; 463*ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 464*ef484dfcSTim Harvey regulator-boot-on; 465*ef484dfcSTim Harvey regulator-always-on; 466*ef484dfcSTim Harvey }; 467*ef484dfcSTim Harvey 468*ef484dfcSTim Harvey LDO4 { 469*ef484dfcSTim Harvey regulator-name = "ldo4"; 470*ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 471*ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 472*ef484dfcSTim Harvey regulator-boot-on; 473*ef484dfcSTim Harvey regulator-always-on; 474*ef484dfcSTim Harvey }; 475*ef484dfcSTim Harvey 476*ef484dfcSTim Harvey LDO6 { 477*ef484dfcSTim Harvey regulator-name = "ldo6"; 478*ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 479*ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 480*ef484dfcSTim Harvey regulator-boot-on; 481*ef484dfcSTim Harvey regulator-always-on; 482*ef484dfcSTim Harvey }; 483*ef484dfcSTim Harvey }; 484*ef484dfcSTim Harvey }; 485*ef484dfcSTim Harvey 486*ef484dfcSTim Harvey eeprom@50 { 487*ef484dfcSTim Harvey compatible = "atmel,24c02"; 488*ef484dfcSTim Harvey reg = <0x50>; 489*ef484dfcSTim Harvey pagesize = <16>; 490*ef484dfcSTim Harvey }; 491*ef484dfcSTim Harvey 492*ef484dfcSTim Harvey eeprom@51 { 493*ef484dfcSTim Harvey compatible = "atmel,24c02"; 494*ef484dfcSTim Harvey reg = <0x51>; 495*ef484dfcSTim Harvey pagesize = <16>; 496*ef484dfcSTim Harvey }; 497*ef484dfcSTim Harvey 498*ef484dfcSTim Harvey eeprom@52 { 499*ef484dfcSTim Harvey compatible = "atmel,24c02"; 500*ef484dfcSTim Harvey reg = <0x52>; 501*ef484dfcSTim Harvey pagesize = <16>; 502*ef484dfcSTim Harvey }; 503*ef484dfcSTim Harvey 504*ef484dfcSTim Harvey eeprom@53 { 505*ef484dfcSTim Harvey compatible = "atmel,24c02"; 506*ef484dfcSTim Harvey reg = <0x53>; 507*ef484dfcSTim Harvey pagesize = <16>; 508*ef484dfcSTim Harvey }; 509*ef484dfcSTim Harvey 510*ef484dfcSTim Harvey rtc@68 { 511*ef484dfcSTim Harvey compatible = "dallas,ds1672"; 512*ef484dfcSTim Harvey reg = <0x68>; 513*ef484dfcSTim Harvey }; 514*ef484dfcSTim Harvey}; 515*ef484dfcSTim Harvey 516*ef484dfcSTim Harvey&i2c2 { 517*ef484dfcSTim Harvey clock-frequency = <400000>; 518*ef484dfcSTim Harvey pinctrl-names = "default"; 519*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c2>; 520*ef484dfcSTim Harvey status = "okay"; 521*ef484dfcSTim Harvey 522*ef484dfcSTim Harvey accelerometer@19 { 523*ef484dfcSTim Harvey compatible = "st,lis2de12"; 524*ef484dfcSTim Harvey pinctrl-names = "default"; 525*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_accel>; 526*ef484dfcSTim Harvey reg = <0x19>; 527*ef484dfcSTim Harvey st,drdy-int-pin = <1>; 528*ef484dfcSTim Harvey interrupt-parent = <&gpio1>; 529*ef484dfcSTim Harvey interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 530*ef484dfcSTim Harvey interrupt-names = "INT1"; 531*ef484dfcSTim Harvey }; 532*ef484dfcSTim Harvey}; 533*ef484dfcSTim Harvey 534*ef484dfcSTim Harvey/* off-board header */ 535*ef484dfcSTim Harvey&i2c3 { 536*ef484dfcSTim Harvey clock-frequency = <400000>; 537*ef484dfcSTim Harvey pinctrl-names = "default"; 538*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c3>; 539*ef484dfcSTim Harvey status = "okay"; 540*ef484dfcSTim Harvey}; 541*ef484dfcSTim Harvey 542*ef484dfcSTim Harvey/* off-board header */ 543*ef484dfcSTim Harvey&i2c4 { 544*ef484dfcSTim Harvey clock-frequency = <400000>; 545*ef484dfcSTim Harvey pinctrl-names = "default"; 546*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c4>; 547*ef484dfcSTim Harvey status = "okay"; 548*ef484dfcSTim Harvey}; 549*ef484dfcSTim Harvey 550*ef484dfcSTim Harvey/* off-board header */ 551*ef484dfcSTim Harvey&sai3 { 552*ef484dfcSTim Harvey pinctrl-names = "default"; 553*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_sai3>; 554*ef484dfcSTim Harvey assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 555*ef484dfcSTim Harvey assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 556*ef484dfcSTim Harvey assigned-clock-rates = <24576000>; 557*ef484dfcSTim Harvey status = "okay"; 558*ef484dfcSTim Harvey}; 559*ef484dfcSTim Harvey 560*ef484dfcSTim Harvey/* RS232/RS485/RS422 selectable */ 561*ef484dfcSTim Harvey&uart1 { 562*ef484dfcSTim Harvey pinctrl-names = "default"; 563*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; 564*ef484dfcSTim Harvey rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; 565*ef484dfcSTim Harvey cts-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; 566*ef484dfcSTim Harvey status = "okay"; 567*ef484dfcSTim Harvey}; 568*ef484dfcSTim Harvey 569*ef484dfcSTim Harvey/* RS232 console */ 570*ef484dfcSTim Harvey&uart2 { 571*ef484dfcSTim Harvey pinctrl-names = "default"; 572*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart2>; 573*ef484dfcSTim Harvey status = "okay"; 574*ef484dfcSTim Harvey}; 575*ef484dfcSTim Harvey 576*ef484dfcSTim Harvey/* bluetooth HCI */ 577*ef484dfcSTim Harvey&uart3 { 578*ef484dfcSTim Harvey pinctrl-names = "default"; 579*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; 580*ef484dfcSTim Harvey rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 581*ef484dfcSTim Harvey cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 582*ef484dfcSTim Harvey status = "okay"; 583*ef484dfcSTim Harvey 584*ef484dfcSTim Harvey bluetooth { 585*ef484dfcSTim Harvey compatible = "brcm,bcm4330-bt"; 586*ef484dfcSTim Harvey shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 587*ef484dfcSTim Harvey }; 588*ef484dfcSTim Harvey}; 589*ef484dfcSTim Harvey 590*ef484dfcSTim Harvey/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */ 591*ef484dfcSTim Harvey&uart4 { 592*ef484dfcSTim Harvey pinctrl-names = "default"; 593*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart4>; 594*ef484dfcSTim Harvey rts-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 595*ef484dfcSTim Harvey cts-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; 596*ef484dfcSTim Harvey dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; 597*ef484dfcSTim Harvey dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; 598*ef484dfcSTim Harvey dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; 599*ef484dfcSTim Harvey status = "okay"; 600*ef484dfcSTim Harvey}; 601*ef484dfcSTim Harvey 602*ef484dfcSTim Harvey&usbotg1 { 603*ef484dfcSTim Harvey dr_mode = "host"; 604*ef484dfcSTim Harvey vbus-supply = <®_usb1_vbus>; 605*ef484dfcSTim Harvey disable-over-current; 606*ef484dfcSTim Harvey status = "okay"; 607*ef484dfcSTim Harvey}; 608*ef484dfcSTim Harvey 609*ef484dfcSTim Harvey&usbotg2 { 610*ef484dfcSTim Harvey dr_mode = "host"; 611*ef484dfcSTim Harvey disable-over-current; 612*ef484dfcSTim Harvey status = "okay"; 613*ef484dfcSTim Harvey}; 614*ef484dfcSTim Harvey 615*ef484dfcSTim Harvey/* SDIO WiFi */ 616*ef484dfcSTim Harvey&usdhc2 { 617*ef484dfcSTim Harvey pinctrl-names = "default"; 618*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc2>; 619*ef484dfcSTim Harvey bus-width = <4>; 620*ef484dfcSTim Harvey non-removable; 621*ef484dfcSTim Harvey vmmc-supply = <®_wifi>; 622*ef484dfcSTim Harvey status = "okay"; 623*ef484dfcSTim Harvey}; 624*ef484dfcSTim Harvey 625*ef484dfcSTim Harvey/* eMMC */ 626*ef484dfcSTim Harvey&usdhc3 { 627*ef484dfcSTim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 628*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc3>; 629*ef484dfcSTim Harvey pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 630*ef484dfcSTim Harvey pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 631*ef484dfcSTim Harvey bus-width = <8>; 632*ef484dfcSTim Harvey non-removable; 633*ef484dfcSTim Harvey status = "okay"; 634*ef484dfcSTim Harvey}; 635*ef484dfcSTim Harvey 636*ef484dfcSTim Harvey&wdog1 { 637*ef484dfcSTim Harvey pinctrl-names = "default"; 638*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_wdog>; 639*ef484dfcSTim Harvey fsl,ext-reset-output; 640*ef484dfcSTim Harvey status = "okay"; 641*ef484dfcSTim Harvey}; 642*ef484dfcSTim Harvey 643*ef484dfcSTim Harvey&iomuxc { 644*ef484dfcSTim Harvey pinctrl-names = "default"; 645*ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_hog>; 646*ef484dfcSTim Harvey 647*ef484dfcSTim Harvey pinctrl_hog: hoggrp { 648*ef484dfcSTim Harvey fsl,pins = < 649*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ 650*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */ 651*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ 652*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ 653*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */ 654*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x40000041 /* AMP GPIO2 */ 655*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x40000041 /* AMP GPIO3 */ 656*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x40000041 /* AMP_GPIO4 */ 657*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ 658*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */ 659*ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */ 660*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */ 661*ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */ 662*ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */ 663*ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */ 664*ef484dfcSTim Harvey >; 665*ef484dfcSTim Harvey }; 666*ef484dfcSTim Harvey 667*ef484dfcSTim Harvey pinctrl_accel: accelgrp { 668*ef484dfcSTim Harvey fsl,pins = < 669*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159 670*ef484dfcSTim Harvey >; 671*ef484dfcSTim Harvey }; 672*ef484dfcSTim Harvey 673*ef484dfcSTim Harvey pinctrl_fec1: fec1grp { 674*ef484dfcSTim Harvey fsl,pins = < 675*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 676*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 677*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 678*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 679*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 680*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 681*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 682*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 683*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 684*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 685*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 686*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 687*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 688*ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 689*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */ 690*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */ 691*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO08_ENET1_1588_EVENT0_IN 0x141 692*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO09_ENET1_1588_EVENT0_OUT 0x141 693*ef484dfcSTim Harvey >; 694*ef484dfcSTim Harvey }; 695*ef484dfcSTim Harvey 696*ef484dfcSTim Harvey pinctrl_gsc: gscgrp { 697*ef484dfcSTim Harvey fsl,pins = < 698*ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40 699*ef484dfcSTim Harvey >; 700*ef484dfcSTim Harvey }; 701*ef484dfcSTim Harvey 702*ef484dfcSTim Harvey pinctrl_i2c1: i2c1grp { 703*ef484dfcSTim Harvey fsl,pins = < 704*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 705*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 706*ef484dfcSTim Harvey >; 707*ef484dfcSTim Harvey }; 708*ef484dfcSTim Harvey 709*ef484dfcSTim Harvey pinctrl_i2c2: i2c2grp { 710*ef484dfcSTim Harvey fsl,pins = < 711*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 712*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 713*ef484dfcSTim Harvey >; 714*ef484dfcSTim Harvey }; 715*ef484dfcSTim Harvey 716*ef484dfcSTim Harvey pinctrl_i2c3: i2c3grp { 717*ef484dfcSTim Harvey fsl,pins = < 718*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 719*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 720*ef484dfcSTim Harvey >; 721*ef484dfcSTim Harvey }; 722*ef484dfcSTim Harvey 723*ef484dfcSTim Harvey pinctrl_i2c4: i2c4grp { 724*ef484dfcSTim Harvey fsl,pins = < 725*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 726*ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 727*ef484dfcSTim Harvey >; 728*ef484dfcSTim Harvey }; 729*ef484dfcSTim Harvey 730*ef484dfcSTim Harvey pinctrl_gpio_leds: gpioledgrp { 731*ef484dfcSTim Harvey fsl,pins = < 732*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 733*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 734*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 735*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 736*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 737*ef484dfcSTim Harvey >; 738*ef484dfcSTim Harvey }; 739*ef484dfcSTim Harvey 740*ef484dfcSTim Harvey pinctrl_pmic: pmicgrp { 741*ef484dfcSTim Harvey fsl,pins = < 742*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41 743*ef484dfcSTim Harvey >; 744*ef484dfcSTim Harvey }; 745*ef484dfcSTim Harvey 746*ef484dfcSTim Harvey pinctrl_pps: ppsgrp { 747*ef484dfcSTim Harvey fsl,pins = < 748*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */ 749*ef484dfcSTim Harvey >; 750*ef484dfcSTim Harvey }; 751*ef484dfcSTim Harvey 752*ef484dfcSTim Harvey pinctrl_reg_wl: regwlgrp { 753*ef484dfcSTim Harvey fsl,pins = < 754*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */ 755*ef484dfcSTim Harvey >; 756*ef484dfcSTim Harvey }; 757*ef484dfcSTim Harvey 758*ef484dfcSTim Harvey pinctrl_reg_usb1: regusb1grp { 759*ef484dfcSTim Harvey fsl,pins = < 760*ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41 761*ef484dfcSTim Harvey >; 762*ef484dfcSTim Harvey }; 763*ef484dfcSTim Harvey 764*ef484dfcSTim Harvey pinctrl_sai3: sai3grp { 765*ef484dfcSTim Harvey fsl,pins = < 766*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 767*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 768*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 769*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 770*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 771*ef484dfcSTim Harvey >; 772*ef484dfcSTim Harvey }; 773*ef484dfcSTim Harvey 774*ef484dfcSTim Harvey pinctrl_spi1: spi1grp { 775*ef484dfcSTim Harvey fsl,pins = < 776*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 777*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 778*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 779*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40 780*ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */ 781*ef484dfcSTim Harvey >; 782*ef484dfcSTim Harvey }; 783*ef484dfcSTim Harvey 784*ef484dfcSTim Harvey pinctrl_spi2: spi2grp { 785*ef484dfcSTim Harvey fsl,pins = < 786*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 787*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 788*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 789*ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */ 790*ef484dfcSTim Harvey >; 791*ef484dfcSTim Harvey }; 792*ef484dfcSTim Harvey 793*ef484dfcSTim Harvey pinctrl_uart1: uart1grp { 794*ef484dfcSTim Harvey fsl,pins = < 795*ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 796*ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 797*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x140 /* RTS */ 798*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x140 /* CTS */ 799*ef484dfcSTim Harvey >; 800*ef484dfcSTim Harvey }; 801*ef484dfcSTim Harvey 802*ef484dfcSTim Harvey pinctrl_uart1_gpio: uart1gpiogrp { 803*ef484dfcSTim Harvey fsl,pins = < 804*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */ 805*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */ 806*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */ 807*ef484dfcSTim Harvey >; 808*ef484dfcSTim Harvey }; 809*ef484dfcSTim Harvey 810*ef484dfcSTim Harvey pinctrl_uart2: uart2grp { 811*ef484dfcSTim Harvey fsl,pins = < 812*ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 813*ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 814*ef484dfcSTim Harvey >; 815*ef484dfcSTim Harvey }; 816*ef484dfcSTim Harvey 817*ef484dfcSTim Harvey pinctrl_uart3_gpio: uart3_gpiogrp { 818*ef484dfcSTim Harvey fsl,pins = < 819*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */ 820*ef484dfcSTim Harvey >; 821*ef484dfcSTim Harvey }; 822*ef484dfcSTim Harvey 823*ef484dfcSTim Harvey pinctrl_uart3: uart3grp { 824*ef484dfcSTim Harvey fsl,pins = < 825*ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 826*ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 827*ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */ 828*ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */ 829*ef484dfcSTim Harvey >; 830*ef484dfcSTim Harvey }; 831*ef484dfcSTim Harvey 832*ef484dfcSTim Harvey pinctrl_uart4: uart4grp { 833*ef484dfcSTim Harvey fsl,pins = < 834*ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 835*ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 836*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x140 /* CTS */ 837*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x140 /* RTS */ 838*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x140 /* DTR */ 839*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x140 /* DSR */ 840*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x140 /* DCD */ 841*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x140 /* RI */ 842*ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x140 /* GNSS_PPS */ 843*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */ 844*ef484dfcSTim Harvey >; 845*ef484dfcSTim Harvey }; 846*ef484dfcSTim Harvey 847*ef484dfcSTim Harvey pinctrl_usdhc2: usdhc2grp { 848*ef484dfcSTim Harvey fsl,pins = < 849*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 850*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 851*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 852*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 853*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 854*ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 855*ef484dfcSTim Harvey >; 856*ef484dfcSTim Harvey }; 857*ef484dfcSTim Harvey 858*ef484dfcSTim Harvey pinctrl_usdhc3: usdhc3grp { 859*ef484dfcSTim Harvey fsl,pins = < 860*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 861*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 862*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 863*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 864*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 865*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 866*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 867*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 868*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 869*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 870*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 871*ef484dfcSTim Harvey >; 872*ef484dfcSTim Harvey }; 873*ef484dfcSTim Harvey 874*ef484dfcSTim Harvey pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 875*ef484dfcSTim Harvey fsl,pins = < 876*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 877*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 878*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 879*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 880*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 881*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 882*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 883*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 884*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 885*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 886*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 887*ef484dfcSTim Harvey >; 888*ef484dfcSTim Harvey }; 889*ef484dfcSTim Harvey 890*ef484dfcSTim Harvey pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 891*ef484dfcSTim Harvey fsl,pins = < 892*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 893*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 894*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 895*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 896*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 897*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 898*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 899*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 900*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 901*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 902*ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 903*ef484dfcSTim Harvey >; 904*ef484dfcSTim Harvey }; 905*ef484dfcSTim Harvey 906*ef484dfcSTim Harvey pinctrl_wdog: wdoggrp { 907*ef484dfcSTim Harvey fsl,pins = < 908*ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 909*ef484dfcSTim Harvey >; 910*ef484dfcSTim Harvey }; 911*ef484dfcSTim Harvey}; 912