1ef484dfcSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2ef484dfcSTim Harvey/* 3ef484dfcSTim Harvey * Copyright 2021 Gateworks Corporation 4ef484dfcSTim Harvey */ 5ef484dfcSTim Harvey 6ef484dfcSTim Harvey/dts-v1/; 7ef484dfcSTim Harvey 8ef484dfcSTim Harvey#include <dt-bindings/gpio/gpio.h> 9ef484dfcSTim Harvey#include <dt-bindings/input/linux-event-codes.h> 10ef484dfcSTim Harvey#include <dt-bindings/leds/common.h> 11ef484dfcSTim Harvey#include <dt-bindings/net/ti-dp83867.h> 12afb424b9STim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h> 13ef484dfcSTim Harvey 14ef484dfcSTim Harvey#include "imx8mm.dtsi" 15ef484dfcSTim Harvey 16ef484dfcSTim Harvey/ { 17ef484dfcSTim Harvey model = "Gateworks Venice GW7902 i.MX8MM board"; 18ef484dfcSTim Harvey compatible = "gw,imx8mm-gw7902", "fsl,imx8mm"; 19ef484dfcSTim Harvey 20ef484dfcSTim Harvey aliases { 21afb424b9STim Harvey ethernet1 = ð1; 22ef484dfcSTim Harvey usb0 = &usbotg1; 23ef484dfcSTim Harvey usb1 = &usbotg2; 24ef484dfcSTim Harvey }; 25ef484dfcSTim Harvey 26ef484dfcSTim Harvey chosen { 27ef484dfcSTim Harvey stdout-path = &uart2; 28ef484dfcSTim Harvey }; 29ef484dfcSTim Harvey 30ef484dfcSTim Harvey memory@40000000 { 31ef484dfcSTim Harvey device_type = "memory"; 32ef484dfcSTim Harvey reg = <0x0 0x40000000 0 0x80000000>; 33ef484dfcSTim Harvey }; 34ef484dfcSTim Harvey 35ef484dfcSTim Harvey can20m: can20m { 36ef484dfcSTim Harvey compatible = "fixed-clock"; 37ef484dfcSTim Harvey #clock-cells = <0>; 38ef484dfcSTim Harvey clock-frequency = <20000000>; 39ef484dfcSTim Harvey clock-output-names = "can20m"; 40ef484dfcSTim Harvey }; 41ef484dfcSTim Harvey 42ef484dfcSTim Harvey gpio-keys { 43ef484dfcSTim Harvey compatible = "gpio-keys"; 44ef484dfcSTim Harvey 45b803d15eSKrzysztof Kozlowski key-user-pb { 46ef484dfcSTim Harvey label = "user_pb"; 47ef484dfcSTim Harvey gpios = <&gpio 2 GPIO_ACTIVE_LOW>; 48ef484dfcSTim Harvey linux,code = <BTN_0>; 49ef484dfcSTim Harvey }; 50ef484dfcSTim Harvey 51b803d15eSKrzysztof Kozlowski key-user-pb1x { 52ef484dfcSTim Harvey label = "user_pb1x"; 53ef484dfcSTim Harvey linux,code = <BTN_1>; 54ef484dfcSTim Harvey interrupt-parent = <&gsc>; 55ef484dfcSTim Harvey interrupts = <0>; 56ef484dfcSTim Harvey }; 57ef484dfcSTim Harvey 58ef484dfcSTim Harvey key-erased { 59ef484dfcSTim Harvey label = "key_erased"; 60ef484dfcSTim Harvey linux,code = <BTN_2>; 61ef484dfcSTim Harvey interrupt-parent = <&gsc>; 62ef484dfcSTim Harvey interrupts = <1>; 63ef484dfcSTim Harvey }; 64ef484dfcSTim Harvey 65b803d15eSKrzysztof Kozlowski key-eeprom-wp { 66ef484dfcSTim Harvey label = "eeprom_wp"; 67ef484dfcSTim Harvey linux,code = <BTN_3>; 68ef484dfcSTim Harvey interrupt-parent = <&gsc>; 69ef484dfcSTim Harvey interrupts = <2>; 70ef484dfcSTim Harvey }; 71ef484dfcSTim Harvey 72b803d15eSKrzysztof Kozlowski key-tamper { 73ef484dfcSTim Harvey label = "tamper"; 74ef484dfcSTim Harvey linux,code = <BTN_4>; 75ef484dfcSTim Harvey interrupt-parent = <&gsc>; 76ef484dfcSTim Harvey interrupts = <5>; 77ef484dfcSTim Harvey }; 78ef484dfcSTim Harvey 79ef484dfcSTim Harvey switch-hold { 80ef484dfcSTim Harvey label = "switch_hold"; 81ef484dfcSTim Harvey linux,code = <BTN_5>; 82ef484dfcSTim Harvey interrupt-parent = <&gsc>; 83ef484dfcSTim Harvey interrupts = <7>; 84ef484dfcSTim Harvey }; 85ef484dfcSTim Harvey }; 86ef484dfcSTim Harvey 87ef484dfcSTim Harvey led-controller { 88ef484dfcSTim Harvey compatible = "gpio-leds"; 89ef484dfcSTim Harvey pinctrl-names = "default"; 90ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 91ef484dfcSTim Harvey 92ef484dfcSTim Harvey led-0 { 93ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 94ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 95ef484dfcSTim Harvey label = "panel1"; 96ef484dfcSTim Harvey gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 97ef484dfcSTim Harvey default-state = "off"; 98ef484dfcSTim Harvey }; 99ef484dfcSTim Harvey 100ef484dfcSTim Harvey led-1 { 101ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 102ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 103ef484dfcSTim Harvey label = "panel2"; 104ef484dfcSTim Harvey gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 105ef484dfcSTim Harvey default-state = "off"; 106ef484dfcSTim Harvey }; 107ef484dfcSTim Harvey 108ef484dfcSTim Harvey led-2 { 109ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 110ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 111ef484dfcSTim Harvey label = "panel3"; 112ef484dfcSTim Harvey gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 113ef484dfcSTim Harvey default-state = "off"; 114ef484dfcSTim Harvey }; 115ef484dfcSTim Harvey 116ef484dfcSTim Harvey led-3 { 117ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 118ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 119ef484dfcSTim Harvey label = "panel4"; 120ef484dfcSTim Harvey gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 121ef484dfcSTim Harvey default-state = "off"; 122ef484dfcSTim Harvey }; 123ef484dfcSTim Harvey 124ef484dfcSTim Harvey led-4 { 125ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 126ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 127ef484dfcSTim Harvey label = "panel5"; 128ef484dfcSTim Harvey gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 129ef484dfcSTim Harvey default-state = "off"; 130ef484dfcSTim Harvey }; 131ef484dfcSTim Harvey }; 132ef484dfcSTim Harvey 133afb424b9STim Harvey pcie0_refclk: pcie0-refclk { 134afb424b9STim Harvey compatible = "fixed-clock"; 135afb424b9STim Harvey #clock-cells = <0>; 136afb424b9STim Harvey clock-frequency = <100000000>; 137afb424b9STim Harvey }; 138afb424b9STim Harvey 139ef484dfcSTim Harvey pps { 140ef484dfcSTim Harvey compatible = "pps-gpio"; 141ef484dfcSTim Harvey pinctrl-names = "default"; 142ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pps>; 143ef484dfcSTim Harvey gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 144ef484dfcSTim Harvey status = "okay"; 145ef484dfcSTim Harvey }; 146ef484dfcSTim Harvey 147ef484dfcSTim Harvey reg_3p3v: regulator-3p3v { 148ef484dfcSTim Harvey compatible = "regulator-fixed"; 149ef484dfcSTim Harvey regulator-name = "3P3V"; 150ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 151ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 152ef484dfcSTim Harvey regulator-always-on; 153ef484dfcSTim Harvey }; 154ef484dfcSTim Harvey 155ef484dfcSTim Harvey reg_usb1_vbus: regulator-usb1 { 156ef484dfcSTim Harvey compatible = "regulator-fixed"; 157ef484dfcSTim Harvey pinctrl-names = "default"; 158ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_usb1>; 159ef484dfcSTim Harvey regulator-name = "usb_usb1_vbus"; 160ef484dfcSTim Harvey gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; 161ef484dfcSTim Harvey enable-active-high; 162ef484dfcSTim Harvey regulator-min-microvolt = <5000000>; 163ef484dfcSTim Harvey regulator-max-microvolt = <5000000>; 164ef484dfcSTim Harvey }; 165ef484dfcSTim Harvey 166ef484dfcSTim Harvey reg_wifi: regulator-wifi { 167ef484dfcSTim Harvey compatible = "regulator-fixed"; 168ef484dfcSTim Harvey pinctrl-names = "default"; 169ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_wl>; 170ef484dfcSTim Harvey regulator-name = "wifi"; 171ef484dfcSTim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 172ef484dfcSTim Harvey enable-active-high; 173ef484dfcSTim Harvey startup-delay-us = <100>; 174ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 175ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 176ef484dfcSTim Harvey }; 177ef484dfcSTim Harvey}; 178ef484dfcSTim Harvey 179ef484dfcSTim Harvey&A53_0 { 180ef484dfcSTim Harvey cpu-supply = <&buck2>; 181ef484dfcSTim Harvey}; 182ef484dfcSTim Harvey 183ef484dfcSTim Harvey&A53_1 { 184ef484dfcSTim Harvey cpu-supply = <&buck2>; 185ef484dfcSTim Harvey}; 186ef484dfcSTim Harvey 187ef484dfcSTim Harvey&A53_2 { 188ef484dfcSTim Harvey cpu-supply = <&buck2>; 189ef484dfcSTim Harvey}; 190ef484dfcSTim Harvey 191ef484dfcSTim Harvey&A53_3 { 192ef484dfcSTim Harvey cpu-supply = <&buck2>; 193ef484dfcSTim Harvey}; 194ef484dfcSTim Harvey 195ef484dfcSTim Harvey&ddrc { 196ef484dfcSTim Harvey operating-points-v2 = <&ddrc_opp_table>; 197ef484dfcSTim Harvey 198ef484dfcSTim Harvey ddrc_opp_table: opp-table { 199ef484dfcSTim Harvey compatible = "operating-points-v2"; 200ef484dfcSTim Harvey 2010c068a36SMarek Vasut opp-25000000 { 202ef484dfcSTim Harvey opp-hz = /bits/ 64 <25000000>; 203ef484dfcSTim Harvey }; 204ef484dfcSTim Harvey 2050c068a36SMarek Vasut opp-100000000 { 206ef484dfcSTim Harvey opp-hz = /bits/ 64 <100000000>; 207ef484dfcSTim Harvey }; 208ef484dfcSTim Harvey 2090c068a36SMarek Vasut opp-750000000 { 210ef484dfcSTim Harvey opp-hz = /bits/ 64 <750000000>; 211ef484dfcSTim Harvey }; 212ef484dfcSTim Harvey }; 213ef484dfcSTim Harvey}; 214ef484dfcSTim Harvey 215ef484dfcSTim Harvey&ecspi1 { 216ef484dfcSTim Harvey pinctrl-names = "default"; 217ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi1>; 218ef484dfcSTim Harvey cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 219ef484dfcSTim Harvey status = "okay"; 220ef484dfcSTim Harvey 221ef484dfcSTim Harvey can@0 { 222ef484dfcSTim Harvey compatible = "microchip,mcp2515"; 223ef484dfcSTim Harvey reg = <0>; 224ef484dfcSTim Harvey clocks = <&can20m>; 225ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 226ef484dfcSTim Harvey interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 227ef484dfcSTim Harvey spi-max-frequency = <10000000>; 228ef484dfcSTim Harvey }; 229ef484dfcSTim Harvey}; 230ef484dfcSTim Harvey 231ef484dfcSTim Harvey/* off-board header */ 232ef484dfcSTim Harvey&ecspi2 { 233ef484dfcSTim Harvey pinctrl-names = "default"; 234ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi2>; 235ef484dfcSTim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 236ef484dfcSTim Harvey status = "okay"; 237ef484dfcSTim Harvey}; 238ef484dfcSTim Harvey 239ef484dfcSTim Harvey&fec1 { 240ef484dfcSTim Harvey pinctrl-names = "default"; 241ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_fec1>; 242ef484dfcSTim Harvey phy-mode = "rgmii-id"; 243ef484dfcSTim Harvey phy-handle = <ðphy0>; 244ef484dfcSTim Harvey local-mac-address = [00 00 00 00 00 00]; 245ef484dfcSTim Harvey status = "okay"; 246ef484dfcSTim Harvey 247ef484dfcSTim Harvey mdio { 248ef484dfcSTim Harvey #address-cells = <1>; 249ef484dfcSTim Harvey #size-cells = <0>; 250ef484dfcSTim Harvey 251ef484dfcSTim Harvey ethphy0: ethernet-phy@0 { 252ef484dfcSTim Harvey compatible = "ethernet-phy-ieee802.3-c22"; 253ef484dfcSTim Harvey reg = <0>; 254ef484dfcSTim Harvey ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 255ef484dfcSTim Harvey ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 256ef484dfcSTim Harvey tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 257ef484dfcSTim Harvey rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 258ef484dfcSTim Harvey }; 259ef484dfcSTim Harvey }; 260ef484dfcSTim Harvey}; 261ef484dfcSTim Harvey 2629d46d9f7STim Harvey&gpio1 { 2639d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 264e59418a4STim Harvey "m2_pwr_en", "", "", "", "", "m2_reset", "", "m2_wdis#", 2659d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2669d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2679d46d9f7STim Harvey}; 2689d46d9f7STim Harvey 2699d46d9f7STim Harvey&gpio2 { 2709d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 2719d46d9f7STim Harvey "uart2_en#", "", "", "", "", "", "", "", 2729d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2739d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2749d46d9f7STim Harvey}; 2759d46d9f7STim Harvey 2769d46d9f7STim Harvey&gpio3 { 2779d46d9f7STim Harvey gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#", 2789d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2799d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2809d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2819d46d9f7STim Harvey}; 2829d46d9f7STim Harvey 2839d46d9f7STim Harvey&gpio4 { 2849d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 2859d46d9f7STim Harvey "", "", "", "amp_gpio3", "amp_gpio2", "", "amp_gpio1", "", 286e59418a4STim Harvey "lte_pwr#", "lte_rst", "lte_int", "", 287e59418a4STim Harvey "amp_gpio4", "app_gpio1", "vdd_4p0_en", "uart1_rs485", 2889d46d9f7STim Harvey "", "uart1_term", "uart1_half", "app_gpio2", 2899d46d9f7STim Harvey "mipi_gpio1", "", "", ""; 2909d46d9f7STim Harvey}; 2919d46d9f7STim Harvey 2929d46d9f7STim Harvey&gpio5 { 2939d46d9f7STim Harvey gpio-line-names = "", "", "", "mipi_gpio4", 2949d46d9f7STim Harvey "mipi_gpio3", "mipi_gpio2", "", "", 2959d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2969d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2979d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2989d46d9f7STim Harvey}; 2999d46d9f7STim Harvey 300ef484dfcSTim Harvey&i2c1 { 301ef484dfcSTim Harvey clock-frequency = <100000>; 30219d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 303ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c1>; 30419d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c1_gpio>; 30519d0fc9eSTim Harvey scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 30619d0fc9eSTim Harvey sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 307ef484dfcSTim Harvey status = "okay"; 308ef484dfcSTim Harvey 309ef484dfcSTim Harvey gsc: gsc@20 { 310ef484dfcSTim Harvey compatible = "gw,gsc"; 311ef484dfcSTim Harvey reg = <0x20>; 312ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gsc>; 313ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 314ef484dfcSTim Harvey interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 315ef484dfcSTim Harvey interrupt-controller; 316ef484dfcSTim Harvey #interrupt-cells = <1>; 317ef484dfcSTim Harvey 318ef484dfcSTim Harvey adc { 319ef484dfcSTim Harvey compatible = "gw,gsc-adc"; 320ef484dfcSTim Harvey #address-cells = <1>; 321ef484dfcSTim Harvey #size-cells = <0>; 322ef484dfcSTim Harvey 323ef484dfcSTim Harvey channel@6 { 324ef484dfcSTim Harvey gw,mode = <0>; 325ef484dfcSTim Harvey reg = <0x06>; 326ef484dfcSTim Harvey label = "temp"; 327ef484dfcSTim Harvey }; 328ef484dfcSTim Harvey 329ef484dfcSTim Harvey channel@8 { 330c79d8096SNicolas Cavallari gw,mode = <3>; 331ef484dfcSTim Harvey reg = <0x08>; 332ef484dfcSTim Harvey label = "vdd_bat"; 333ef484dfcSTim Harvey }; 334ef484dfcSTim Harvey 335ef484dfcSTim Harvey channel@82 { 336ef484dfcSTim Harvey gw,mode = <2>; 337ef484dfcSTim Harvey reg = <0x82>; 338ef484dfcSTim Harvey label = "vin"; 339ef484dfcSTim Harvey gw,voltage-divider-ohms = <22100 1000>; 340ef484dfcSTim Harvey gw,voltage-offset-microvolt = <700000>; 341ef484dfcSTim Harvey }; 342ef484dfcSTim Harvey 343ef484dfcSTim Harvey channel@84 { 344ef484dfcSTim Harvey gw,mode = <2>; 345ef484dfcSTim Harvey reg = <0x84>; 346ef484dfcSTim Harvey label = "vin_4p0"; 347ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 348ef484dfcSTim Harvey }; 349ef484dfcSTim Harvey 350ef484dfcSTim Harvey channel@86 { 351ef484dfcSTim Harvey gw,mode = <2>; 352ef484dfcSTim Harvey reg = <0x86>; 353ef484dfcSTim Harvey label = "vdd_3p3"; 354ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 355ef484dfcSTim Harvey }; 356ef484dfcSTim Harvey 357ef484dfcSTim Harvey channel@88 { 358ef484dfcSTim Harvey gw,mode = <2>; 359ef484dfcSTim Harvey reg = <0x88>; 360ef484dfcSTim Harvey label = "vdd_0p9"; 361ef484dfcSTim Harvey }; 362ef484dfcSTim Harvey 363ef484dfcSTim Harvey channel@8c { 364ef484dfcSTim Harvey gw,mode = <2>; 365ef484dfcSTim Harvey reg = <0x8c>; 366ef484dfcSTim Harvey label = "vdd_soc"; 367ef484dfcSTim Harvey }; 368ef484dfcSTim Harvey 369ef484dfcSTim Harvey channel@8e { 370ef484dfcSTim Harvey gw,mode = <2>; 371ef484dfcSTim Harvey reg = <0x8e>; 372ef484dfcSTim Harvey label = "vdd_arm"; 373ef484dfcSTim Harvey }; 374ef484dfcSTim Harvey 375ef484dfcSTim Harvey channel@90 { 376ef484dfcSTim Harvey gw,mode = <2>; 377ef484dfcSTim Harvey reg = <0x90>; 378ef484dfcSTim Harvey label = "vdd_1p8"; 379ef484dfcSTim Harvey }; 380ef484dfcSTim Harvey 381ef484dfcSTim Harvey channel@92 { 382ef484dfcSTim Harvey gw,mode = <2>; 383ef484dfcSTim Harvey reg = <0x92>; 384ef484dfcSTim Harvey label = "vdd_dram"; 385ef484dfcSTim Harvey }; 386ef484dfcSTim Harvey 387ef484dfcSTim Harvey channel@98 { 388ef484dfcSTim Harvey gw,mode = <2>; 389ef484dfcSTim Harvey reg = <0x98>; 390ef484dfcSTim Harvey label = "vdd_1p0"; 391ef484dfcSTim Harvey }; 392ef484dfcSTim Harvey 393ef484dfcSTim Harvey channel@9a { 394ef484dfcSTim Harvey gw,mode = <2>; 395ef484dfcSTim Harvey reg = <0x9a>; 396ef484dfcSTim Harvey label = "vdd_2p5"; 397ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 398ef484dfcSTim Harvey }; 399ef484dfcSTim Harvey 400dd6fa860STim Harvey channel@9c { 401dd6fa860STim Harvey gw,mode = <2>; 402dd6fa860STim Harvey reg = <0x9c>; 403dd6fa860STim Harvey label = "vdd_5p0"; 404dd6fa860STim Harvey gw,voltage-divider-ohms = <10000 10000>; 405dd6fa860STim Harvey }; 406dd6fa860STim Harvey 407ef484dfcSTim Harvey channel@a2 { 408ef484dfcSTim Harvey gw,mode = <2>; 409ef484dfcSTim Harvey reg = <0xa2>; 410ef484dfcSTim Harvey label = "vdd_gsc"; 411ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 412ef484dfcSTim Harvey }; 413ef484dfcSTim Harvey }; 414ef484dfcSTim Harvey }; 415ef484dfcSTim Harvey 416ef484dfcSTim Harvey gpio: gpio@23 { 417ef484dfcSTim Harvey compatible = "nxp,pca9555"; 418ef484dfcSTim Harvey reg = <0x23>; 419ef484dfcSTim Harvey gpio-controller; 420ef484dfcSTim Harvey #gpio-cells = <2>; 421ef484dfcSTim Harvey interrupt-parent = <&gsc>; 422ef484dfcSTim Harvey interrupts = <4>; 423ef484dfcSTim Harvey }; 424ef484dfcSTim Harvey 425ef484dfcSTim Harvey pmic@4b { 426ef484dfcSTim Harvey compatible = "rohm,bd71847"; 427ef484dfcSTim Harvey reg = <0x4b>; 428ef484dfcSTim Harvey pinctrl-names = "default"; 429ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pmic>; 430ef484dfcSTim Harvey interrupt-parent = <&gpio3>; 431ef484dfcSTim Harvey interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 432ef484dfcSTim Harvey rohm,reset-snvs-powered; 433ef484dfcSTim Harvey #clock-cells = <0>; 434ebb8dbecSFabio Estevam clocks = <&osc_32k>; 435ef484dfcSTim Harvey clock-output-names = "clk-32k-out"; 436ef484dfcSTim Harvey 437ef484dfcSTim Harvey regulators { 438ef484dfcSTim Harvey /* vdd_soc: 0.805-0.900V (typ=0.8V) */ 439ef484dfcSTim Harvey BUCK1 { 440ef484dfcSTim Harvey regulator-name = "buck1"; 441ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 442ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 443ef484dfcSTim Harvey regulator-boot-on; 444ef484dfcSTim Harvey regulator-always-on; 445ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 446ef484dfcSTim Harvey }; 447ef484dfcSTim Harvey 448ef484dfcSTim Harvey /* vdd_arm: 0.805-1.0V (typ=0.9V) */ 449ef484dfcSTim Harvey buck2: BUCK2 { 450ef484dfcSTim Harvey regulator-name = "buck2"; 451ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 452ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 453ef484dfcSTim Harvey regulator-boot-on; 454ef484dfcSTim Harvey regulator-always-on; 455ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 456ef484dfcSTim Harvey rohm,dvs-run-voltage = <1000000>; 457ef484dfcSTim Harvey rohm,dvs-idle-voltage = <900000>; 458ef484dfcSTim Harvey }; 459ef484dfcSTim Harvey 460ef484dfcSTim Harvey /* vdd_0p9: 0.805-1.0V (typ=0.9V) */ 461ef484dfcSTim Harvey BUCK3 { 462ef484dfcSTim Harvey regulator-name = "buck3"; 463ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 464ef484dfcSTim Harvey regulator-max-microvolt = <1350000>; 465ef484dfcSTim Harvey regulator-boot-on; 466ef484dfcSTim Harvey regulator-always-on; 467ef484dfcSTim Harvey }; 468ef484dfcSTim Harvey 469ef484dfcSTim Harvey /* vdd_3p3 */ 470ef484dfcSTim Harvey BUCK4 { 471ef484dfcSTim Harvey regulator-name = "buck4"; 472ef484dfcSTim Harvey regulator-min-microvolt = <3000000>; 473ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 474ef484dfcSTim Harvey regulator-boot-on; 475ef484dfcSTim Harvey regulator-always-on; 476ef484dfcSTim Harvey }; 477ef484dfcSTim Harvey 478ef484dfcSTim Harvey /* vdd_1p8 */ 479ef484dfcSTim Harvey BUCK5 { 480ef484dfcSTim Harvey regulator-name = "buck5"; 481ef484dfcSTim Harvey regulator-min-microvolt = <1605000>; 482ef484dfcSTim Harvey regulator-max-microvolt = <1995000>; 483ef484dfcSTim Harvey regulator-boot-on; 484ef484dfcSTim Harvey regulator-always-on; 485ef484dfcSTim Harvey }; 486ef484dfcSTim Harvey 487ef484dfcSTim Harvey /* vdd_dram */ 488ef484dfcSTim Harvey BUCK6 { 489ef484dfcSTim Harvey regulator-name = "buck6"; 490ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 491ef484dfcSTim Harvey regulator-max-microvolt = <1400000>; 492ef484dfcSTim Harvey regulator-boot-on; 493ef484dfcSTim Harvey regulator-always-on; 494ef484dfcSTim Harvey }; 495ef484dfcSTim Harvey 496ef484dfcSTim Harvey /* nvcc_snvs_1p8 */ 497ef484dfcSTim Harvey LDO1 { 498ef484dfcSTim Harvey regulator-name = "ldo1"; 499ef484dfcSTim Harvey regulator-min-microvolt = <1600000>; 500ef484dfcSTim Harvey regulator-max-microvolt = <1900000>; 501ef484dfcSTim Harvey regulator-boot-on; 502ef484dfcSTim Harvey regulator-always-on; 503ef484dfcSTim Harvey }; 504ef484dfcSTim Harvey 505ef484dfcSTim Harvey /* vdd_snvs_0p8 */ 506ef484dfcSTim Harvey LDO2 { 507ef484dfcSTim Harvey regulator-name = "ldo2"; 508ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 509ef484dfcSTim Harvey regulator-max-microvolt = <900000>; 510ef484dfcSTim Harvey regulator-boot-on; 511ef484dfcSTim Harvey regulator-always-on; 512ef484dfcSTim Harvey }; 513ef484dfcSTim Harvey 514ef484dfcSTim Harvey /* vdda_1p8 */ 515ef484dfcSTim Harvey LDO3 { 516ef484dfcSTim Harvey regulator-name = "ldo3"; 517ef484dfcSTim Harvey regulator-min-microvolt = <1800000>; 518ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 519ef484dfcSTim Harvey regulator-boot-on; 520ef484dfcSTim Harvey regulator-always-on; 521ef484dfcSTim Harvey }; 522ef484dfcSTim Harvey 523ef484dfcSTim Harvey LDO4 { 524ef484dfcSTim Harvey regulator-name = "ldo4"; 525ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 526ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 527ef484dfcSTim Harvey regulator-boot-on; 528ef484dfcSTim Harvey regulator-always-on; 529ef484dfcSTim Harvey }; 530ef484dfcSTim Harvey 531ef484dfcSTim Harvey LDO6 { 532ef484dfcSTim Harvey regulator-name = "ldo6"; 533ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 534ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 535ef484dfcSTim Harvey regulator-boot-on; 536ef484dfcSTim Harvey regulator-always-on; 537ef484dfcSTim Harvey }; 538ef484dfcSTim Harvey }; 539ef484dfcSTim Harvey }; 540ef484dfcSTim Harvey 541ef484dfcSTim Harvey eeprom@50 { 542ef484dfcSTim Harvey compatible = "atmel,24c02"; 543ef484dfcSTim Harvey reg = <0x50>; 544ef484dfcSTim Harvey pagesize = <16>; 545ef484dfcSTim Harvey }; 546ef484dfcSTim Harvey 547ef484dfcSTim Harvey eeprom@51 { 548ef484dfcSTim Harvey compatible = "atmel,24c02"; 549ef484dfcSTim Harvey reg = <0x51>; 550ef484dfcSTim Harvey pagesize = <16>; 551ef484dfcSTim Harvey }; 552ef484dfcSTim Harvey 553ef484dfcSTim Harvey eeprom@52 { 554ef484dfcSTim Harvey compatible = "atmel,24c02"; 555ef484dfcSTim Harvey reg = <0x52>; 556ef484dfcSTim Harvey pagesize = <16>; 557ef484dfcSTim Harvey }; 558ef484dfcSTim Harvey 559ef484dfcSTim Harvey eeprom@53 { 560ef484dfcSTim Harvey compatible = "atmel,24c02"; 561ef484dfcSTim Harvey reg = <0x53>; 562ef484dfcSTim Harvey pagesize = <16>; 563ef484dfcSTim Harvey }; 564ef484dfcSTim Harvey 565ef484dfcSTim Harvey rtc@68 { 566ef484dfcSTim Harvey compatible = "dallas,ds1672"; 567ef484dfcSTim Harvey reg = <0x68>; 568ef484dfcSTim Harvey }; 569ef484dfcSTim Harvey}; 570ef484dfcSTim Harvey 571ef484dfcSTim Harvey&i2c2 { 572ef484dfcSTim Harvey clock-frequency = <400000>; 57319d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 574ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c2>; 57519d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c2_gpio>; 57619d0fc9eSTim Harvey scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 57719d0fc9eSTim Harvey sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 578ef484dfcSTim Harvey status = "okay"; 579ef484dfcSTim Harvey 580ef484dfcSTim Harvey accelerometer@19 { 581ef484dfcSTim Harvey compatible = "st,lis2de12"; 582ef484dfcSTim Harvey pinctrl-names = "default"; 583ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_accel>; 584ef484dfcSTim Harvey reg = <0x19>; 585ef484dfcSTim Harvey st,drdy-int-pin = <1>; 586ef484dfcSTim Harvey interrupt-parent = <&gpio1>; 587ef484dfcSTim Harvey interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 588ef484dfcSTim Harvey interrupt-names = "INT1"; 589ef484dfcSTim Harvey }; 590ef484dfcSTim Harvey}; 591ef484dfcSTim Harvey 592ef484dfcSTim Harvey/* off-board header */ 593ef484dfcSTim Harvey&i2c3 { 594ef484dfcSTim Harvey clock-frequency = <400000>; 59519d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 596ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c3>; 59719d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c3_gpio>; 59819d0fc9eSTim Harvey scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 59919d0fc9eSTim Harvey sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 600ef484dfcSTim Harvey status = "okay"; 601ef484dfcSTim Harvey}; 602ef484dfcSTim Harvey 603ef484dfcSTim Harvey/* off-board header */ 604ef484dfcSTim Harvey&i2c4 { 605ef484dfcSTim Harvey clock-frequency = <400000>; 60619d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 607ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c4>; 60819d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c4_gpio>; 60919d0fc9eSTim Harvey scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 61019d0fc9eSTim Harvey sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 611ef484dfcSTim Harvey status = "okay"; 612ef484dfcSTim Harvey}; 613ef484dfcSTim Harvey 614afb424b9STim Harvey&pcie_phy { 615afb424b9STim Harvey fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 616afb424b9STim Harvey fsl,clkreq-unsupported; 617bf198e2eSTim Harvey clocks = <&pcie0_refclk>; 618bf198e2eSTim Harvey clock-names = "ref"; 619afb424b9STim Harvey status = "okay"; 620afb424b9STim Harvey}; 621afb424b9STim Harvey 622afb424b9STim Harvey&pcie0 { 623afb424b9STim Harvey pinctrl-names = "default"; 624afb424b9STim Harvey pinctrl-0 = <&pinctrl_pcie0>; 625afb424b9STim Harvey reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>; 6263c033fb1SMarek Vasut clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, 6273c033fb1SMarek Vasut <&clk IMX8MM_CLK_PCIE1_AUX>; 628afb424b9STim Harvey assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, 629afb424b9STim Harvey <&clk IMX8MM_CLK_PCIE1_CTRL>; 630afb424b9STim Harvey assigned-clock-rates = <10000000>, <250000000>; 631afb424b9STim Harvey assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, 632afb424b9STim Harvey <&clk IMX8MM_SYS_PLL2_250M>; 633afb424b9STim Harvey status = "okay"; 634afb424b9STim Harvey 635afb424b9STim Harvey pcie@0,0 { 636afb424b9STim Harvey reg = <0x0000 0 0 0 0>; 637afb424b9STim Harvey #address-cells = <1>; 638afb424b9STim Harvey #size-cells = <0>; 639afb424b9STim Harvey 640afb424b9STim Harvey eth1: pcie@1,0 { 641afb424b9STim Harvey reg = <0x0000 0 0 0 0>; 642afb424b9STim Harvey #address-cells = <1>; 643afb424b9STim Harvey #size-cells = <0>; 644afb424b9STim Harvey 645afb424b9STim Harvey local-mac-address = [00 00 00 00 00 00]; 646afb424b9STim Harvey }; 647afb424b9STim Harvey }; 648afb424b9STim Harvey}; 649afb424b9STim Harvey 650ef484dfcSTim Harvey/* off-board header */ 651ef484dfcSTim Harvey&sai3 { 652ef484dfcSTim Harvey pinctrl-names = "default"; 653ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_sai3>; 654ef484dfcSTim Harvey assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 655ef484dfcSTim Harvey assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 656ef484dfcSTim Harvey assigned-clock-rates = <24576000>; 657ef484dfcSTim Harvey status = "okay"; 658ef484dfcSTim Harvey}; 659ef484dfcSTim Harvey 660ef484dfcSTim Harvey/* RS232/RS485/RS422 selectable */ 661ef484dfcSTim Harvey&uart1 { 662ef484dfcSTim Harvey pinctrl-names = "default"; 663ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; 664ef484dfcSTim Harvey rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; 6659635b713STim Harvey cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 666ef484dfcSTim Harvey status = "okay"; 667ef484dfcSTim Harvey}; 668ef484dfcSTim Harvey 669ef484dfcSTim Harvey/* RS232 console */ 670ef484dfcSTim Harvey&uart2 { 671ef484dfcSTim Harvey pinctrl-names = "default"; 672ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart2>; 673ef484dfcSTim Harvey status = "okay"; 674ef484dfcSTim Harvey}; 675ef484dfcSTim Harvey 676ef484dfcSTim Harvey/* bluetooth HCI */ 677ef484dfcSTim Harvey&uart3 { 678ef484dfcSTim Harvey pinctrl-names = "default"; 679ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; 680ef484dfcSTim Harvey rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 681ef484dfcSTim Harvey cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 682ef484dfcSTim Harvey status = "okay"; 683ef484dfcSTim Harvey 684ef484dfcSTim Harvey bluetooth { 685ef484dfcSTim Harvey compatible = "brcm,bcm4330-bt"; 686ef484dfcSTim Harvey shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 687ef484dfcSTim Harvey }; 688ef484dfcSTim Harvey}; 689ef484dfcSTim Harvey 690ef484dfcSTim Harvey/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */ 691ef484dfcSTim Harvey&uart4 { 692ef484dfcSTim Harvey pinctrl-names = "default"; 693ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart4>; 694ef484dfcSTim Harvey rts-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 695ef484dfcSTim Harvey cts-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; 696ef484dfcSTim Harvey dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; 697ef484dfcSTim Harvey dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; 698ef484dfcSTim Harvey dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; 699ef484dfcSTim Harvey status = "okay"; 700ef484dfcSTim Harvey}; 701ef484dfcSTim Harvey 702ef484dfcSTim Harvey&usbotg1 { 703ef484dfcSTim Harvey dr_mode = "host"; 704ef484dfcSTim Harvey vbus-supply = <®_usb1_vbus>; 705ef484dfcSTim Harvey disable-over-current; 706ef484dfcSTim Harvey status = "okay"; 707ef484dfcSTim Harvey}; 708ef484dfcSTim Harvey 709ef484dfcSTim Harvey&usbotg2 { 710ef484dfcSTim Harvey dr_mode = "host"; 711ef484dfcSTim Harvey disable-over-current; 712ef484dfcSTim Harvey status = "okay"; 713ef484dfcSTim Harvey}; 714ef484dfcSTim Harvey 715ef484dfcSTim Harvey/* SDIO WiFi */ 716ef484dfcSTim Harvey&usdhc2 { 717efdb4d23STim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 718ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc2>; 719efdb4d23STim Harvey pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 720efdb4d23STim Harvey pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 721ef484dfcSTim Harvey bus-width = <4>; 722ef484dfcSTim Harvey non-removable; 723ef484dfcSTim Harvey vmmc-supply = <®_wifi>; 724efdb4d23STim Harvey #address-cells = <1>; 725efdb4d23STim Harvey #size-cells = <0>; 726ef484dfcSTim Harvey status = "okay"; 727efdb4d23STim Harvey 728efdb4d23STim Harvey wifi@0 { 729*e4f7fbf7SFabio Estevam compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac"; 730efdb4d23STim Harvey reg = <0>; 731efdb4d23STim Harvey }; 732ef484dfcSTim Harvey}; 733ef484dfcSTim Harvey 734ef484dfcSTim Harvey/* eMMC */ 735ef484dfcSTim Harvey&usdhc3 { 736ef484dfcSTim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 737ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc3>; 738ef484dfcSTim Harvey pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 739ef484dfcSTim Harvey pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 740ef484dfcSTim Harvey bus-width = <8>; 741ef484dfcSTim Harvey non-removable; 742ef484dfcSTim Harvey status = "okay"; 743ef484dfcSTim Harvey}; 744ef484dfcSTim Harvey 745ef484dfcSTim Harvey&wdog1 { 746ef484dfcSTim Harvey pinctrl-names = "default"; 747ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_wdog>; 748ef484dfcSTim Harvey fsl,ext-reset-output; 749ef484dfcSTim Harvey status = "okay"; 750ef484dfcSTim Harvey}; 751ef484dfcSTim Harvey 752ef484dfcSTim Harvey&iomuxc { 753ef484dfcSTim Harvey pinctrl-names = "default"; 754ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_hog>; 755ef484dfcSTim Harvey 756ef484dfcSTim Harvey pinctrl_hog: hoggrp { 757ef484dfcSTim Harvey fsl,pins = < 758ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ 759e59418a4STim Harvey MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x40000041 /* M2_PWR_EN */ 7609d46d9f7STim Harvey MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */ 761ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ 762ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ 763e59418a4STim Harvey MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x40000041 /* LTE_INT */ 764e59418a4STim Harvey MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x40000041 /* LTE_RST# */ 765e59418a4STim Harvey MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x40000041 /* LTE_PWR */ 766ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */ 767ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x40000041 /* AMP GPIO2 */ 768ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x40000041 /* AMP GPIO3 */ 769ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x40000041 /* AMP_GPIO4 */ 770ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ 771e59418a4STim Harvey MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x40000041 /* VDD_4P0_EN */ 772ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */ 773ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */ 774ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */ 775ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */ 776ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */ 777ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */ 778ef484dfcSTim Harvey >; 779ef484dfcSTim Harvey }; 780ef484dfcSTim Harvey 781ef484dfcSTim Harvey pinctrl_accel: accelgrp { 782ef484dfcSTim Harvey fsl,pins = < 783ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159 784ef484dfcSTim Harvey >; 785ef484dfcSTim Harvey }; 786ef484dfcSTim Harvey 787ef484dfcSTim Harvey pinctrl_fec1: fec1grp { 788ef484dfcSTim Harvey fsl,pins = < 789ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 790ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 791ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 792ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 793ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 794ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 795ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 796ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 797ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 798ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 799ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 800ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 801ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 802ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 803ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */ 804ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */ 805ef484dfcSTim Harvey >; 806ef484dfcSTim Harvey }; 807ef484dfcSTim Harvey 808ef484dfcSTim Harvey pinctrl_gsc: gscgrp { 809ef484dfcSTim Harvey fsl,pins = < 810ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40 811ef484dfcSTim Harvey >; 812ef484dfcSTim Harvey }; 813ef484dfcSTim Harvey 814ef484dfcSTim Harvey pinctrl_i2c1: i2c1grp { 815ef484dfcSTim Harvey fsl,pins = < 816ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 817ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 818ef484dfcSTim Harvey >; 819ef484dfcSTim Harvey }; 820ef484dfcSTim Harvey 82119d0fc9eSTim Harvey pinctrl_i2c1_gpio: i2c1gpiogrp { 82219d0fc9eSTim Harvey fsl,pins = < 82319d0fc9eSTim Harvey MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3 82419d0fc9eSTim Harvey MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3 82519d0fc9eSTim Harvey >; 82619d0fc9eSTim Harvey }; 82719d0fc9eSTim Harvey 828ef484dfcSTim Harvey pinctrl_i2c2: i2c2grp { 829ef484dfcSTim Harvey fsl,pins = < 830ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 831ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 832ef484dfcSTim Harvey >; 833ef484dfcSTim Harvey }; 834ef484dfcSTim Harvey 83519d0fc9eSTim Harvey pinctrl_i2c2_gpio: i2c2gpiogrp { 83619d0fc9eSTim Harvey fsl,pins = < 83719d0fc9eSTim Harvey MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3 83819d0fc9eSTim Harvey MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3 83919d0fc9eSTim Harvey >; 84019d0fc9eSTim Harvey }; 84119d0fc9eSTim Harvey 842ef484dfcSTim Harvey pinctrl_i2c3: i2c3grp { 843ef484dfcSTim Harvey fsl,pins = < 844ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 845ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 846ef484dfcSTim Harvey >; 847ef484dfcSTim Harvey }; 848ef484dfcSTim Harvey 84919d0fc9eSTim Harvey pinctrl_i2c3_gpio: i2c3gpiogrp { 85019d0fc9eSTim Harvey fsl,pins = < 85119d0fc9eSTim Harvey MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001c3 85219d0fc9eSTim Harvey MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001c3 85319d0fc9eSTim Harvey >; 85419d0fc9eSTim Harvey }; 85519d0fc9eSTim Harvey 856ef484dfcSTim Harvey pinctrl_i2c4: i2c4grp { 857ef484dfcSTim Harvey fsl,pins = < 858ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 859ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 860ef484dfcSTim Harvey >; 861ef484dfcSTim Harvey }; 862ef484dfcSTim Harvey 86319d0fc9eSTim Harvey pinctrl_i2c4_gpio: i2c4gpiogrp { 86419d0fc9eSTim Harvey fsl,pins = < 86519d0fc9eSTim Harvey MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x400001c3 86619d0fc9eSTim Harvey MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x400001c3 86719d0fc9eSTim Harvey >; 86819d0fc9eSTim Harvey }; 86919d0fc9eSTim Harvey 870ef484dfcSTim Harvey pinctrl_gpio_leds: gpioledgrp { 871ef484dfcSTim Harvey fsl,pins = < 872ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 873ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 874ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 875ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 876ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 877ef484dfcSTim Harvey >; 878ef484dfcSTim Harvey }; 879ef484dfcSTim Harvey 880afb424b9STim Harvey pinctrl_pcie0: pciegrp { 881afb424b9STim Harvey fsl,pins = < 882afb424b9STim Harvey MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x41 883afb424b9STim Harvey >; 884afb424b9STim Harvey }; 885afb424b9STim Harvey 886ef484dfcSTim Harvey pinctrl_pmic: pmicgrp { 887ef484dfcSTim Harvey fsl,pins = < 888ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41 889ef484dfcSTim Harvey >; 890ef484dfcSTim Harvey }; 891ef484dfcSTim Harvey 892ef484dfcSTim Harvey pinctrl_pps: ppsgrp { 893ef484dfcSTim Harvey fsl,pins = < 894ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */ 895ef484dfcSTim Harvey >; 896ef484dfcSTim Harvey }; 897ef484dfcSTim Harvey 898ef484dfcSTim Harvey pinctrl_reg_wl: regwlgrp { 899ef484dfcSTim Harvey fsl,pins = < 900ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */ 901ef484dfcSTim Harvey >; 902ef484dfcSTim Harvey }; 903ef484dfcSTim Harvey 904ef484dfcSTim Harvey pinctrl_reg_usb1: regusb1grp { 905ef484dfcSTim Harvey fsl,pins = < 906ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41 907ef484dfcSTim Harvey >; 908ef484dfcSTim Harvey }; 909ef484dfcSTim Harvey 910ef484dfcSTim Harvey pinctrl_sai3: sai3grp { 911ef484dfcSTim Harvey fsl,pins = < 912ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 913ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 914ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 915ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 916ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 917ef484dfcSTim Harvey >; 918ef484dfcSTim Harvey }; 919ef484dfcSTim Harvey 920ef484dfcSTim Harvey pinctrl_spi1: spi1grp { 921ef484dfcSTim Harvey fsl,pins = < 922ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 923ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 924ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 925ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40 926ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */ 927ef484dfcSTim Harvey >; 928ef484dfcSTim Harvey }; 929ef484dfcSTim Harvey 930ef484dfcSTim Harvey pinctrl_spi2: spi2grp { 931ef484dfcSTim Harvey fsl,pins = < 932ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 933ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 934ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 935ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */ 936ef484dfcSTim Harvey >; 937ef484dfcSTim Harvey }; 938ef484dfcSTim Harvey 939ef484dfcSTim Harvey pinctrl_uart1: uart1grp { 940ef484dfcSTim Harvey fsl,pins = < 941ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 942ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 943ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x140 /* RTS */ 944ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x140 /* CTS */ 945ef484dfcSTim Harvey >; 946ef484dfcSTim Harvey }; 947ef484dfcSTim Harvey 948ef484dfcSTim Harvey pinctrl_uart1_gpio: uart1gpiogrp { 949ef484dfcSTim Harvey fsl,pins = < 950ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */ 951ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */ 952ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */ 953ef484dfcSTim Harvey >; 954ef484dfcSTim Harvey }; 955ef484dfcSTim Harvey 956ef484dfcSTim Harvey pinctrl_uart2: uart2grp { 957ef484dfcSTim Harvey fsl,pins = < 958ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 959ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 960ef484dfcSTim Harvey >; 961ef484dfcSTim Harvey }; 962ef484dfcSTim Harvey 963ef484dfcSTim Harvey pinctrl_uart3_gpio: uart3_gpiogrp { 964ef484dfcSTim Harvey fsl,pins = < 965ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */ 966ef484dfcSTim Harvey >; 967ef484dfcSTim Harvey }; 968ef484dfcSTim Harvey 969ef484dfcSTim Harvey pinctrl_uart3: uart3grp { 970ef484dfcSTim Harvey fsl,pins = < 971ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 972ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 973ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */ 974ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */ 975ef484dfcSTim Harvey >; 976ef484dfcSTim Harvey }; 977ef484dfcSTim Harvey 978ef484dfcSTim Harvey pinctrl_uart4: uart4grp { 979ef484dfcSTim Harvey fsl,pins = < 980ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 981ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 982ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x140 /* CTS */ 983ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x140 /* RTS */ 984ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x140 /* DTR */ 985ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x140 /* DSR */ 986ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x140 /* DCD */ 987ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x140 /* RI */ 988ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x140 /* GNSS_PPS */ 989ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */ 990ef484dfcSTim Harvey >; 991ef484dfcSTim Harvey }; 992ef484dfcSTim Harvey 993ef484dfcSTim Harvey pinctrl_usdhc2: usdhc2grp { 994ef484dfcSTim Harvey fsl,pins = < 995ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 996ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 997ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 998ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 999ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 1000ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 1001ef484dfcSTim Harvey >; 1002ef484dfcSTim Harvey }; 1003ef484dfcSTim Harvey 1004efdb4d23STim Harvey pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 1005efdb4d23STim Harvey fsl,pins = < 1006efdb4d23STim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 1007efdb4d23STim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 1008efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 1009efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 1010efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 1011efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 1012efdb4d23STim Harvey >; 1013efdb4d23STim Harvey }; 1014efdb4d23STim Harvey 1015efdb4d23STim Harvey pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 1016efdb4d23STim Harvey fsl,pins = < 1017efdb4d23STim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 1018efdb4d23STim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 1019efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 1020efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 1021efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 1022efdb4d23STim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 1023efdb4d23STim Harvey >; 1024efdb4d23STim Harvey }; 1025efdb4d23STim Harvey 1026ef484dfcSTim Harvey pinctrl_usdhc3: usdhc3grp { 1027ef484dfcSTim Harvey fsl,pins = < 1028ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 1029ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 1030ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 1031ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 1032ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 1033ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 1034ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 1035ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 1036ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 1037ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 1038ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 1039ef484dfcSTim Harvey >; 1040ef484dfcSTim Harvey }; 1041ef484dfcSTim Harvey 1042ef484dfcSTim Harvey pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 1043ef484dfcSTim Harvey fsl,pins = < 1044ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 1045ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 1046ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 1047ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 1048ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 1049ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 1050ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 1051ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 1052ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 1053ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 1054ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 1055ef484dfcSTim Harvey >; 1056ef484dfcSTim Harvey }; 1057ef484dfcSTim Harvey 1058ef484dfcSTim Harvey pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 1059ef484dfcSTim Harvey fsl,pins = < 1060ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 1061ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 1062ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 1063ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 1064ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 1065ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 1066ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 1067ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 1068ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 1069ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 1070ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 1071ef484dfcSTim Harvey >; 1072ef484dfcSTim Harvey }; 1073ef484dfcSTim Harvey 1074ef484dfcSTim Harvey pinctrl_wdog: wdoggrp { 1075ef484dfcSTim Harvey fsl,pins = < 1076ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 1077ef484dfcSTim Harvey >; 1078ef484dfcSTim Harvey }; 1079ef484dfcSTim Harvey}; 1080