1ef484dfcSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2ef484dfcSTim Harvey/* 3ef484dfcSTim Harvey * Copyright 2021 Gateworks Corporation 4ef484dfcSTim Harvey */ 5ef484dfcSTim Harvey 6ef484dfcSTim Harvey/dts-v1/; 7ef484dfcSTim Harvey 8ef484dfcSTim Harvey#include <dt-bindings/gpio/gpio.h> 9ef484dfcSTim Harvey#include <dt-bindings/input/linux-event-codes.h> 10ef484dfcSTim Harvey#include <dt-bindings/leds/common.h> 11ef484dfcSTim Harvey#include <dt-bindings/net/ti-dp83867.h> 12*afb424b9STim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h> 13ef484dfcSTim Harvey 14ef484dfcSTim Harvey#include "imx8mm.dtsi" 15ef484dfcSTim Harvey 16ef484dfcSTim Harvey/ { 17ef484dfcSTim Harvey model = "Gateworks Venice GW7902 i.MX8MM board"; 18ef484dfcSTim Harvey compatible = "gw,imx8mm-gw7902", "fsl,imx8mm"; 19ef484dfcSTim Harvey 20ef484dfcSTim Harvey aliases { 21*afb424b9STim Harvey ethernet1 = ð1; 22ef484dfcSTim Harvey usb0 = &usbotg1; 23ef484dfcSTim Harvey usb1 = &usbotg2; 24ef484dfcSTim Harvey }; 25ef484dfcSTim Harvey 26ef484dfcSTim Harvey chosen { 27ef484dfcSTim Harvey stdout-path = &uart2; 28ef484dfcSTim Harvey }; 29ef484dfcSTim Harvey 30ef484dfcSTim Harvey memory@40000000 { 31ef484dfcSTim Harvey device_type = "memory"; 32ef484dfcSTim Harvey reg = <0x0 0x40000000 0 0x80000000>; 33ef484dfcSTim Harvey }; 34ef484dfcSTim Harvey 35ef484dfcSTim Harvey can20m: can20m { 36ef484dfcSTim Harvey compatible = "fixed-clock"; 37ef484dfcSTim Harvey #clock-cells = <0>; 38ef484dfcSTim Harvey clock-frequency = <20000000>; 39ef484dfcSTim Harvey clock-output-names = "can20m"; 40ef484dfcSTim Harvey }; 41ef484dfcSTim Harvey 42ef484dfcSTim Harvey gpio-keys { 43ef484dfcSTim Harvey compatible = "gpio-keys"; 44ef484dfcSTim Harvey 45ef484dfcSTim Harvey user-pb { 46ef484dfcSTim Harvey label = "user_pb"; 47ef484dfcSTim Harvey gpios = <&gpio 2 GPIO_ACTIVE_LOW>; 48ef484dfcSTim Harvey linux,code = <BTN_0>; 49ef484dfcSTim Harvey }; 50ef484dfcSTim Harvey 51ef484dfcSTim Harvey user-pb1x { 52ef484dfcSTim Harvey label = "user_pb1x"; 53ef484dfcSTim Harvey linux,code = <BTN_1>; 54ef484dfcSTim Harvey interrupt-parent = <&gsc>; 55ef484dfcSTim Harvey interrupts = <0>; 56ef484dfcSTim Harvey }; 57ef484dfcSTim Harvey 58ef484dfcSTim Harvey key-erased { 59ef484dfcSTim Harvey label = "key_erased"; 60ef484dfcSTim Harvey linux,code = <BTN_2>; 61ef484dfcSTim Harvey interrupt-parent = <&gsc>; 62ef484dfcSTim Harvey interrupts = <1>; 63ef484dfcSTim Harvey }; 64ef484dfcSTim Harvey 65ef484dfcSTim Harvey eeprom-wp { 66ef484dfcSTim Harvey label = "eeprom_wp"; 67ef484dfcSTim Harvey linux,code = <BTN_3>; 68ef484dfcSTim Harvey interrupt-parent = <&gsc>; 69ef484dfcSTim Harvey interrupts = <2>; 70ef484dfcSTim Harvey }; 71ef484dfcSTim Harvey 72ef484dfcSTim Harvey tamper { 73ef484dfcSTim Harvey label = "tamper"; 74ef484dfcSTim Harvey linux,code = <BTN_4>; 75ef484dfcSTim Harvey interrupt-parent = <&gsc>; 76ef484dfcSTim Harvey interrupts = <5>; 77ef484dfcSTim Harvey }; 78ef484dfcSTim Harvey 79ef484dfcSTim Harvey switch-hold { 80ef484dfcSTim Harvey label = "switch_hold"; 81ef484dfcSTim Harvey linux,code = <BTN_5>; 82ef484dfcSTim Harvey interrupt-parent = <&gsc>; 83ef484dfcSTim Harvey interrupts = <7>; 84ef484dfcSTim Harvey }; 85ef484dfcSTim Harvey }; 86ef484dfcSTim Harvey 87ef484dfcSTim Harvey led-controller { 88ef484dfcSTim Harvey compatible = "gpio-leds"; 89ef484dfcSTim Harvey pinctrl-names = "default"; 90ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 91ef484dfcSTim Harvey 92ef484dfcSTim Harvey led-0 { 93ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 94ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 95ef484dfcSTim Harvey label = "panel1"; 96ef484dfcSTim Harvey gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 97ef484dfcSTim Harvey default-state = "off"; 98ef484dfcSTim Harvey }; 99ef484dfcSTim Harvey 100ef484dfcSTim Harvey led-1 { 101ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 102ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 103ef484dfcSTim Harvey label = "panel2"; 104ef484dfcSTim Harvey gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 105ef484dfcSTim Harvey default-state = "off"; 106ef484dfcSTim Harvey }; 107ef484dfcSTim Harvey 108ef484dfcSTim Harvey led-2 { 109ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 110ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 111ef484dfcSTim Harvey label = "panel3"; 112ef484dfcSTim Harvey gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 113ef484dfcSTim Harvey default-state = "off"; 114ef484dfcSTim Harvey }; 115ef484dfcSTim Harvey 116ef484dfcSTim Harvey led-3 { 117ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 118ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 119ef484dfcSTim Harvey label = "panel4"; 120ef484dfcSTim Harvey gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 121ef484dfcSTim Harvey default-state = "off"; 122ef484dfcSTim Harvey }; 123ef484dfcSTim Harvey 124ef484dfcSTim Harvey led-4 { 125ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 126ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 127ef484dfcSTim Harvey label = "panel5"; 128ef484dfcSTim Harvey gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 129ef484dfcSTim Harvey default-state = "off"; 130ef484dfcSTim Harvey }; 131ef484dfcSTim Harvey }; 132ef484dfcSTim Harvey 133*afb424b9STim Harvey pcie0_refclk: pcie0-refclk { 134*afb424b9STim Harvey compatible = "fixed-clock"; 135*afb424b9STim Harvey #clock-cells = <0>; 136*afb424b9STim Harvey clock-frequency = <100000000>; 137*afb424b9STim Harvey }; 138*afb424b9STim Harvey 139ef484dfcSTim Harvey pps { 140ef484dfcSTim Harvey compatible = "pps-gpio"; 141ef484dfcSTim Harvey pinctrl-names = "default"; 142ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pps>; 143ef484dfcSTim Harvey gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 144ef484dfcSTim Harvey status = "okay"; 145ef484dfcSTim Harvey }; 146ef484dfcSTim Harvey 147ef484dfcSTim Harvey reg_3p3v: regulator-3p3v { 148ef484dfcSTim Harvey compatible = "regulator-fixed"; 149ef484dfcSTim Harvey regulator-name = "3P3V"; 150ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 151ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 152ef484dfcSTim Harvey regulator-always-on; 153ef484dfcSTim Harvey }; 154ef484dfcSTim Harvey 155ef484dfcSTim Harvey reg_usb1_vbus: regulator-usb1 { 156ef484dfcSTim Harvey compatible = "regulator-fixed"; 157ef484dfcSTim Harvey pinctrl-names = "default"; 158ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_usb1>; 159ef484dfcSTim Harvey regulator-name = "usb_usb1_vbus"; 160ef484dfcSTim Harvey gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; 161ef484dfcSTim Harvey enable-active-high; 162ef484dfcSTim Harvey regulator-min-microvolt = <5000000>; 163ef484dfcSTim Harvey regulator-max-microvolt = <5000000>; 164ef484dfcSTim Harvey }; 165ef484dfcSTim Harvey 166ef484dfcSTim Harvey reg_wifi: regulator-wifi { 167ef484dfcSTim Harvey compatible = "regulator-fixed"; 168ef484dfcSTim Harvey pinctrl-names = "default"; 169ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_wl>; 170ef484dfcSTim Harvey regulator-name = "wifi"; 171ef484dfcSTim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 172ef484dfcSTim Harvey enable-active-high; 173ef484dfcSTim Harvey startup-delay-us = <100>; 174ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 175ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 176ef484dfcSTim Harvey }; 177ef484dfcSTim Harvey}; 178ef484dfcSTim Harvey 179ef484dfcSTim Harvey&A53_0 { 180ef484dfcSTim Harvey cpu-supply = <&buck2>; 181ef484dfcSTim Harvey}; 182ef484dfcSTim Harvey 183ef484dfcSTim Harvey&A53_1 { 184ef484dfcSTim Harvey cpu-supply = <&buck2>; 185ef484dfcSTim Harvey}; 186ef484dfcSTim Harvey 187ef484dfcSTim Harvey&A53_2 { 188ef484dfcSTim Harvey cpu-supply = <&buck2>; 189ef484dfcSTim Harvey}; 190ef484dfcSTim Harvey 191ef484dfcSTim Harvey&A53_3 { 192ef484dfcSTim Harvey cpu-supply = <&buck2>; 193ef484dfcSTim Harvey}; 194ef484dfcSTim Harvey 195ef484dfcSTim Harvey&ddrc { 196ef484dfcSTim Harvey operating-points-v2 = <&ddrc_opp_table>; 197ef484dfcSTim Harvey 198ef484dfcSTim Harvey ddrc_opp_table: opp-table { 199ef484dfcSTim Harvey compatible = "operating-points-v2"; 200ef484dfcSTim Harvey 201ef484dfcSTim Harvey opp-25M { 202ef484dfcSTim Harvey opp-hz = /bits/ 64 <25000000>; 203ef484dfcSTim Harvey }; 204ef484dfcSTim Harvey 205ef484dfcSTim Harvey opp-100M { 206ef484dfcSTim Harvey opp-hz = /bits/ 64 <100000000>; 207ef484dfcSTim Harvey }; 208ef484dfcSTim Harvey 209ef484dfcSTim Harvey opp-750M { 210ef484dfcSTim Harvey opp-hz = /bits/ 64 <750000000>; 211ef484dfcSTim Harvey }; 212ef484dfcSTim Harvey }; 213ef484dfcSTim Harvey}; 214ef484dfcSTim Harvey 215ef484dfcSTim Harvey&ecspi1 { 216ef484dfcSTim Harvey pinctrl-names = "default"; 217ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi1>; 218ef484dfcSTim Harvey cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 219ef484dfcSTim Harvey status = "okay"; 220ef484dfcSTim Harvey 221ef484dfcSTim Harvey can@0 { 222ef484dfcSTim Harvey compatible = "microchip,mcp2515"; 223ef484dfcSTim Harvey reg = <0>; 224ef484dfcSTim Harvey clocks = <&can20m>; 225ef484dfcSTim Harvey oscillator-frequency = <20000000>; 226ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 227ef484dfcSTim Harvey interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 228ef484dfcSTim Harvey spi-max-frequency = <10000000>; 229ef484dfcSTim Harvey }; 230ef484dfcSTim Harvey}; 231ef484dfcSTim Harvey 232ef484dfcSTim Harvey/* off-board header */ 233ef484dfcSTim Harvey&ecspi2 { 234ef484dfcSTim Harvey pinctrl-names = "default"; 235ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi2>; 236ef484dfcSTim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 237ef484dfcSTim Harvey status = "okay"; 238ef484dfcSTim Harvey}; 239ef484dfcSTim Harvey 240ef484dfcSTim Harvey&fec1 { 241ef484dfcSTim Harvey pinctrl-names = "default"; 242ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_fec1>; 243ef484dfcSTim Harvey phy-mode = "rgmii-id"; 244ef484dfcSTim Harvey phy-handle = <ðphy0>; 245ef484dfcSTim Harvey local-mac-address = [00 00 00 00 00 00]; 246ef484dfcSTim Harvey status = "okay"; 247ef484dfcSTim Harvey 248ef484dfcSTim Harvey mdio { 249ef484dfcSTim Harvey #address-cells = <1>; 250ef484dfcSTim Harvey #size-cells = <0>; 251ef484dfcSTim Harvey 252ef484dfcSTim Harvey ethphy0: ethernet-phy@0 { 253ef484dfcSTim Harvey compatible = "ethernet-phy-ieee802.3-c22"; 254ef484dfcSTim Harvey reg = <0>; 255ef484dfcSTim Harvey ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 256ef484dfcSTim Harvey ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 257ef484dfcSTim Harvey tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 258ef484dfcSTim Harvey rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 259ef484dfcSTim Harvey }; 260ef484dfcSTim Harvey }; 261ef484dfcSTim Harvey}; 262ef484dfcSTim Harvey 263ef484dfcSTim Harvey&i2c1 { 264ef484dfcSTim Harvey clock-frequency = <100000>; 265ef484dfcSTim Harvey pinctrl-names = "default"; 266ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c1>; 267ef484dfcSTim Harvey status = "okay"; 268ef484dfcSTim Harvey 269ef484dfcSTim Harvey gsc: gsc@20 { 270ef484dfcSTim Harvey compatible = "gw,gsc"; 271ef484dfcSTim Harvey reg = <0x20>; 272ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gsc>; 273ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 274ef484dfcSTim Harvey interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 275ef484dfcSTim Harvey interrupt-controller; 276ef484dfcSTim Harvey #interrupt-cells = <1>; 277ef484dfcSTim Harvey 278ef484dfcSTim Harvey adc { 279ef484dfcSTim Harvey compatible = "gw,gsc-adc"; 280ef484dfcSTim Harvey #address-cells = <1>; 281ef484dfcSTim Harvey #size-cells = <0>; 282ef484dfcSTim Harvey 283ef484dfcSTim Harvey channel@6 { 284ef484dfcSTim Harvey gw,mode = <0>; 285ef484dfcSTim Harvey reg = <0x06>; 286ef484dfcSTim Harvey label = "temp"; 287ef484dfcSTim Harvey }; 288ef484dfcSTim Harvey 289ef484dfcSTim Harvey channel@8 { 290ef484dfcSTim Harvey gw,mode = <1>; 291ef484dfcSTim Harvey reg = <0x08>; 292ef484dfcSTim Harvey label = "vdd_bat"; 293ef484dfcSTim Harvey }; 294ef484dfcSTim Harvey 295ef484dfcSTim Harvey channel@82 { 296ef484dfcSTim Harvey gw,mode = <2>; 297ef484dfcSTim Harvey reg = <0x82>; 298ef484dfcSTim Harvey label = "vin"; 299ef484dfcSTim Harvey gw,voltage-divider-ohms = <22100 1000>; 300ef484dfcSTim Harvey gw,voltage-offset-microvolt = <700000>; 301ef484dfcSTim Harvey }; 302ef484dfcSTim Harvey 303ef484dfcSTim Harvey channel@84 { 304ef484dfcSTim Harvey gw,mode = <2>; 305ef484dfcSTim Harvey reg = <0x84>; 306ef484dfcSTim Harvey label = "vin_4p0"; 307ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 308ef484dfcSTim Harvey }; 309ef484dfcSTim Harvey 310ef484dfcSTim Harvey channel@86 { 311ef484dfcSTim Harvey gw,mode = <2>; 312ef484dfcSTim Harvey reg = <0x86>; 313ef484dfcSTim Harvey label = "vdd_3p3"; 314ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 315ef484dfcSTim Harvey }; 316ef484dfcSTim Harvey 317ef484dfcSTim Harvey channel@88 { 318ef484dfcSTim Harvey gw,mode = <2>; 319ef484dfcSTim Harvey reg = <0x88>; 320ef484dfcSTim Harvey label = "vdd_0p9"; 321ef484dfcSTim Harvey }; 322ef484dfcSTim Harvey 323ef484dfcSTim Harvey channel@8c { 324ef484dfcSTim Harvey gw,mode = <2>; 325ef484dfcSTim Harvey reg = <0x8c>; 326ef484dfcSTim Harvey label = "vdd_soc"; 327ef484dfcSTim Harvey }; 328ef484dfcSTim Harvey 329ef484dfcSTim Harvey channel@8e { 330ef484dfcSTim Harvey gw,mode = <2>; 331ef484dfcSTim Harvey reg = <0x8e>; 332ef484dfcSTim Harvey label = "vdd_arm"; 333ef484dfcSTim Harvey }; 334ef484dfcSTim Harvey 335ef484dfcSTim Harvey channel@90 { 336ef484dfcSTim Harvey gw,mode = <2>; 337ef484dfcSTim Harvey reg = <0x90>; 338ef484dfcSTim Harvey label = "vdd_1p8"; 339ef484dfcSTim Harvey }; 340ef484dfcSTim Harvey 341ef484dfcSTim Harvey channel@92 { 342ef484dfcSTim Harvey gw,mode = <2>; 343ef484dfcSTim Harvey reg = <0x92>; 344ef484dfcSTim Harvey label = "vdd_dram"; 345ef484dfcSTim Harvey }; 346ef484dfcSTim Harvey 347ef484dfcSTim Harvey channel@98 { 348ef484dfcSTim Harvey gw,mode = <2>; 349ef484dfcSTim Harvey reg = <0x98>; 350ef484dfcSTim Harvey label = "vdd_1p0"; 351ef484dfcSTim Harvey }; 352ef484dfcSTim Harvey 353ef484dfcSTim Harvey channel@9a { 354ef484dfcSTim Harvey gw,mode = <2>; 355ef484dfcSTim Harvey reg = <0x9a>; 356ef484dfcSTim Harvey label = "vdd_2p5"; 357ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 358ef484dfcSTim Harvey }; 359ef484dfcSTim Harvey 360ef484dfcSTim Harvey channel@a2 { 361ef484dfcSTim Harvey gw,mode = <2>; 362ef484dfcSTim Harvey reg = <0xa2>; 363ef484dfcSTim Harvey label = "vdd_gsc"; 364ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 365ef484dfcSTim Harvey }; 366ef484dfcSTim Harvey }; 367ef484dfcSTim Harvey }; 368ef484dfcSTim Harvey 369ef484dfcSTim Harvey gpio: gpio@23 { 370ef484dfcSTim Harvey compatible = "nxp,pca9555"; 371ef484dfcSTim Harvey reg = <0x23>; 372ef484dfcSTim Harvey gpio-controller; 373ef484dfcSTim Harvey #gpio-cells = <2>; 374ef484dfcSTim Harvey interrupt-parent = <&gsc>; 375ef484dfcSTim Harvey interrupts = <4>; 376ef484dfcSTim Harvey }; 377ef484dfcSTim Harvey 378ef484dfcSTim Harvey pmic@4b { 379ef484dfcSTim Harvey compatible = "rohm,bd71847"; 380ef484dfcSTim Harvey reg = <0x4b>; 381ef484dfcSTim Harvey pinctrl-names = "default"; 382ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pmic>; 383ef484dfcSTim Harvey interrupt-parent = <&gpio3>; 384ef484dfcSTim Harvey interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 385ef484dfcSTim Harvey rohm,reset-snvs-powered; 386ef484dfcSTim Harvey #clock-cells = <0>; 387ef484dfcSTim Harvey clocks = <&osc_32k 0>; 388ef484dfcSTim Harvey clock-output-names = "clk-32k-out"; 389ef484dfcSTim Harvey 390ef484dfcSTim Harvey regulators { 391ef484dfcSTim Harvey /* vdd_soc: 0.805-0.900V (typ=0.8V) */ 392ef484dfcSTim Harvey BUCK1 { 393ef484dfcSTim Harvey regulator-name = "buck1"; 394ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 395ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 396ef484dfcSTim Harvey regulator-boot-on; 397ef484dfcSTim Harvey regulator-always-on; 398ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 399ef484dfcSTim Harvey }; 400ef484dfcSTim Harvey 401ef484dfcSTim Harvey /* vdd_arm: 0.805-1.0V (typ=0.9V) */ 402ef484dfcSTim Harvey buck2: BUCK2 { 403ef484dfcSTim Harvey regulator-name = "buck2"; 404ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 405ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 406ef484dfcSTim Harvey regulator-boot-on; 407ef484dfcSTim Harvey regulator-always-on; 408ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 409ef484dfcSTim Harvey rohm,dvs-run-voltage = <1000000>; 410ef484dfcSTim Harvey rohm,dvs-idle-voltage = <900000>; 411ef484dfcSTim Harvey }; 412ef484dfcSTim Harvey 413ef484dfcSTim Harvey /* vdd_0p9: 0.805-1.0V (typ=0.9V) */ 414ef484dfcSTim Harvey BUCK3 { 415ef484dfcSTim Harvey regulator-name = "buck3"; 416ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 417ef484dfcSTim Harvey regulator-max-microvolt = <1350000>; 418ef484dfcSTim Harvey regulator-boot-on; 419ef484dfcSTim Harvey regulator-always-on; 420ef484dfcSTim Harvey }; 421ef484dfcSTim Harvey 422ef484dfcSTim Harvey /* vdd_3p3 */ 423ef484dfcSTim Harvey BUCK4 { 424ef484dfcSTim Harvey regulator-name = "buck4"; 425ef484dfcSTim Harvey regulator-min-microvolt = <3000000>; 426ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 427ef484dfcSTim Harvey regulator-boot-on; 428ef484dfcSTim Harvey regulator-always-on; 429ef484dfcSTim Harvey }; 430ef484dfcSTim Harvey 431ef484dfcSTim Harvey /* vdd_1p8 */ 432ef484dfcSTim Harvey BUCK5 { 433ef484dfcSTim Harvey regulator-name = "buck5"; 434ef484dfcSTim Harvey regulator-min-microvolt = <1605000>; 435ef484dfcSTim Harvey regulator-max-microvolt = <1995000>; 436ef484dfcSTim Harvey regulator-boot-on; 437ef484dfcSTim Harvey regulator-always-on; 438ef484dfcSTim Harvey }; 439ef484dfcSTim Harvey 440ef484dfcSTim Harvey /* vdd_dram */ 441ef484dfcSTim Harvey BUCK6 { 442ef484dfcSTim Harvey regulator-name = "buck6"; 443ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 444ef484dfcSTim Harvey regulator-max-microvolt = <1400000>; 445ef484dfcSTim Harvey regulator-boot-on; 446ef484dfcSTim Harvey regulator-always-on; 447ef484dfcSTim Harvey }; 448ef484dfcSTim Harvey 449ef484dfcSTim Harvey /* nvcc_snvs_1p8 */ 450ef484dfcSTim Harvey LDO1 { 451ef484dfcSTim Harvey regulator-name = "ldo1"; 452ef484dfcSTim Harvey regulator-min-microvolt = <1600000>; 453ef484dfcSTim Harvey regulator-max-microvolt = <1900000>; 454ef484dfcSTim Harvey regulator-boot-on; 455ef484dfcSTim Harvey regulator-always-on; 456ef484dfcSTim Harvey }; 457ef484dfcSTim Harvey 458ef484dfcSTim Harvey /* vdd_snvs_0p8 */ 459ef484dfcSTim Harvey LDO2 { 460ef484dfcSTim Harvey regulator-name = "ldo2"; 461ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 462ef484dfcSTim Harvey regulator-max-microvolt = <900000>; 463ef484dfcSTim Harvey regulator-boot-on; 464ef484dfcSTim Harvey regulator-always-on; 465ef484dfcSTim Harvey }; 466ef484dfcSTim Harvey 467ef484dfcSTim Harvey /* vdda_1p8 */ 468ef484dfcSTim Harvey LDO3 { 469ef484dfcSTim Harvey regulator-name = "ldo3"; 470ef484dfcSTim Harvey regulator-min-microvolt = <1800000>; 471ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 472ef484dfcSTim Harvey regulator-boot-on; 473ef484dfcSTim Harvey regulator-always-on; 474ef484dfcSTim Harvey }; 475ef484dfcSTim Harvey 476ef484dfcSTim Harvey LDO4 { 477ef484dfcSTim Harvey regulator-name = "ldo4"; 478ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 479ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 480ef484dfcSTim Harvey regulator-boot-on; 481ef484dfcSTim Harvey regulator-always-on; 482ef484dfcSTim Harvey }; 483ef484dfcSTim Harvey 484ef484dfcSTim Harvey LDO6 { 485ef484dfcSTim Harvey regulator-name = "ldo6"; 486ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 487ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 488ef484dfcSTim Harvey regulator-boot-on; 489ef484dfcSTim Harvey regulator-always-on; 490ef484dfcSTim Harvey }; 491ef484dfcSTim Harvey }; 492ef484dfcSTim Harvey }; 493ef484dfcSTim Harvey 494ef484dfcSTim Harvey eeprom@50 { 495ef484dfcSTim Harvey compatible = "atmel,24c02"; 496ef484dfcSTim Harvey reg = <0x50>; 497ef484dfcSTim Harvey pagesize = <16>; 498ef484dfcSTim Harvey }; 499ef484dfcSTim Harvey 500ef484dfcSTim Harvey eeprom@51 { 501ef484dfcSTim Harvey compatible = "atmel,24c02"; 502ef484dfcSTim Harvey reg = <0x51>; 503ef484dfcSTim Harvey pagesize = <16>; 504ef484dfcSTim Harvey }; 505ef484dfcSTim Harvey 506ef484dfcSTim Harvey eeprom@52 { 507ef484dfcSTim Harvey compatible = "atmel,24c02"; 508ef484dfcSTim Harvey reg = <0x52>; 509ef484dfcSTim Harvey pagesize = <16>; 510ef484dfcSTim Harvey }; 511ef484dfcSTim Harvey 512ef484dfcSTim Harvey eeprom@53 { 513ef484dfcSTim Harvey compatible = "atmel,24c02"; 514ef484dfcSTim Harvey reg = <0x53>; 515ef484dfcSTim Harvey pagesize = <16>; 516ef484dfcSTim Harvey }; 517ef484dfcSTim Harvey 518ef484dfcSTim Harvey rtc@68 { 519ef484dfcSTim Harvey compatible = "dallas,ds1672"; 520ef484dfcSTim Harvey reg = <0x68>; 521ef484dfcSTim Harvey }; 522ef484dfcSTim Harvey}; 523ef484dfcSTim Harvey 524ef484dfcSTim Harvey&i2c2 { 525ef484dfcSTim Harvey clock-frequency = <400000>; 526ef484dfcSTim Harvey pinctrl-names = "default"; 527ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c2>; 528ef484dfcSTim Harvey status = "okay"; 529ef484dfcSTim Harvey 530ef484dfcSTim Harvey accelerometer@19 { 531ef484dfcSTim Harvey compatible = "st,lis2de12"; 532ef484dfcSTim Harvey pinctrl-names = "default"; 533ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_accel>; 534ef484dfcSTim Harvey reg = <0x19>; 535ef484dfcSTim Harvey st,drdy-int-pin = <1>; 536ef484dfcSTim Harvey interrupt-parent = <&gpio1>; 537ef484dfcSTim Harvey interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 538ef484dfcSTim Harvey interrupt-names = "INT1"; 539ef484dfcSTim Harvey }; 540ef484dfcSTim Harvey}; 541ef484dfcSTim Harvey 542ef484dfcSTim Harvey/* off-board header */ 543ef484dfcSTim Harvey&i2c3 { 544ef484dfcSTim Harvey clock-frequency = <400000>; 545ef484dfcSTim Harvey pinctrl-names = "default"; 546ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c3>; 547ef484dfcSTim Harvey status = "okay"; 548ef484dfcSTim Harvey}; 549ef484dfcSTim Harvey 550ef484dfcSTim Harvey/* off-board header */ 551ef484dfcSTim Harvey&i2c4 { 552ef484dfcSTim Harvey clock-frequency = <400000>; 553ef484dfcSTim Harvey pinctrl-names = "default"; 554ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c4>; 555ef484dfcSTim Harvey status = "okay"; 556ef484dfcSTim Harvey}; 557ef484dfcSTim Harvey 558*afb424b9STim Harvey&pcie_phy { 559*afb424b9STim Harvey fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 560*afb424b9STim Harvey fsl,clkreq-unsupported; 561*afb424b9STim Harvey clocks = <&clk IMX8MM_CLK_DUMMY>; 562*afb424b9STim Harvey status = "okay"; 563*afb424b9STim Harvey}; 564*afb424b9STim Harvey 565*afb424b9STim Harvey&pcie0 { 566*afb424b9STim Harvey pinctrl-names = "default"; 567*afb424b9STim Harvey pinctrl-0 = <&pinctrl_pcie0>; 568*afb424b9STim Harvey reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>; 569*afb424b9STim Harvey clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, 570*afb424b9STim Harvey <&clk IMX8MM_CLK_DUMMY>, <&pcie0_refclk>; 571*afb424b9STim Harvey clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; 572*afb424b9STim Harvey assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, 573*afb424b9STim Harvey <&clk IMX8MM_CLK_PCIE1_CTRL>; 574*afb424b9STim Harvey assigned-clock-rates = <10000000>, <250000000>; 575*afb424b9STim Harvey assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, 576*afb424b9STim Harvey <&clk IMX8MM_SYS_PLL2_250M>; 577*afb424b9STim Harvey status = "okay"; 578*afb424b9STim Harvey 579*afb424b9STim Harvey pcie@0,0 { 580*afb424b9STim Harvey reg = <0x0000 0 0 0 0>; 581*afb424b9STim Harvey #address-cells = <1>; 582*afb424b9STim Harvey #size-cells = <0>; 583*afb424b9STim Harvey 584*afb424b9STim Harvey eth1: pcie@1,0 { 585*afb424b9STim Harvey reg = <0x0000 0 0 0 0>; 586*afb424b9STim Harvey #address-cells = <1>; 587*afb424b9STim Harvey #size-cells = <0>; 588*afb424b9STim Harvey 589*afb424b9STim Harvey local-mac-address = [00 00 00 00 00 00]; 590*afb424b9STim Harvey }; 591*afb424b9STim Harvey }; 592*afb424b9STim Harvey}; 593*afb424b9STim Harvey 594ef484dfcSTim Harvey/* off-board header */ 595ef484dfcSTim Harvey&sai3 { 596ef484dfcSTim Harvey pinctrl-names = "default"; 597ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_sai3>; 598ef484dfcSTim Harvey assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 599ef484dfcSTim Harvey assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 600ef484dfcSTim Harvey assigned-clock-rates = <24576000>; 601ef484dfcSTim Harvey status = "okay"; 602ef484dfcSTim Harvey}; 603ef484dfcSTim Harvey 604ef484dfcSTim Harvey/* RS232/RS485/RS422 selectable */ 605ef484dfcSTim Harvey&uart1 { 606ef484dfcSTim Harvey pinctrl-names = "default"; 607ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; 608ef484dfcSTim Harvey rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; 609ef484dfcSTim Harvey cts-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; 610ef484dfcSTim Harvey status = "okay"; 611ef484dfcSTim Harvey}; 612ef484dfcSTim Harvey 613ef484dfcSTim Harvey/* RS232 console */ 614ef484dfcSTim Harvey&uart2 { 615ef484dfcSTim Harvey pinctrl-names = "default"; 616ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart2>; 617ef484dfcSTim Harvey status = "okay"; 618ef484dfcSTim Harvey}; 619ef484dfcSTim Harvey 620ef484dfcSTim Harvey/* bluetooth HCI */ 621ef484dfcSTim Harvey&uart3 { 622ef484dfcSTim Harvey pinctrl-names = "default"; 623ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; 624ef484dfcSTim Harvey rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 625ef484dfcSTim Harvey cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 626ef484dfcSTim Harvey status = "okay"; 627ef484dfcSTim Harvey 628ef484dfcSTim Harvey bluetooth { 629ef484dfcSTim Harvey compatible = "brcm,bcm4330-bt"; 630ef484dfcSTim Harvey shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 631ef484dfcSTim Harvey }; 632ef484dfcSTim Harvey}; 633ef484dfcSTim Harvey 634ef484dfcSTim Harvey/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */ 635ef484dfcSTim Harvey&uart4 { 636ef484dfcSTim Harvey pinctrl-names = "default"; 637ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart4>; 638ef484dfcSTim Harvey rts-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 639ef484dfcSTim Harvey cts-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; 640ef484dfcSTim Harvey dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; 641ef484dfcSTim Harvey dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; 642ef484dfcSTim Harvey dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; 643ef484dfcSTim Harvey status = "okay"; 644ef484dfcSTim Harvey}; 645ef484dfcSTim Harvey 646ef484dfcSTim Harvey&usbotg1 { 647ef484dfcSTim Harvey dr_mode = "host"; 648ef484dfcSTim Harvey vbus-supply = <®_usb1_vbus>; 649ef484dfcSTim Harvey disable-over-current; 650ef484dfcSTim Harvey status = "okay"; 651ef484dfcSTim Harvey}; 652ef484dfcSTim Harvey 653ef484dfcSTim Harvey&usbotg2 { 654ef484dfcSTim Harvey dr_mode = "host"; 655ef484dfcSTim Harvey disable-over-current; 656ef484dfcSTim Harvey status = "okay"; 657ef484dfcSTim Harvey}; 658ef484dfcSTim Harvey 659ef484dfcSTim Harvey/* SDIO WiFi */ 660ef484dfcSTim Harvey&usdhc2 { 661ef484dfcSTim Harvey pinctrl-names = "default"; 662ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc2>; 663ef484dfcSTim Harvey bus-width = <4>; 664ef484dfcSTim Harvey non-removable; 665ef484dfcSTim Harvey vmmc-supply = <®_wifi>; 666ef484dfcSTim Harvey status = "okay"; 667ef484dfcSTim Harvey}; 668ef484dfcSTim Harvey 669ef484dfcSTim Harvey/* eMMC */ 670ef484dfcSTim Harvey&usdhc3 { 671ef484dfcSTim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 672ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc3>; 673ef484dfcSTim Harvey pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 674ef484dfcSTim Harvey pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 675ef484dfcSTim Harvey bus-width = <8>; 676ef484dfcSTim Harvey non-removable; 677ef484dfcSTim Harvey status = "okay"; 678ef484dfcSTim Harvey}; 679ef484dfcSTim Harvey 680ef484dfcSTim Harvey&wdog1 { 681ef484dfcSTim Harvey pinctrl-names = "default"; 682ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_wdog>; 683ef484dfcSTim Harvey fsl,ext-reset-output; 684ef484dfcSTim Harvey status = "okay"; 685ef484dfcSTim Harvey}; 686ef484dfcSTim Harvey 687ef484dfcSTim Harvey&iomuxc { 688ef484dfcSTim Harvey pinctrl-names = "default"; 689ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_hog>; 690ef484dfcSTim Harvey 691ef484dfcSTim Harvey pinctrl_hog: hoggrp { 692ef484dfcSTim Harvey fsl,pins = < 693ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ 6943518441dSTim Harvey MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */ 695ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ 696ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ 697ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */ 698ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x40000041 /* AMP GPIO2 */ 699ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x40000041 /* AMP GPIO3 */ 700ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x40000041 /* AMP_GPIO4 */ 701ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ 702ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */ 703ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */ 704ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */ 705ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */ 706ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */ 707ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */ 708ef484dfcSTim Harvey >; 709ef484dfcSTim Harvey }; 710ef484dfcSTim Harvey 711ef484dfcSTim Harvey pinctrl_accel: accelgrp { 712ef484dfcSTim Harvey fsl,pins = < 713ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159 714ef484dfcSTim Harvey >; 715ef484dfcSTim Harvey }; 716ef484dfcSTim Harvey 717ef484dfcSTim Harvey pinctrl_fec1: fec1grp { 718ef484dfcSTim Harvey fsl,pins = < 719ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 720ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 721ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 722ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 723ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 724ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 725ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 726ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 727ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 728ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 729ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 730ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 731ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 732ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 733ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */ 734ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */ 735ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO08_ENET1_1588_EVENT0_IN 0x141 736ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO09_ENET1_1588_EVENT0_OUT 0x141 737ef484dfcSTim Harvey >; 738ef484dfcSTim Harvey }; 739ef484dfcSTim Harvey 740ef484dfcSTim Harvey pinctrl_gsc: gscgrp { 741ef484dfcSTim Harvey fsl,pins = < 742ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40 743ef484dfcSTim Harvey >; 744ef484dfcSTim Harvey }; 745ef484dfcSTim Harvey 746ef484dfcSTim Harvey pinctrl_i2c1: i2c1grp { 747ef484dfcSTim Harvey fsl,pins = < 748ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 749ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 750ef484dfcSTim Harvey >; 751ef484dfcSTim Harvey }; 752ef484dfcSTim Harvey 753ef484dfcSTim Harvey pinctrl_i2c2: i2c2grp { 754ef484dfcSTim Harvey fsl,pins = < 755ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 756ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 757ef484dfcSTim Harvey >; 758ef484dfcSTim Harvey }; 759ef484dfcSTim Harvey 760ef484dfcSTim Harvey pinctrl_i2c3: i2c3grp { 761ef484dfcSTim Harvey fsl,pins = < 762ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 763ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 764ef484dfcSTim Harvey >; 765ef484dfcSTim Harvey }; 766ef484dfcSTim Harvey 767ef484dfcSTim Harvey pinctrl_i2c4: i2c4grp { 768ef484dfcSTim Harvey fsl,pins = < 769ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 770ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 771ef484dfcSTim Harvey >; 772ef484dfcSTim Harvey }; 773ef484dfcSTim Harvey 774ef484dfcSTim Harvey pinctrl_gpio_leds: gpioledgrp { 775ef484dfcSTim Harvey fsl,pins = < 776ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 777ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 778ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 779ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 780ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 781ef484dfcSTim Harvey >; 782ef484dfcSTim Harvey }; 783ef484dfcSTim Harvey 784*afb424b9STim Harvey pinctrl_pcie0: pciegrp { 785*afb424b9STim Harvey fsl,pins = < 786*afb424b9STim Harvey MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x41 787*afb424b9STim Harvey >; 788*afb424b9STim Harvey }; 789*afb424b9STim Harvey 790ef484dfcSTim Harvey pinctrl_pmic: pmicgrp { 791ef484dfcSTim Harvey fsl,pins = < 792ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41 793ef484dfcSTim Harvey >; 794ef484dfcSTim Harvey }; 795ef484dfcSTim Harvey 796ef484dfcSTim Harvey pinctrl_pps: ppsgrp { 797ef484dfcSTim Harvey fsl,pins = < 798ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */ 799ef484dfcSTim Harvey >; 800ef484dfcSTim Harvey }; 801ef484dfcSTim Harvey 802ef484dfcSTim Harvey pinctrl_reg_wl: regwlgrp { 803ef484dfcSTim Harvey fsl,pins = < 804ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */ 805ef484dfcSTim Harvey >; 806ef484dfcSTim Harvey }; 807ef484dfcSTim Harvey 808ef484dfcSTim Harvey pinctrl_reg_usb1: regusb1grp { 809ef484dfcSTim Harvey fsl,pins = < 810ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41 811ef484dfcSTim Harvey >; 812ef484dfcSTim Harvey }; 813ef484dfcSTim Harvey 814ef484dfcSTim Harvey pinctrl_sai3: sai3grp { 815ef484dfcSTim Harvey fsl,pins = < 816ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 817ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 818ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 819ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 820ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 821ef484dfcSTim Harvey >; 822ef484dfcSTim Harvey }; 823ef484dfcSTim Harvey 824ef484dfcSTim Harvey pinctrl_spi1: spi1grp { 825ef484dfcSTim Harvey fsl,pins = < 826ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 827ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 828ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 829ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40 830ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */ 831ef484dfcSTim Harvey >; 832ef484dfcSTim Harvey }; 833ef484dfcSTim Harvey 834ef484dfcSTim Harvey pinctrl_spi2: spi2grp { 835ef484dfcSTim Harvey fsl,pins = < 836ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 837ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 838ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 839ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */ 840ef484dfcSTim Harvey >; 841ef484dfcSTim Harvey }; 842ef484dfcSTim Harvey 843ef484dfcSTim Harvey pinctrl_uart1: uart1grp { 844ef484dfcSTim Harvey fsl,pins = < 845ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 846ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 847ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x140 /* RTS */ 848ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x140 /* CTS */ 849ef484dfcSTim Harvey >; 850ef484dfcSTim Harvey }; 851ef484dfcSTim Harvey 852ef484dfcSTim Harvey pinctrl_uart1_gpio: uart1gpiogrp { 853ef484dfcSTim Harvey fsl,pins = < 854ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */ 855ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */ 856ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */ 857ef484dfcSTim Harvey >; 858ef484dfcSTim Harvey }; 859ef484dfcSTim Harvey 860ef484dfcSTim Harvey pinctrl_uart2: uart2grp { 861ef484dfcSTim Harvey fsl,pins = < 862ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 863ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 864ef484dfcSTim Harvey >; 865ef484dfcSTim Harvey }; 866ef484dfcSTim Harvey 867ef484dfcSTim Harvey pinctrl_uart3_gpio: uart3_gpiogrp { 868ef484dfcSTim Harvey fsl,pins = < 869ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */ 870ef484dfcSTim Harvey >; 871ef484dfcSTim Harvey }; 872ef484dfcSTim Harvey 873ef484dfcSTim Harvey pinctrl_uart3: uart3grp { 874ef484dfcSTim Harvey fsl,pins = < 875ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 876ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 877ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */ 878ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */ 879ef484dfcSTim Harvey >; 880ef484dfcSTim Harvey }; 881ef484dfcSTim Harvey 882ef484dfcSTim Harvey pinctrl_uart4: uart4grp { 883ef484dfcSTim Harvey fsl,pins = < 884ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 885ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 886ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x140 /* CTS */ 887ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x140 /* RTS */ 888ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x140 /* DTR */ 889ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x140 /* DSR */ 890ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x140 /* DCD */ 891ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x140 /* RI */ 892ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x140 /* GNSS_PPS */ 893ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */ 894ef484dfcSTim Harvey >; 895ef484dfcSTim Harvey }; 896ef484dfcSTim Harvey 897ef484dfcSTim Harvey pinctrl_usdhc2: usdhc2grp { 898ef484dfcSTim Harvey fsl,pins = < 899ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 900ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 901ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 902ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 903ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 904ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 905ef484dfcSTim Harvey >; 906ef484dfcSTim Harvey }; 907ef484dfcSTim Harvey 908ef484dfcSTim Harvey pinctrl_usdhc3: usdhc3grp { 909ef484dfcSTim Harvey fsl,pins = < 910ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 911ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 912ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 913ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 914ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 915ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 916ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 917ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 918ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 919ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 920ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 921ef484dfcSTim Harvey >; 922ef484dfcSTim Harvey }; 923ef484dfcSTim Harvey 924ef484dfcSTim Harvey pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 925ef484dfcSTim Harvey fsl,pins = < 926ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 927ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 928ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 929ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 930ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 931ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 932ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 933ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 934ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 935ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 936ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 937ef484dfcSTim Harvey >; 938ef484dfcSTim Harvey }; 939ef484dfcSTim Harvey 940ef484dfcSTim Harvey pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 941ef484dfcSTim Harvey fsl,pins = < 942ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 943ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 944ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 945ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 946ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 947ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 948ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 949ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 950ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 951ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 952ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 953ef484dfcSTim Harvey >; 954ef484dfcSTim Harvey }; 955ef484dfcSTim Harvey 956ef484dfcSTim Harvey pinctrl_wdog: wdoggrp { 957ef484dfcSTim Harvey fsl,pins = < 958ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 959ef484dfcSTim Harvey >; 960ef484dfcSTim Harvey }; 961ef484dfcSTim Harvey}; 962