1ef484dfcSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2ef484dfcSTim Harvey/* 3ef484dfcSTim Harvey * Copyright 2021 Gateworks Corporation 4ef484dfcSTim Harvey */ 5ef484dfcSTim Harvey 6ef484dfcSTim Harvey/dts-v1/; 7ef484dfcSTim Harvey 8ef484dfcSTim Harvey#include <dt-bindings/gpio/gpio.h> 9ef484dfcSTim Harvey#include <dt-bindings/input/linux-event-codes.h> 10ef484dfcSTim Harvey#include <dt-bindings/leds/common.h> 11ef484dfcSTim Harvey#include <dt-bindings/net/ti-dp83867.h> 12afb424b9STim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h> 13ef484dfcSTim Harvey 14ef484dfcSTim Harvey#include "imx8mm.dtsi" 15ef484dfcSTim Harvey 16ef484dfcSTim Harvey/ { 17ef484dfcSTim Harvey model = "Gateworks Venice GW7902 i.MX8MM board"; 18ef484dfcSTim Harvey compatible = "gw,imx8mm-gw7902", "fsl,imx8mm"; 19ef484dfcSTim Harvey 20ef484dfcSTim Harvey aliases { 21afb424b9STim Harvey ethernet1 = ð1; 22ef484dfcSTim Harvey usb0 = &usbotg1; 23ef484dfcSTim Harvey usb1 = &usbotg2; 24ef484dfcSTim Harvey }; 25ef484dfcSTim Harvey 26ef484dfcSTim Harvey chosen { 27ef484dfcSTim Harvey stdout-path = &uart2; 28ef484dfcSTim Harvey }; 29ef484dfcSTim Harvey 30ef484dfcSTim Harvey memory@40000000 { 31ef484dfcSTim Harvey device_type = "memory"; 32ef484dfcSTim Harvey reg = <0x0 0x40000000 0 0x80000000>; 33ef484dfcSTim Harvey }; 34ef484dfcSTim Harvey 35ef484dfcSTim Harvey can20m: can20m { 36ef484dfcSTim Harvey compatible = "fixed-clock"; 37ef484dfcSTim Harvey #clock-cells = <0>; 38ef484dfcSTim Harvey clock-frequency = <20000000>; 39ef484dfcSTim Harvey clock-output-names = "can20m"; 40ef484dfcSTim Harvey }; 41ef484dfcSTim Harvey 42ef484dfcSTim Harvey gpio-keys { 43ef484dfcSTim Harvey compatible = "gpio-keys"; 44ef484dfcSTim Harvey 45ef484dfcSTim Harvey user-pb { 46ef484dfcSTim Harvey label = "user_pb"; 47ef484dfcSTim Harvey gpios = <&gpio 2 GPIO_ACTIVE_LOW>; 48ef484dfcSTim Harvey linux,code = <BTN_0>; 49ef484dfcSTim Harvey }; 50ef484dfcSTim Harvey 51ef484dfcSTim Harvey user-pb1x { 52ef484dfcSTim Harvey label = "user_pb1x"; 53ef484dfcSTim Harvey linux,code = <BTN_1>; 54ef484dfcSTim Harvey interrupt-parent = <&gsc>; 55ef484dfcSTim Harvey interrupts = <0>; 56ef484dfcSTim Harvey }; 57ef484dfcSTim Harvey 58ef484dfcSTim Harvey key-erased { 59ef484dfcSTim Harvey label = "key_erased"; 60ef484dfcSTim Harvey linux,code = <BTN_2>; 61ef484dfcSTim Harvey interrupt-parent = <&gsc>; 62ef484dfcSTim Harvey interrupts = <1>; 63ef484dfcSTim Harvey }; 64ef484dfcSTim Harvey 65ef484dfcSTim Harvey eeprom-wp { 66ef484dfcSTim Harvey label = "eeprom_wp"; 67ef484dfcSTim Harvey linux,code = <BTN_3>; 68ef484dfcSTim Harvey interrupt-parent = <&gsc>; 69ef484dfcSTim Harvey interrupts = <2>; 70ef484dfcSTim Harvey }; 71ef484dfcSTim Harvey 72ef484dfcSTim Harvey tamper { 73ef484dfcSTim Harvey label = "tamper"; 74ef484dfcSTim Harvey linux,code = <BTN_4>; 75ef484dfcSTim Harvey interrupt-parent = <&gsc>; 76ef484dfcSTim Harvey interrupts = <5>; 77ef484dfcSTim Harvey }; 78ef484dfcSTim Harvey 79ef484dfcSTim Harvey switch-hold { 80ef484dfcSTim Harvey label = "switch_hold"; 81ef484dfcSTim Harvey linux,code = <BTN_5>; 82ef484dfcSTim Harvey interrupt-parent = <&gsc>; 83ef484dfcSTim Harvey interrupts = <7>; 84ef484dfcSTim Harvey }; 85ef484dfcSTim Harvey }; 86ef484dfcSTim Harvey 87ef484dfcSTim Harvey led-controller { 88ef484dfcSTim Harvey compatible = "gpio-leds"; 89ef484dfcSTim Harvey pinctrl-names = "default"; 90ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 91ef484dfcSTim Harvey 92ef484dfcSTim Harvey led-0 { 93ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 94ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 95ef484dfcSTim Harvey label = "panel1"; 96ef484dfcSTim Harvey gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 97ef484dfcSTim Harvey default-state = "off"; 98ef484dfcSTim Harvey }; 99ef484dfcSTim Harvey 100ef484dfcSTim Harvey led-1 { 101ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 102ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 103ef484dfcSTim Harvey label = "panel2"; 104ef484dfcSTim Harvey gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 105ef484dfcSTim Harvey default-state = "off"; 106ef484dfcSTim Harvey }; 107ef484dfcSTim Harvey 108ef484dfcSTim Harvey led-2 { 109ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 110ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 111ef484dfcSTim Harvey label = "panel3"; 112ef484dfcSTim Harvey gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 113ef484dfcSTim Harvey default-state = "off"; 114ef484dfcSTim Harvey }; 115ef484dfcSTim Harvey 116ef484dfcSTim Harvey led-3 { 117ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 118ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 119ef484dfcSTim Harvey label = "panel4"; 120ef484dfcSTim Harvey gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 121ef484dfcSTim Harvey default-state = "off"; 122ef484dfcSTim Harvey }; 123ef484dfcSTim Harvey 124ef484dfcSTim Harvey led-4 { 125ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 126ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 127ef484dfcSTim Harvey label = "panel5"; 128ef484dfcSTim Harvey gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 129ef484dfcSTim Harvey default-state = "off"; 130ef484dfcSTim Harvey }; 131ef484dfcSTim Harvey }; 132ef484dfcSTim Harvey 133afb424b9STim Harvey pcie0_refclk: pcie0-refclk { 134afb424b9STim Harvey compatible = "fixed-clock"; 135afb424b9STim Harvey #clock-cells = <0>; 136afb424b9STim Harvey clock-frequency = <100000000>; 137afb424b9STim Harvey }; 138afb424b9STim Harvey 139ef484dfcSTim Harvey pps { 140ef484dfcSTim Harvey compatible = "pps-gpio"; 141ef484dfcSTim Harvey pinctrl-names = "default"; 142ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pps>; 143ef484dfcSTim Harvey gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 144ef484dfcSTim Harvey status = "okay"; 145ef484dfcSTim Harvey }; 146ef484dfcSTim Harvey 147ef484dfcSTim Harvey reg_3p3v: regulator-3p3v { 148ef484dfcSTim Harvey compatible = "regulator-fixed"; 149ef484dfcSTim Harvey regulator-name = "3P3V"; 150ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 151ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 152ef484dfcSTim Harvey regulator-always-on; 153ef484dfcSTim Harvey }; 154ef484dfcSTim Harvey 155ef484dfcSTim Harvey reg_usb1_vbus: regulator-usb1 { 156ef484dfcSTim Harvey compatible = "regulator-fixed"; 157ef484dfcSTim Harvey pinctrl-names = "default"; 158ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_usb1>; 159ef484dfcSTim Harvey regulator-name = "usb_usb1_vbus"; 160ef484dfcSTim Harvey gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; 161ef484dfcSTim Harvey enable-active-high; 162ef484dfcSTim Harvey regulator-min-microvolt = <5000000>; 163ef484dfcSTim Harvey regulator-max-microvolt = <5000000>; 164ef484dfcSTim Harvey }; 165ef484dfcSTim Harvey 166ef484dfcSTim Harvey reg_wifi: regulator-wifi { 167ef484dfcSTim Harvey compatible = "regulator-fixed"; 168ef484dfcSTim Harvey pinctrl-names = "default"; 169ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_wl>; 170ef484dfcSTim Harvey regulator-name = "wifi"; 171ef484dfcSTim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 172ef484dfcSTim Harvey enable-active-high; 173ef484dfcSTim Harvey startup-delay-us = <100>; 174ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 175ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 176ef484dfcSTim Harvey }; 177ef484dfcSTim Harvey}; 178ef484dfcSTim Harvey 179ef484dfcSTim Harvey&A53_0 { 180ef484dfcSTim Harvey cpu-supply = <&buck2>; 181ef484dfcSTim Harvey}; 182ef484dfcSTim Harvey 183ef484dfcSTim Harvey&A53_1 { 184ef484dfcSTim Harvey cpu-supply = <&buck2>; 185ef484dfcSTim Harvey}; 186ef484dfcSTim Harvey 187ef484dfcSTim Harvey&A53_2 { 188ef484dfcSTim Harvey cpu-supply = <&buck2>; 189ef484dfcSTim Harvey}; 190ef484dfcSTim Harvey 191ef484dfcSTim Harvey&A53_3 { 192ef484dfcSTim Harvey cpu-supply = <&buck2>; 193ef484dfcSTim Harvey}; 194ef484dfcSTim Harvey 195ef484dfcSTim Harvey&ddrc { 196ef484dfcSTim Harvey operating-points-v2 = <&ddrc_opp_table>; 197ef484dfcSTim Harvey 198ef484dfcSTim Harvey ddrc_opp_table: opp-table { 199ef484dfcSTim Harvey compatible = "operating-points-v2"; 200ef484dfcSTim Harvey 201ef484dfcSTim Harvey opp-25M { 202ef484dfcSTim Harvey opp-hz = /bits/ 64 <25000000>; 203ef484dfcSTim Harvey }; 204ef484dfcSTim Harvey 205ef484dfcSTim Harvey opp-100M { 206ef484dfcSTim Harvey opp-hz = /bits/ 64 <100000000>; 207ef484dfcSTim Harvey }; 208ef484dfcSTim Harvey 209ef484dfcSTim Harvey opp-750M { 210ef484dfcSTim Harvey opp-hz = /bits/ 64 <750000000>; 211ef484dfcSTim Harvey }; 212ef484dfcSTim Harvey }; 213ef484dfcSTim Harvey}; 214ef484dfcSTim Harvey 215ef484dfcSTim Harvey&ecspi1 { 216ef484dfcSTim Harvey pinctrl-names = "default"; 217ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi1>; 218ef484dfcSTim Harvey cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 219ef484dfcSTim Harvey status = "okay"; 220ef484dfcSTim Harvey 221ef484dfcSTim Harvey can@0 { 222ef484dfcSTim Harvey compatible = "microchip,mcp2515"; 223ef484dfcSTim Harvey reg = <0>; 224ef484dfcSTim Harvey clocks = <&can20m>; 225ef484dfcSTim Harvey oscillator-frequency = <20000000>; 226ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 227ef484dfcSTim Harvey interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 228ef484dfcSTim Harvey spi-max-frequency = <10000000>; 229ef484dfcSTim Harvey }; 230ef484dfcSTim Harvey}; 231ef484dfcSTim Harvey 232ef484dfcSTim Harvey/* off-board header */ 233ef484dfcSTim Harvey&ecspi2 { 234ef484dfcSTim Harvey pinctrl-names = "default"; 235ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi2>; 236ef484dfcSTim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 237ef484dfcSTim Harvey status = "okay"; 238ef484dfcSTim Harvey}; 239ef484dfcSTim Harvey 240ef484dfcSTim Harvey&fec1 { 241ef484dfcSTim Harvey pinctrl-names = "default"; 242ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_fec1>; 243ef484dfcSTim Harvey phy-mode = "rgmii-id"; 244ef484dfcSTim Harvey phy-handle = <ðphy0>; 245ef484dfcSTim Harvey local-mac-address = [00 00 00 00 00 00]; 246ef484dfcSTim Harvey status = "okay"; 247ef484dfcSTim Harvey 248ef484dfcSTim Harvey mdio { 249ef484dfcSTim Harvey #address-cells = <1>; 250ef484dfcSTim Harvey #size-cells = <0>; 251ef484dfcSTim Harvey 252ef484dfcSTim Harvey ethphy0: ethernet-phy@0 { 253ef484dfcSTim Harvey compatible = "ethernet-phy-ieee802.3-c22"; 254ef484dfcSTim Harvey reg = <0>; 255ef484dfcSTim Harvey ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 256ef484dfcSTim Harvey ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 257ef484dfcSTim Harvey tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 258ef484dfcSTim Harvey rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 259ef484dfcSTim Harvey }; 260ef484dfcSTim Harvey }; 261ef484dfcSTim Harvey}; 262ef484dfcSTim Harvey 263*9d46d9f7STim Harvey&gpio1 { 264*9d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 265*9d46d9f7STim Harvey "", "", "", "", "", "m2_reset", "", "m2_wdis#", 266*9d46d9f7STim Harvey "", "", "", "", "", "", "", "", 267*9d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 268*9d46d9f7STim Harvey}; 269*9d46d9f7STim Harvey 270*9d46d9f7STim Harvey&gpio2 { 271*9d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 272*9d46d9f7STim Harvey "uart2_en#", "", "", "", "", "", "", "", 273*9d46d9f7STim Harvey "", "", "", "", "", "", "", "", 274*9d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 275*9d46d9f7STim Harvey}; 276*9d46d9f7STim Harvey 277*9d46d9f7STim Harvey&gpio3 { 278*9d46d9f7STim Harvey gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#", 279*9d46d9f7STim Harvey "", "", "", "", "", "", "", "", 280*9d46d9f7STim Harvey "", "", "", "", "", "", "", "", 281*9d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 282*9d46d9f7STim Harvey}; 283*9d46d9f7STim Harvey 284*9d46d9f7STim Harvey&gpio4 { 285*9d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 286*9d46d9f7STim Harvey "", "", "", "amp_gpio3", "amp_gpio2", "", "amp_gpio1", "", 287*9d46d9f7STim Harvey "", "", "", "", "amp_gpio4", "app_gpio1", "", "uart1_rs485", 288*9d46d9f7STim Harvey "", "uart1_term", "uart1_half", "app_gpio2", 289*9d46d9f7STim Harvey "mipi_gpio1", "", "", ""; 290*9d46d9f7STim Harvey}; 291*9d46d9f7STim Harvey 292*9d46d9f7STim Harvey&gpio5 { 293*9d46d9f7STim Harvey gpio-line-names = "", "", "", "mipi_gpio4", 294*9d46d9f7STim Harvey "mipi_gpio3", "mipi_gpio2", "", "", 295*9d46d9f7STim Harvey "", "", "", "", "", "", "", "", 296*9d46d9f7STim Harvey "", "", "", "", "", "", "", "", 297*9d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 298*9d46d9f7STim Harvey}; 299*9d46d9f7STim Harvey 300ef484dfcSTim Harvey&i2c1 { 301ef484dfcSTim Harvey clock-frequency = <100000>; 302ef484dfcSTim Harvey pinctrl-names = "default"; 303ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c1>; 304ef484dfcSTim Harvey status = "okay"; 305ef484dfcSTim Harvey 306ef484dfcSTim Harvey gsc: gsc@20 { 307ef484dfcSTim Harvey compatible = "gw,gsc"; 308ef484dfcSTim Harvey reg = <0x20>; 309ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gsc>; 310ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 311ef484dfcSTim Harvey interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 312ef484dfcSTim Harvey interrupt-controller; 313ef484dfcSTim Harvey #interrupt-cells = <1>; 314ef484dfcSTim Harvey 315ef484dfcSTim Harvey adc { 316ef484dfcSTim Harvey compatible = "gw,gsc-adc"; 317ef484dfcSTim Harvey #address-cells = <1>; 318ef484dfcSTim Harvey #size-cells = <0>; 319ef484dfcSTim Harvey 320ef484dfcSTim Harvey channel@6 { 321ef484dfcSTim Harvey gw,mode = <0>; 322ef484dfcSTim Harvey reg = <0x06>; 323ef484dfcSTim Harvey label = "temp"; 324ef484dfcSTim Harvey }; 325ef484dfcSTim Harvey 326ef484dfcSTim Harvey channel@8 { 327ef484dfcSTim Harvey gw,mode = <1>; 328ef484dfcSTim Harvey reg = <0x08>; 329ef484dfcSTim Harvey label = "vdd_bat"; 330ef484dfcSTim Harvey }; 331ef484dfcSTim Harvey 332ef484dfcSTim Harvey channel@82 { 333ef484dfcSTim Harvey gw,mode = <2>; 334ef484dfcSTim Harvey reg = <0x82>; 335ef484dfcSTim Harvey label = "vin"; 336ef484dfcSTim Harvey gw,voltage-divider-ohms = <22100 1000>; 337ef484dfcSTim Harvey gw,voltage-offset-microvolt = <700000>; 338ef484dfcSTim Harvey }; 339ef484dfcSTim Harvey 340ef484dfcSTim Harvey channel@84 { 341ef484dfcSTim Harvey gw,mode = <2>; 342ef484dfcSTim Harvey reg = <0x84>; 343ef484dfcSTim Harvey label = "vin_4p0"; 344ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 345ef484dfcSTim Harvey }; 346ef484dfcSTim Harvey 347ef484dfcSTim Harvey channel@86 { 348ef484dfcSTim Harvey gw,mode = <2>; 349ef484dfcSTim Harvey reg = <0x86>; 350ef484dfcSTim Harvey label = "vdd_3p3"; 351ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 352ef484dfcSTim Harvey }; 353ef484dfcSTim Harvey 354ef484dfcSTim Harvey channel@88 { 355ef484dfcSTim Harvey gw,mode = <2>; 356ef484dfcSTim Harvey reg = <0x88>; 357ef484dfcSTim Harvey label = "vdd_0p9"; 358ef484dfcSTim Harvey }; 359ef484dfcSTim Harvey 360ef484dfcSTim Harvey channel@8c { 361ef484dfcSTim Harvey gw,mode = <2>; 362ef484dfcSTim Harvey reg = <0x8c>; 363ef484dfcSTim Harvey label = "vdd_soc"; 364ef484dfcSTim Harvey }; 365ef484dfcSTim Harvey 366ef484dfcSTim Harvey channel@8e { 367ef484dfcSTim Harvey gw,mode = <2>; 368ef484dfcSTim Harvey reg = <0x8e>; 369ef484dfcSTim Harvey label = "vdd_arm"; 370ef484dfcSTim Harvey }; 371ef484dfcSTim Harvey 372ef484dfcSTim Harvey channel@90 { 373ef484dfcSTim Harvey gw,mode = <2>; 374ef484dfcSTim Harvey reg = <0x90>; 375ef484dfcSTim Harvey label = "vdd_1p8"; 376ef484dfcSTim Harvey }; 377ef484dfcSTim Harvey 378ef484dfcSTim Harvey channel@92 { 379ef484dfcSTim Harvey gw,mode = <2>; 380ef484dfcSTim Harvey reg = <0x92>; 381ef484dfcSTim Harvey label = "vdd_dram"; 382ef484dfcSTim Harvey }; 383ef484dfcSTim Harvey 384ef484dfcSTim Harvey channel@98 { 385ef484dfcSTim Harvey gw,mode = <2>; 386ef484dfcSTim Harvey reg = <0x98>; 387ef484dfcSTim Harvey label = "vdd_1p0"; 388ef484dfcSTim Harvey }; 389ef484dfcSTim Harvey 390ef484dfcSTim Harvey channel@9a { 391ef484dfcSTim Harvey gw,mode = <2>; 392ef484dfcSTim Harvey reg = <0x9a>; 393ef484dfcSTim Harvey label = "vdd_2p5"; 394ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 395ef484dfcSTim Harvey }; 396ef484dfcSTim Harvey 397ef484dfcSTim Harvey channel@a2 { 398ef484dfcSTim Harvey gw,mode = <2>; 399ef484dfcSTim Harvey reg = <0xa2>; 400ef484dfcSTim Harvey label = "vdd_gsc"; 401ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 402ef484dfcSTim Harvey }; 403ef484dfcSTim Harvey }; 404ef484dfcSTim Harvey }; 405ef484dfcSTim Harvey 406ef484dfcSTim Harvey gpio: gpio@23 { 407ef484dfcSTim Harvey compatible = "nxp,pca9555"; 408ef484dfcSTim Harvey reg = <0x23>; 409ef484dfcSTim Harvey gpio-controller; 410ef484dfcSTim Harvey #gpio-cells = <2>; 411ef484dfcSTim Harvey interrupt-parent = <&gsc>; 412ef484dfcSTim Harvey interrupts = <4>; 413ef484dfcSTim Harvey }; 414ef484dfcSTim Harvey 415ef484dfcSTim Harvey pmic@4b { 416ef484dfcSTim Harvey compatible = "rohm,bd71847"; 417ef484dfcSTim Harvey reg = <0x4b>; 418ef484dfcSTim Harvey pinctrl-names = "default"; 419ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pmic>; 420ef484dfcSTim Harvey interrupt-parent = <&gpio3>; 421ef484dfcSTim Harvey interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 422ef484dfcSTim Harvey rohm,reset-snvs-powered; 423ef484dfcSTim Harvey #clock-cells = <0>; 424ef484dfcSTim Harvey clocks = <&osc_32k 0>; 425ef484dfcSTim Harvey clock-output-names = "clk-32k-out"; 426ef484dfcSTim Harvey 427ef484dfcSTim Harvey regulators { 428ef484dfcSTim Harvey /* vdd_soc: 0.805-0.900V (typ=0.8V) */ 429ef484dfcSTim Harvey BUCK1 { 430ef484dfcSTim Harvey regulator-name = "buck1"; 431ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 432ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 433ef484dfcSTim Harvey regulator-boot-on; 434ef484dfcSTim Harvey regulator-always-on; 435ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 436ef484dfcSTim Harvey }; 437ef484dfcSTim Harvey 438ef484dfcSTim Harvey /* vdd_arm: 0.805-1.0V (typ=0.9V) */ 439ef484dfcSTim Harvey buck2: BUCK2 { 440ef484dfcSTim Harvey regulator-name = "buck2"; 441ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 442ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 443ef484dfcSTim Harvey regulator-boot-on; 444ef484dfcSTim Harvey regulator-always-on; 445ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 446ef484dfcSTim Harvey rohm,dvs-run-voltage = <1000000>; 447ef484dfcSTim Harvey rohm,dvs-idle-voltage = <900000>; 448ef484dfcSTim Harvey }; 449ef484dfcSTim Harvey 450ef484dfcSTim Harvey /* vdd_0p9: 0.805-1.0V (typ=0.9V) */ 451ef484dfcSTim Harvey BUCK3 { 452ef484dfcSTim Harvey regulator-name = "buck3"; 453ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 454ef484dfcSTim Harvey regulator-max-microvolt = <1350000>; 455ef484dfcSTim Harvey regulator-boot-on; 456ef484dfcSTim Harvey regulator-always-on; 457ef484dfcSTim Harvey }; 458ef484dfcSTim Harvey 459ef484dfcSTim Harvey /* vdd_3p3 */ 460ef484dfcSTim Harvey BUCK4 { 461ef484dfcSTim Harvey regulator-name = "buck4"; 462ef484dfcSTim Harvey regulator-min-microvolt = <3000000>; 463ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 464ef484dfcSTim Harvey regulator-boot-on; 465ef484dfcSTim Harvey regulator-always-on; 466ef484dfcSTim Harvey }; 467ef484dfcSTim Harvey 468ef484dfcSTim Harvey /* vdd_1p8 */ 469ef484dfcSTim Harvey BUCK5 { 470ef484dfcSTim Harvey regulator-name = "buck5"; 471ef484dfcSTim Harvey regulator-min-microvolt = <1605000>; 472ef484dfcSTim Harvey regulator-max-microvolt = <1995000>; 473ef484dfcSTim Harvey regulator-boot-on; 474ef484dfcSTim Harvey regulator-always-on; 475ef484dfcSTim Harvey }; 476ef484dfcSTim Harvey 477ef484dfcSTim Harvey /* vdd_dram */ 478ef484dfcSTim Harvey BUCK6 { 479ef484dfcSTim Harvey regulator-name = "buck6"; 480ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 481ef484dfcSTim Harvey regulator-max-microvolt = <1400000>; 482ef484dfcSTim Harvey regulator-boot-on; 483ef484dfcSTim Harvey regulator-always-on; 484ef484dfcSTim Harvey }; 485ef484dfcSTim Harvey 486ef484dfcSTim Harvey /* nvcc_snvs_1p8 */ 487ef484dfcSTim Harvey LDO1 { 488ef484dfcSTim Harvey regulator-name = "ldo1"; 489ef484dfcSTim Harvey regulator-min-microvolt = <1600000>; 490ef484dfcSTim Harvey regulator-max-microvolt = <1900000>; 491ef484dfcSTim Harvey regulator-boot-on; 492ef484dfcSTim Harvey regulator-always-on; 493ef484dfcSTim Harvey }; 494ef484dfcSTim Harvey 495ef484dfcSTim Harvey /* vdd_snvs_0p8 */ 496ef484dfcSTim Harvey LDO2 { 497ef484dfcSTim Harvey regulator-name = "ldo2"; 498ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 499ef484dfcSTim Harvey regulator-max-microvolt = <900000>; 500ef484dfcSTim Harvey regulator-boot-on; 501ef484dfcSTim Harvey regulator-always-on; 502ef484dfcSTim Harvey }; 503ef484dfcSTim Harvey 504ef484dfcSTim Harvey /* vdda_1p8 */ 505ef484dfcSTim Harvey LDO3 { 506ef484dfcSTim Harvey regulator-name = "ldo3"; 507ef484dfcSTim Harvey regulator-min-microvolt = <1800000>; 508ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 509ef484dfcSTim Harvey regulator-boot-on; 510ef484dfcSTim Harvey regulator-always-on; 511ef484dfcSTim Harvey }; 512ef484dfcSTim Harvey 513ef484dfcSTim Harvey LDO4 { 514ef484dfcSTim Harvey regulator-name = "ldo4"; 515ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 516ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 517ef484dfcSTim Harvey regulator-boot-on; 518ef484dfcSTim Harvey regulator-always-on; 519ef484dfcSTim Harvey }; 520ef484dfcSTim Harvey 521ef484dfcSTim Harvey LDO6 { 522ef484dfcSTim Harvey regulator-name = "ldo6"; 523ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 524ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 525ef484dfcSTim Harvey regulator-boot-on; 526ef484dfcSTim Harvey regulator-always-on; 527ef484dfcSTim Harvey }; 528ef484dfcSTim Harvey }; 529ef484dfcSTim Harvey }; 530ef484dfcSTim Harvey 531ef484dfcSTim Harvey eeprom@50 { 532ef484dfcSTim Harvey compatible = "atmel,24c02"; 533ef484dfcSTim Harvey reg = <0x50>; 534ef484dfcSTim Harvey pagesize = <16>; 535ef484dfcSTim Harvey }; 536ef484dfcSTim Harvey 537ef484dfcSTim Harvey eeprom@51 { 538ef484dfcSTim Harvey compatible = "atmel,24c02"; 539ef484dfcSTim Harvey reg = <0x51>; 540ef484dfcSTim Harvey pagesize = <16>; 541ef484dfcSTim Harvey }; 542ef484dfcSTim Harvey 543ef484dfcSTim Harvey eeprom@52 { 544ef484dfcSTim Harvey compatible = "atmel,24c02"; 545ef484dfcSTim Harvey reg = <0x52>; 546ef484dfcSTim Harvey pagesize = <16>; 547ef484dfcSTim Harvey }; 548ef484dfcSTim Harvey 549ef484dfcSTim Harvey eeprom@53 { 550ef484dfcSTim Harvey compatible = "atmel,24c02"; 551ef484dfcSTim Harvey reg = <0x53>; 552ef484dfcSTim Harvey pagesize = <16>; 553ef484dfcSTim Harvey }; 554ef484dfcSTim Harvey 555ef484dfcSTim Harvey rtc@68 { 556ef484dfcSTim Harvey compatible = "dallas,ds1672"; 557ef484dfcSTim Harvey reg = <0x68>; 558ef484dfcSTim Harvey }; 559ef484dfcSTim Harvey}; 560ef484dfcSTim Harvey 561ef484dfcSTim Harvey&i2c2 { 562ef484dfcSTim Harvey clock-frequency = <400000>; 563ef484dfcSTim Harvey pinctrl-names = "default"; 564ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c2>; 565ef484dfcSTim Harvey status = "okay"; 566ef484dfcSTim Harvey 567ef484dfcSTim Harvey accelerometer@19 { 568ef484dfcSTim Harvey compatible = "st,lis2de12"; 569ef484dfcSTim Harvey pinctrl-names = "default"; 570ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_accel>; 571ef484dfcSTim Harvey reg = <0x19>; 572ef484dfcSTim Harvey st,drdy-int-pin = <1>; 573ef484dfcSTim Harvey interrupt-parent = <&gpio1>; 574ef484dfcSTim Harvey interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 575ef484dfcSTim Harvey interrupt-names = "INT1"; 576ef484dfcSTim Harvey }; 577ef484dfcSTim Harvey}; 578ef484dfcSTim Harvey 579ef484dfcSTim Harvey/* off-board header */ 580ef484dfcSTim Harvey&i2c3 { 581ef484dfcSTim Harvey clock-frequency = <400000>; 582ef484dfcSTim Harvey pinctrl-names = "default"; 583ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c3>; 584ef484dfcSTim Harvey status = "okay"; 585ef484dfcSTim Harvey}; 586ef484dfcSTim Harvey 587ef484dfcSTim Harvey/* off-board header */ 588ef484dfcSTim Harvey&i2c4 { 589ef484dfcSTim Harvey clock-frequency = <400000>; 590ef484dfcSTim Harvey pinctrl-names = "default"; 591ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c4>; 592ef484dfcSTim Harvey status = "okay"; 593ef484dfcSTim Harvey}; 594ef484dfcSTim Harvey 595afb424b9STim Harvey&pcie_phy { 596afb424b9STim Harvey fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 597afb424b9STim Harvey fsl,clkreq-unsupported; 598afb424b9STim Harvey clocks = <&clk IMX8MM_CLK_DUMMY>; 599afb424b9STim Harvey status = "okay"; 600afb424b9STim Harvey}; 601afb424b9STim Harvey 602afb424b9STim Harvey&pcie0 { 603afb424b9STim Harvey pinctrl-names = "default"; 604afb424b9STim Harvey pinctrl-0 = <&pinctrl_pcie0>; 605afb424b9STim Harvey reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>; 606afb424b9STim Harvey clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, 607afb424b9STim Harvey <&clk IMX8MM_CLK_DUMMY>, <&pcie0_refclk>; 608afb424b9STim Harvey clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; 609afb424b9STim Harvey assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, 610afb424b9STim Harvey <&clk IMX8MM_CLK_PCIE1_CTRL>; 611afb424b9STim Harvey assigned-clock-rates = <10000000>, <250000000>; 612afb424b9STim Harvey assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, 613afb424b9STim Harvey <&clk IMX8MM_SYS_PLL2_250M>; 614afb424b9STim Harvey status = "okay"; 615afb424b9STim Harvey 616afb424b9STim Harvey pcie@0,0 { 617afb424b9STim Harvey reg = <0x0000 0 0 0 0>; 618afb424b9STim Harvey #address-cells = <1>; 619afb424b9STim Harvey #size-cells = <0>; 620afb424b9STim Harvey 621afb424b9STim Harvey eth1: pcie@1,0 { 622afb424b9STim Harvey reg = <0x0000 0 0 0 0>; 623afb424b9STim Harvey #address-cells = <1>; 624afb424b9STim Harvey #size-cells = <0>; 625afb424b9STim Harvey 626afb424b9STim Harvey local-mac-address = [00 00 00 00 00 00]; 627afb424b9STim Harvey }; 628afb424b9STim Harvey }; 629afb424b9STim Harvey}; 630afb424b9STim Harvey 631ef484dfcSTim Harvey/* off-board header */ 632ef484dfcSTim Harvey&sai3 { 633ef484dfcSTim Harvey pinctrl-names = "default"; 634ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_sai3>; 635ef484dfcSTim Harvey assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 636ef484dfcSTim Harvey assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 637ef484dfcSTim Harvey assigned-clock-rates = <24576000>; 638ef484dfcSTim Harvey status = "okay"; 639ef484dfcSTim Harvey}; 640ef484dfcSTim Harvey 641ef484dfcSTim Harvey/* RS232/RS485/RS422 selectable */ 642ef484dfcSTim Harvey&uart1 { 643ef484dfcSTim Harvey pinctrl-names = "default"; 644ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; 645ef484dfcSTim Harvey rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; 646ef484dfcSTim Harvey cts-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; 647ef484dfcSTim Harvey status = "okay"; 648ef484dfcSTim Harvey}; 649ef484dfcSTim Harvey 650ef484dfcSTim Harvey/* RS232 console */ 651ef484dfcSTim Harvey&uart2 { 652ef484dfcSTim Harvey pinctrl-names = "default"; 653ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart2>; 654ef484dfcSTim Harvey status = "okay"; 655ef484dfcSTim Harvey}; 656ef484dfcSTim Harvey 657ef484dfcSTim Harvey/* bluetooth HCI */ 658ef484dfcSTim Harvey&uart3 { 659ef484dfcSTim Harvey pinctrl-names = "default"; 660ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; 661ef484dfcSTim Harvey rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 662ef484dfcSTim Harvey cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 663ef484dfcSTim Harvey status = "okay"; 664ef484dfcSTim Harvey 665ef484dfcSTim Harvey bluetooth { 666ef484dfcSTim Harvey compatible = "brcm,bcm4330-bt"; 667ef484dfcSTim Harvey shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 668ef484dfcSTim Harvey }; 669ef484dfcSTim Harvey}; 670ef484dfcSTim Harvey 671ef484dfcSTim Harvey/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */ 672ef484dfcSTim Harvey&uart4 { 673ef484dfcSTim Harvey pinctrl-names = "default"; 674ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart4>; 675ef484dfcSTim Harvey rts-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 676ef484dfcSTim Harvey cts-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; 677ef484dfcSTim Harvey dtr-gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; 678ef484dfcSTim Harvey dsr-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; 679ef484dfcSTim Harvey dcd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; 680ef484dfcSTim Harvey status = "okay"; 681ef484dfcSTim Harvey}; 682ef484dfcSTim Harvey 683ef484dfcSTim Harvey&usbotg1 { 684ef484dfcSTim Harvey dr_mode = "host"; 685ef484dfcSTim Harvey vbus-supply = <®_usb1_vbus>; 686ef484dfcSTim Harvey disable-over-current; 687ef484dfcSTim Harvey status = "okay"; 688ef484dfcSTim Harvey}; 689ef484dfcSTim Harvey 690ef484dfcSTim Harvey&usbotg2 { 691ef484dfcSTim Harvey dr_mode = "host"; 692ef484dfcSTim Harvey disable-over-current; 693ef484dfcSTim Harvey status = "okay"; 694ef484dfcSTim Harvey}; 695ef484dfcSTim Harvey 696ef484dfcSTim Harvey/* SDIO WiFi */ 697ef484dfcSTim Harvey&usdhc2 { 698ef484dfcSTim Harvey pinctrl-names = "default"; 699ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc2>; 700ef484dfcSTim Harvey bus-width = <4>; 701ef484dfcSTim Harvey non-removable; 702ef484dfcSTim Harvey vmmc-supply = <®_wifi>; 703ef484dfcSTim Harvey status = "okay"; 704ef484dfcSTim Harvey}; 705ef484dfcSTim Harvey 706ef484dfcSTim Harvey/* eMMC */ 707ef484dfcSTim Harvey&usdhc3 { 708ef484dfcSTim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 709ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc3>; 710ef484dfcSTim Harvey pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 711ef484dfcSTim Harvey pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 712ef484dfcSTim Harvey bus-width = <8>; 713ef484dfcSTim Harvey non-removable; 714ef484dfcSTim Harvey status = "okay"; 715ef484dfcSTim Harvey}; 716ef484dfcSTim Harvey 717ef484dfcSTim Harvey&wdog1 { 718ef484dfcSTim Harvey pinctrl-names = "default"; 719ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_wdog>; 720ef484dfcSTim Harvey fsl,ext-reset-output; 721ef484dfcSTim Harvey status = "okay"; 722ef484dfcSTim Harvey}; 723ef484dfcSTim Harvey 724ef484dfcSTim Harvey&iomuxc { 725ef484dfcSTim Harvey pinctrl-names = "default"; 726ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_hog>; 727ef484dfcSTim Harvey 728ef484dfcSTim Harvey pinctrl_hog: hoggrp { 729ef484dfcSTim Harvey fsl,pins = < 730ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ 731*9d46d9f7STim Harvey MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */ 732ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ 733ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ 734ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */ 735ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x40000041 /* AMP GPIO2 */ 736ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x40000041 /* AMP GPIO3 */ 737ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x40000041 /* AMP_GPIO4 */ 738ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ 739ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */ 740ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */ 741ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */ 742ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */ 743ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */ 744ef484dfcSTim Harvey MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */ 745ef484dfcSTim Harvey >; 746ef484dfcSTim Harvey }; 747ef484dfcSTim Harvey 748ef484dfcSTim Harvey pinctrl_accel: accelgrp { 749ef484dfcSTim Harvey fsl,pins = < 750ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159 751ef484dfcSTim Harvey >; 752ef484dfcSTim Harvey }; 753ef484dfcSTim Harvey 754ef484dfcSTim Harvey pinctrl_fec1: fec1grp { 755ef484dfcSTim Harvey fsl,pins = < 756ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 757ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 758ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 759ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 760ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 761ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 762ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 763ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 764ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 765ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 766ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 767ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 768ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 769ef484dfcSTim Harvey MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 770ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */ 771ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */ 772ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO08_ENET1_1588_EVENT0_IN 0x141 773ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO09_ENET1_1588_EVENT0_OUT 0x141 774ef484dfcSTim Harvey >; 775ef484dfcSTim Harvey }; 776ef484dfcSTim Harvey 777ef484dfcSTim Harvey pinctrl_gsc: gscgrp { 778ef484dfcSTim Harvey fsl,pins = < 779ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40 780ef484dfcSTim Harvey >; 781ef484dfcSTim Harvey }; 782ef484dfcSTim Harvey 783ef484dfcSTim Harvey pinctrl_i2c1: i2c1grp { 784ef484dfcSTim Harvey fsl,pins = < 785ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 786ef484dfcSTim Harvey MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 787ef484dfcSTim Harvey >; 788ef484dfcSTim Harvey }; 789ef484dfcSTim Harvey 790ef484dfcSTim Harvey pinctrl_i2c2: i2c2grp { 791ef484dfcSTim Harvey fsl,pins = < 792ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 793ef484dfcSTim Harvey MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 794ef484dfcSTim Harvey >; 795ef484dfcSTim Harvey }; 796ef484dfcSTim Harvey 797ef484dfcSTim Harvey pinctrl_i2c3: i2c3grp { 798ef484dfcSTim Harvey fsl,pins = < 799ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 800ef484dfcSTim Harvey MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 801ef484dfcSTim Harvey >; 802ef484dfcSTim Harvey }; 803ef484dfcSTim Harvey 804ef484dfcSTim Harvey pinctrl_i2c4: i2c4grp { 805ef484dfcSTim Harvey fsl,pins = < 806ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 807ef484dfcSTim Harvey MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 808ef484dfcSTim Harvey >; 809ef484dfcSTim Harvey }; 810ef484dfcSTim Harvey 811ef484dfcSTim Harvey pinctrl_gpio_leds: gpioledgrp { 812ef484dfcSTim Harvey fsl,pins = < 813ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 814ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 815ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 816ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 817ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 818ef484dfcSTim Harvey >; 819ef484dfcSTim Harvey }; 820ef484dfcSTim Harvey 821afb424b9STim Harvey pinctrl_pcie0: pciegrp { 822afb424b9STim Harvey fsl,pins = < 823afb424b9STim Harvey MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x41 824afb424b9STim Harvey >; 825afb424b9STim Harvey }; 826afb424b9STim Harvey 827ef484dfcSTim Harvey pinctrl_pmic: pmicgrp { 828ef484dfcSTim Harvey fsl,pins = < 829ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41 830ef484dfcSTim Harvey >; 831ef484dfcSTim Harvey }; 832ef484dfcSTim Harvey 833ef484dfcSTim Harvey pinctrl_pps: ppsgrp { 834ef484dfcSTim Harvey fsl,pins = < 835ef484dfcSTim Harvey MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */ 836ef484dfcSTim Harvey >; 837ef484dfcSTim Harvey }; 838ef484dfcSTim Harvey 839ef484dfcSTim Harvey pinctrl_reg_wl: regwlgrp { 840ef484dfcSTim Harvey fsl,pins = < 841ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */ 842ef484dfcSTim Harvey >; 843ef484dfcSTim Harvey }; 844ef484dfcSTim Harvey 845ef484dfcSTim Harvey pinctrl_reg_usb1: regusb1grp { 846ef484dfcSTim Harvey fsl,pins = < 847ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41 848ef484dfcSTim Harvey >; 849ef484dfcSTim Harvey }; 850ef484dfcSTim Harvey 851ef484dfcSTim Harvey pinctrl_sai3: sai3grp { 852ef484dfcSTim Harvey fsl,pins = < 853ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 854ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 855ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 856ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 857ef484dfcSTim Harvey MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 858ef484dfcSTim Harvey >; 859ef484dfcSTim Harvey }; 860ef484dfcSTim Harvey 861ef484dfcSTim Harvey pinctrl_spi1: spi1grp { 862ef484dfcSTim Harvey fsl,pins = < 863ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 864ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 865ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 866ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40 867ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */ 868ef484dfcSTim Harvey >; 869ef484dfcSTim Harvey }; 870ef484dfcSTim Harvey 871ef484dfcSTim Harvey pinctrl_spi2: spi2grp { 872ef484dfcSTim Harvey fsl,pins = < 873ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 874ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 875ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 876ef484dfcSTim Harvey MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */ 877ef484dfcSTim Harvey >; 878ef484dfcSTim Harvey }; 879ef484dfcSTim Harvey 880ef484dfcSTim Harvey pinctrl_uart1: uart1grp { 881ef484dfcSTim Harvey fsl,pins = < 882ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 883ef484dfcSTim Harvey MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 884ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x140 /* RTS */ 885ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x140 /* CTS */ 886ef484dfcSTim Harvey >; 887ef484dfcSTim Harvey }; 888ef484dfcSTim Harvey 889ef484dfcSTim Harvey pinctrl_uart1_gpio: uart1gpiogrp { 890ef484dfcSTim Harvey fsl,pins = < 891ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */ 892ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */ 893ef484dfcSTim Harvey MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */ 894ef484dfcSTim Harvey >; 895ef484dfcSTim Harvey }; 896ef484dfcSTim Harvey 897ef484dfcSTim Harvey pinctrl_uart2: uart2grp { 898ef484dfcSTim Harvey fsl,pins = < 899ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 900ef484dfcSTim Harvey MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 901ef484dfcSTim Harvey >; 902ef484dfcSTim Harvey }; 903ef484dfcSTim Harvey 904ef484dfcSTim Harvey pinctrl_uart3_gpio: uart3_gpiogrp { 905ef484dfcSTim Harvey fsl,pins = < 906ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */ 907ef484dfcSTim Harvey >; 908ef484dfcSTim Harvey }; 909ef484dfcSTim Harvey 910ef484dfcSTim Harvey pinctrl_uart3: uart3grp { 911ef484dfcSTim Harvey fsl,pins = < 912ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 913ef484dfcSTim Harvey MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 914ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */ 915ef484dfcSTim Harvey MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */ 916ef484dfcSTim Harvey >; 917ef484dfcSTim Harvey }; 918ef484dfcSTim Harvey 919ef484dfcSTim Harvey pinctrl_uart4: uart4grp { 920ef484dfcSTim Harvey fsl,pins = < 921ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 922ef484dfcSTim Harvey MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 923ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x140 /* CTS */ 924ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x140 /* RTS */ 925ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x140 /* DTR */ 926ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x140 /* DSR */ 927ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x140 /* DCD */ 928ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x140 /* RI */ 929ef484dfcSTim Harvey MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x140 /* GNSS_PPS */ 930ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */ 931ef484dfcSTim Harvey >; 932ef484dfcSTim Harvey }; 933ef484dfcSTim Harvey 934ef484dfcSTim Harvey pinctrl_usdhc2: usdhc2grp { 935ef484dfcSTim Harvey fsl,pins = < 936ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 937ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 938ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 939ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 940ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 941ef484dfcSTim Harvey MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 942ef484dfcSTim Harvey >; 943ef484dfcSTim Harvey }; 944ef484dfcSTim Harvey 945ef484dfcSTim Harvey pinctrl_usdhc3: usdhc3grp { 946ef484dfcSTim Harvey fsl,pins = < 947ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 948ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 949ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 950ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 951ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 952ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 953ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 954ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 955ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 956ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 957ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 958ef484dfcSTim Harvey >; 959ef484dfcSTim Harvey }; 960ef484dfcSTim Harvey 961ef484dfcSTim Harvey pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 962ef484dfcSTim Harvey fsl,pins = < 963ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 964ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 965ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 966ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 967ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 968ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 969ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 970ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 971ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 972ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 973ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 974ef484dfcSTim Harvey >; 975ef484dfcSTim Harvey }; 976ef484dfcSTim Harvey 977ef484dfcSTim Harvey pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 978ef484dfcSTim Harvey fsl,pins = < 979ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 980ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 981ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 982ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 983ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 984ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 985ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 986ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 987ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 988ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 989ef484dfcSTim Harvey MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 990ef484dfcSTim Harvey >; 991ef484dfcSTim Harvey }; 992ef484dfcSTim Harvey 993ef484dfcSTim Harvey pinctrl_wdog: wdoggrp { 994ef484dfcSTim Harvey fsl,pins = < 995ef484dfcSTim Harvey MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 996ef484dfcSTim Harvey >; 997ef484dfcSTim Harvey }; 998ef484dfcSTim Harvey}; 999