1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2020 Gateworks Corporation
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/leds/common.h>
8
9/ {
10	aliases {
11		usb0 = &usbotg1;
12		usb1 = &usbotg2;
13	};
14
15	led-controller {
16		compatible = "gpio-leds";
17		pinctrl-names = "default";
18		pinctrl-0 = <&pinctrl_gpio_leds>;
19
20		led-0 {
21			function = LED_FUNCTION_STATUS;
22			color = <LED_COLOR_ID_GREEN>;
23			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
24			default-state = "on";
25			linux,default-trigger = "heartbeat";
26		};
27
28		led-1 {
29			function = LED_FUNCTION_STATUS;
30			color = <LED_COLOR_ID_RED>;
31			gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
32			default-state = "off";
33		};
34	};
35
36	pps {
37		compatible = "pps-gpio";
38		pinctrl-names = "default";
39		pinctrl-0 = <&pinctrl_pps>;
40		gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
41		status = "okay";
42	};
43
44	reg_1p8v: regulator-1p8v {
45		compatible = "regulator-fixed";
46		regulator-name = "1P8V";
47		regulator-min-microvolt = <1800000>;
48		regulator-max-microvolt = <1800000>;
49		regulator-always-on;
50	};
51
52	reg_3p3v: regulator-3p3v {
53		compatible = "regulator-fixed";
54		regulator-name = "3P3V";
55		regulator-min-microvolt = <3300000>;
56		regulator-max-microvolt = <3300000>;
57		regulator-always-on;
58	};
59
60	reg_usb_otg1_vbus: regulator-usb-otg1 {
61		pinctrl-names = "default";
62		pinctrl-0 = <&pinctrl_reg_usb1_en>;
63		compatible = "regulator-fixed";
64		regulator-name = "usb_otg1_vbus";
65		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
66		enable-active-high;
67		regulator-min-microvolt = <5000000>;
68		regulator-max-microvolt = <5000000>;
69	};
70
71	reg_usb_otg2_vbus: regulator-usb-otg2 {
72		pinctrl-names = "default";
73		pinctrl-0 = <&pinctrl_reg_usb2_en>;
74		compatible = "regulator-fixed";
75		regulator-name = "usb_otg2_vbus";
76		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
77		enable-active-high;
78		regulator-min-microvolt = <5000000>;
79		regulator-max-microvolt = <5000000>;
80	};
81
82	reg_wifi_en: regulator-wifi-en {
83		pinctrl-names = "default";
84		pinctrl-0 = <&pinctrl_reg_wl>;
85		compatible = "regulator-fixed";
86		regulator-name = "wl";
87		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
88		startup-delay-us = <100>;
89		enable-active-high;
90		regulator-min-microvolt = <3300000>;
91		regulator-max-microvolt = <3300000>;
92	};
93};
94
95/* off-board header */
96&ecspi2 {
97	pinctrl-names = "default";
98	pinctrl-0 = <&pinctrl_spi2>;
99	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
100	status = "okay";
101};
102
103&i2c2 {
104	clock-frequency = <400000>;
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_i2c2>;
107	status = "okay";
108
109	accelerometer@19 {
110		pinctrl-names = "default";
111		pinctrl-0 = <&pinctrl_accel>;
112		compatible = "st,lis2de12";
113		reg = <0x19>;
114		st,drdy-int-pin = <1>;
115		interrupt-parent = <&gpio4>;
116		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
117		interrupt-names = "INT1";
118	};
119};
120
121/* off-board header */
122&i2c3 {
123	clock-frequency = <400000>;
124	pinctrl-names = "default";
125	pinctrl-0 = <&pinctrl_i2c3>;
126	status = "okay";
127};
128
129/* off-board header */
130&sai3 {
131	pinctrl-names = "default";
132	pinctrl-0 = <&pinctrl_sai3>;
133	assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
134	assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
135	assigned-clock-rates = <24576000>;
136	status = "okay";
137};
138
139/* GPS */
140&uart1 {
141	pinctrl-names = "default";
142	pinctrl-0 = <&pinctrl_uart1>;
143	status = "okay";
144};
145
146/* bluetooth HCI */
147&uart3 {
148	pinctrl-names = "default";
149	pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
150	cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
151	rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
152	status = "okay";
153
154	bluetooth {
155		compatible = "brcm,bcm4330-bt";
156		shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
157	};
158};
159
160/* RS232 */
161&uart4 {
162	pinctrl-names = "default";
163	pinctrl-0 = <&pinctrl_uart4>;
164	status = "okay";
165};
166
167&usbotg1 {
168	dr_mode = "otg";
169	vbus-supply = <&reg_usb_otg1_vbus>;
170	status = "okay";
171};
172
173&usbotg2 {
174	dr_mode = "host";
175	vbus-supply = <&reg_usb_otg2_vbus>;
176	status = "okay";
177};
178
179/* SDIO WiFi */
180&usdhc1 {
181	pinctrl-names = "default";
182	pinctrl-0 = <&pinctrl_usdhc1>;
183	bus-width = <4>;
184	non-removable;
185	vmmc-supply = <&reg_wifi_en>;
186	status = "okay";
187};
188
189/* microSD */
190&usdhc2 {
191	pinctrl-names = "default", "state_100mhz", "state_200mhz";
192	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
193	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
194	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
195	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
196	bus-width = <4>;
197	vmmc-supply = <&reg_3p3v>;
198	status = "okay";
199};
200
201&iomuxc {
202	pinctrl-names = "default";
203	pinctrl-0 = <&pinctrl_hog>;
204
205	pinctrl_hog: hoggrp {
206		fsl,pins = <
207			MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3		0x40000041 /* PLUG_TEST */
208			MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6	0x40000041 /* PCI_USBSEL */
209			MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7	0x40000041 /* PCIE_WDIS# */
210			MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7	0x40000041 /* DIO0 */
211			MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x40000041 /* DIO1 */
212			MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0	0x40000104 /* RS485_TERM */
213			MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0	0x40000104 /* RS485 */
214			MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2	0x40000104 /* RS485_HALF */
215		>;
216	};
217
218	pinctrl_accel: accelgrp {
219		fsl,pins = <
220			MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5	0x159
221		>;
222	};
223
224	pinctrl_bten: btengrp {
225		fsl,pins = <
226			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x41
227		>;
228	};
229
230	pinctrl_gpio_leds: gpioledgrp {
231		fsl,pins = <
232			MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5	0x19
233			MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4		0x19
234		>;
235	};
236
237	pinctrl_i2c3: i2c3grp {
238		fsl,pins = <
239			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
240			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA		0x400001c3
241		>;
242	};
243
244	pinctrl_pps: ppsgrp {
245		fsl,pins = <
246			MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15	0x41
247		>;
248	};
249
250	pinctrl_reg_wl: regwlgrp {
251		fsl,pins = <
252			MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x41
253		>;
254	};
255
256	pinctrl_reg_usb1_en: regusb1grp {
257		fsl,pins = <
258			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x41
259			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x41
260		>;
261	};
262
263	pinctrl_reg_usb2_en: regusb2grp {
264		fsl,pins = <
265			MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x41
266		>;
267	};
268
269	pinctrl_sai3: sai3grp {
270		fsl,pins = <
271			MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
272			MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
273			MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
274			MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
275			MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0	0xd6
276		>;
277	};
278
279	pinctrl_spi2: spi2grp {
280		fsl,pins = <
281			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6
282			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0xd6
283			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6
284			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0xd6
285		>;
286	};
287
288	pinctrl_uart1: uart1grp {
289		fsl,pins = <
290			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140
291			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX	0x140
292		>;
293	};
294
295	pinctrl_uart3: uart3grp {
296		fsl,pins = <
297			MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX	0x140
298			MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX	0x140
299			MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8	0x140
300			MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9	0x140
301		>;
302	};
303
304	pinctrl_uart4: uart4grp {
305		fsl,pins = <
306			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX	0x140
307			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX	0x140
308		>;
309	};
310
311	pinctrl_usdhc1: usdhc1grp {
312		fsl,pins = <
313			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x190
314			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD		0x1d0
315			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0	0x1d0
316			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1	0x1d0
317			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2	0x1d0
318			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3	0x1d0
319		>;
320	};
321
322	pinctrl_usdhc2: usdhc2grp {
323		fsl,pins = <
324			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x190
325			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d0
326			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
327			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
328			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
329			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
330		>;
331	};
332
333	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
334		fsl,pins = <
335			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x194
336			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d4
337			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
338			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
339			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
340			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
341		>;
342	};
343
344	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
345		fsl,pins = <
346			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x196
347			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d6
348			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
349			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
350			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
351			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
352		>;
353	};
354
355	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
356		fsl,pins = <
357			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12	0x1c4
358			MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B	0x1d0
359			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
360		>;
361	};
362};
363