1*dfcd1b6fSAlexander Stein// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 2*dfcd1b6fSAlexander Stein/* 3*dfcd1b6fSAlexander Stein * Copyright 2020-2021 TQ-Systems GmbH 4*dfcd1b6fSAlexander Stein */ 5*dfcd1b6fSAlexander Stein 6*dfcd1b6fSAlexander Stein/dts-v1/; 7*dfcd1b6fSAlexander Stein 8*dfcd1b6fSAlexander Stein#include "imx8mm-tqma8mqml.dtsi" 9*dfcd1b6fSAlexander Stein#include "mba8mx.dtsi" 10*dfcd1b6fSAlexander Stein 11*dfcd1b6fSAlexander Stein/ { 12*dfcd1b6fSAlexander Stein model = "TQ-Systems GmbH i.MX8MM TQMa8MxML on MBa8Mx"; 13*dfcd1b6fSAlexander Stein compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 14*dfcd1b6fSAlexander Stein 15*dfcd1b6fSAlexander Stein aliases { 16*dfcd1b6fSAlexander Stein eeprom0 = &eeprom3; 17*dfcd1b6fSAlexander Stein mmc0 = &usdhc3; 18*dfcd1b6fSAlexander Stein mmc1 = &usdhc2; 19*dfcd1b6fSAlexander Stein mmc2 = &usdhc1; 20*dfcd1b6fSAlexander Stein rtc0 = &pcf85063; 21*dfcd1b6fSAlexander Stein rtc1 = &snvs_rtc; 22*dfcd1b6fSAlexander Stein }; 23*dfcd1b6fSAlexander Stein 24*dfcd1b6fSAlexander Stein reg_usdhc2_vmmc: regulator-vmmc { 25*dfcd1b6fSAlexander Stein compatible = "regulator-fixed"; 26*dfcd1b6fSAlexander Stein pinctrl-names = "default"; 27*dfcd1b6fSAlexander Stein pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 28*dfcd1b6fSAlexander Stein regulator-name = "VSD_3V3"; 29*dfcd1b6fSAlexander Stein regulator-min-microvolt = <3300000>; 30*dfcd1b6fSAlexander Stein regulator-max-microvolt = <3300000>; 31*dfcd1b6fSAlexander Stein gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 32*dfcd1b6fSAlexander Stein enable-active-high; 33*dfcd1b6fSAlexander Stein startup-delay-us = <100>; 34*dfcd1b6fSAlexander Stein off-on-delay-us = <12000>; 35*dfcd1b6fSAlexander Stein }; 36*dfcd1b6fSAlexander Stein 37*dfcd1b6fSAlexander Stein extcon_usbotg1: extcon-usbotg1 { 38*dfcd1b6fSAlexander Stein compatible = "linux,extcon-usb-gpio"; 39*dfcd1b6fSAlexander Stein pinctrl-names = "default"; 40*dfcd1b6fSAlexander Stein pinctrl-0 = <&pinctrl_usb1_extcon>; 41*dfcd1b6fSAlexander Stein id-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; 42*dfcd1b6fSAlexander Stein }; 43*dfcd1b6fSAlexander Stein}; 44*dfcd1b6fSAlexander Stein 45*dfcd1b6fSAlexander Stein&i2c1 { 46*dfcd1b6fSAlexander Stein expander2: gpio@27 { 47*dfcd1b6fSAlexander Stein compatible = "nxp,pca9555"; 48*dfcd1b6fSAlexander Stein reg = <0x27>; 49*dfcd1b6fSAlexander Stein gpio-controller; 50*dfcd1b6fSAlexander Stein #gpio-cells = <2>; 51*dfcd1b6fSAlexander Stein vcc-supply = <®_vcc_3v3>; 52*dfcd1b6fSAlexander Stein pinctrl-names = "default"; 53*dfcd1b6fSAlexander Stein pinctrl-0 = <&pinctrl_expander>; 54*dfcd1b6fSAlexander Stein interrupt-parent = <&gpio1>; 55*dfcd1b6fSAlexander Stein interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 56*dfcd1b6fSAlexander Stein interrupt-controller; 57*dfcd1b6fSAlexander Stein #interrupt-cells = <2>; 58*dfcd1b6fSAlexander Stein }; 59*dfcd1b6fSAlexander Stein}; 60*dfcd1b6fSAlexander Stein 61*dfcd1b6fSAlexander Stein&sai3 { 62*dfcd1b6fSAlexander Stein assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 63*dfcd1b6fSAlexander Stein assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 64*dfcd1b6fSAlexander Stein clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k"; 65*dfcd1b6fSAlexander Stein clocks = <&clk IMX8MM_CLK_SAI3_IPG>, <&clk IMX8MM_CLK_DUMMY>, 66*dfcd1b6fSAlexander Stein <&clk IMX8MM_CLK_SAI3_ROOT>, <&clk IMX8MM_CLK_DUMMY>, 67*dfcd1b6fSAlexander Stein <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>, 68*dfcd1b6fSAlexander Stein <&clk IMX8MM_AUDIO_PLL2_OUT>; 69*dfcd1b6fSAlexander Stein}; 70*dfcd1b6fSAlexander Stein 71*dfcd1b6fSAlexander Stein&tlv320aic3x04 { 72*dfcd1b6fSAlexander Stein clock-names = "mclk"; 73*dfcd1b6fSAlexander Stein clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; 74*dfcd1b6fSAlexander Stein}; 75*dfcd1b6fSAlexander Stein 76*dfcd1b6fSAlexander Stein&uart1 { 77*dfcd1b6fSAlexander Stein assigned-clocks = <&clk IMX8MM_CLK_UART1>; 78*dfcd1b6fSAlexander Stein assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; 79*dfcd1b6fSAlexander Stein}; 80*dfcd1b6fSAlexander Stein 81*dfcd1b6fSAlexander Stein&uart2 { 82*dfcd1b6fSAlexander Stein assigned-clocks = <&clk IMX8MM_CLK_UART2>; 83*dfcd1b6fSAlexander Stein assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; 84*dfcd1b6fSAlexander Stein}; 85*dfcd1b6fSAlexander Stein 86*dfcd1b6fSAlexander Stein&usbotg1 { 87*dfcd1b6fSAlexander Stein pinctrl-names = "default"; 88*dfcd1b6fSAlexander Stein pinctrl-0 = <&pinctrl_usbotg1>; 89*dfcd1b6fSAlexander Stein dr_mode = "otg"; 90*dfcd1b6fSAlexander Stein extcon = <&extcon_usbotg1>; 91*dfcd1b6fSAlexander Stein srp-disable; 92*dfcd1b6fSAlexander Stein hnp-disable; 93*dfcd1b6fSAlexander Stein adp-disable; 94*dfcd1b6fSAlexander Stein power-active-high; 95*dfcd1b6fSAlexander Stein over-current-active-low; 96*dfcd1b6fSAlexander Stein status = "okay"; 97*dfcd1b6fSAlexander Stein}; 98*dfcd1b6fSAlexander Stein 99*dfcd1b6fSAlexander Stein&usbotg2 { 100*dfcd1b6fSAlexander Stein dr_mode = "host"; 101*dfcd1b6fSAlexander Stein disable-over-current; 102*dfcd1b6fSAlexander Stein vbus-supply = <®_hub_vbus>; 103*dfcd1b6fSAlexander Stein status = "okay"; 104*dfcd1b6fSAlexander Stein}; 105*dfcd1b6fSAlexander Stein 106*dfcd1b6fSAlexander Stein&iomuxc { 107*dfcd1b6fSAlexander Stein pinctrl_ecspi1: ecspi1grp { 108*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x00000006>, 109*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x00000006>, 110*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x00000006>, 111*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x00000006>; 112*dfcd1b6fSAlexander Stein }; 113*dfcd1b6fSAlexander Stein 114*dfcd1b6fSAlexander Stein pinctrl_ecspi2: ecspi2grp { 115*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x00000006>, 116*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x00000006>, 117*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x00000006>, 118*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x00000006>; 119*dfcd1b6fSAlexander Stein }; 120*dfcd1b6fSAlexander Stein 121*dfcd1b6fSAlexander Stein pinctrl_expander: expandergrp { 122*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x94>; 123*dfcd1b6fSAlexander Stein }; 124*dfcd1b6fSAlexander Stein 125*dfcd1b6fSAlexander Stein pinctrl_fec1: fec1grp { 126*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x40000002>, 127*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x40000002>, 128*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x14>, 129*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x14>, 130*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x14>, 131*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x14>, 132*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x90>, 133*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x90>, 134*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x90>, 135*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x90>, 136*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x14>, 137*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90>, 138*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90>, 139*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x14>; 140*dfcd1b6fSAlexander Stein }; 141*dfcd1b6fSAlexander Stein 142*dfcd1b6fSAlexander Stein pinctrl_gpiobutton: gpiobuttongrp { 143*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x84>, 144*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x84>, 145*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x84>; 146*dfcd1b6fSAlexander Stein }; 147*dfcd1b6fSAlexander Stein 148*dfcd1b6fSAlexander Stein pinctrl_gpioled: gpioledgrp { 149*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x84>, 150*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_NAND_DQS_GPIO3_IO14 0x84>; 151*dfcd1b6fSAlexander Stein }; 152*dfcd1b6fSAlexander Stein 153*dfcd1b6fSAlexander Stein pinctrl_i2c2: i2c2grp { 154*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000004>, 155*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000004>; 156*dfcd1b6fSAlexander Stein }; 157*dfcd1b6fSAlexander Stein 158*dfcd1b6fSAlexander Stein pinctrl_i2c2_gpio: i2c2gpiogrp { 159*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x40000004>, 160*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x40000004>; 161*dfcd1b6fSAlexander Stein }; 162*dfcd1b6fSAlexander Stein 163*dfcd1b6fSAlexander Stein pinctrl_i2c3: i2c3grp { 164*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000004>, 165*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000004>; 166*dfcd1b6fSAlexander Stein }; 167*dfcd1b6fSAlexander Stein 168*dfcd1b6fSAlexander Stein pinctrl_i2c3_gpio: i2c3gpiogrp { 169*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x40000004>, 170*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x40000004>; 171*dfcd1b6fSAlexander Stein }; 172*dfcd1b6fSAlexander Stein 173*dfcd1b6fSAlexander Stein pinctrl_pwm3: pwm3grp { 174*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_GPIO1_IO14_PWM3_OUT 0x14>; 175*dfcd1b6fSAlexander Stein }; 176*dfcd1b6fSAlexander Stein 177*dfcd1b6fSAlexander Stein pinctrl_pwm4: pwm4grp { 178*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_GPIO1_IO15_PWM4_OUT 0x14>; 179*dfcd1b6fSAlexander Stein }; 180*dfcd1b6fSAlexander Stein 181*dfcd1b6fSAlexander Stein pinctrl_sai3: sai3grp { 182*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0x94>, 183*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0x94>, 184*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0x94>, 185*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0x94>, 186*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x94>, 187*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0x94>, 188*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0x94>; 189*dfcd1b6fSAlexander Stein }; 190*dfcd1b6fSAlexander Stein 191*dfcd1b6fSAlexander Stein pinctrl_uart1: uart1grp { 192*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x16>, 193*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x16>; 194*dfcd1b6fSAlexander Stein }; 195*dfcd1b6fSAlexander Stein 196*dfcd1b6fSAlexander Stein pinctrl_uart2: uart2grp { 197*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x16>, 198*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x16>; 199*dfcd1b6fSAlexander Stein }; 200*dfcd1b6fSAlexander Stein 201*dfcd1b6fSAlexander Stein pinctrl_uart3: uart3grp { 202*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x16>, 203*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x16>; 204*dfcd1b6fSAlexander Stein }; 205*dfcd1b6fSAlexander Stein 206*dfcd1b6fSAlexander Stein pinctrl_uart4: uart4grp { 207*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x16>, 208*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x16>; 209*dfcd1b6fSAlexander Stein }; 210*dfcd1b6fSAlexander Stein 211*dfcd1b6fSAlexander Stein pinctrl_usbotg1: usbotg1grp { 212*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x84>, 213*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x84>; 214*dfcd1b6fSAlexander Stein }; 215*dfcd1b6fSAlexander Stein 216*dfcd1b6fSAlexander Stein pinctrl_usb1_extcon: usb1-extcongrp { 217*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x1c0>; 218*dfcd1b6fSAlexander Stein }; 219*dfcd1b6fSAlexander Stein 220*dfcd1b6fSAlexander Stein pinctrl_usdhc2_gpio: usdhc2grpgpiogrp { 221*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x84>; 222*dfcd1b6fSAlexander Stein }; 223*dfcd1b6fSAlexander Stein 224*dfcd1b6fSAlexander Stein pinctrl_usdhc2: usdhc2grp { 225*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>, 226*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>, 227*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>, 228*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>, 229*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>, 230*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>, 231*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>; 232*dfcd1b6fSAlexander Stein }; 233*dfcd1b6fSAlexander Stein 234*dfcd1b6fSAlexander Stein pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 235*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>, 236*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>, 237*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>, 238*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>, 239*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>, 240*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>, 241*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>; 242*dfcd1b6fSAlexander Stein }; 243*dfcd1b6fSAlexander Stein 244*dfcd1b6fSAlexander Stein pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 245*dfcd1b6fSAlexander Stein fsl,pins = <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x1d4>, 246*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4>, 247*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4>, 248*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4>, 249*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4>, 250*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4>, 251*dfcd1b6fSAlexander Stein <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x84>; 252*dfcd1b6fSAlexander Stein }; 253*dfcd1b6fSAlexander Stein}; 254