1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2020 NXP 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/usb/pd.h> 9#include "imx8mm.dtsi" 10 11/ { 12 chosen { 13 stdout-path = &uart2; 14 }; 15 16 memory@40000000 { 17 device_type = "memory"; 18 reg = <0x0 0x40000000 0 0x80000000>; 19 }; 20 21 leds { 22 compatible = "gpio-leds"; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&pinctrl_gpio_led>; 25 26 status { 27 label = "status"; 28 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 29 default-state = "on"; 30 }; 31 }; 32 33 reg_usdhc2_vmmc: regulator-usdhc2 { 34 compatible = "regulator-fixed"; 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 37 regulator-name = "VSD_3V3"; 38 regulator-min-microvolt = <3300000>; 39 regulator-max-microvolt = <3300000>; 40 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 41 enable-active-high; 42 }; 43 44 ir-receiver { 45 compatible = "gpio-ir-receiver"; 46 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_ir>; 49 linux,autosuspend-period = <125>; 50 }; 51 52 wm8524: audio-codec { 53 #sound-dai-cells = <0>; 54 compatible = "wlf,wm8524"; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&pinctrl_gpio_wlf>; 57 wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>; 58 }; 59 60 sound-wm8524 { 61 compatible = "simple-audio-card"; 62 simple-audio-card,name = "wm8524-audio"; 63 simple-audio-card,format = "i2s"; 64 simple-audio-card,frame-master = <&cpudai>; 65 simple-audio-card,bitclock-master = <&cpudai>; 66 simple-audio-card,widgets = 67 "Line", "Left Line Out Jack", 68 "Line", "Right Line Out Jack"; 69 simple-audio-card,routing = 70 "Left Line Out Jack", "LINEVOUTL", 71 "Right Line Out Jack", "LINEVOUTR"; 72 73 cpudai: simple-audio-card,cpu { 74 sound-dai = <&sai3>; 75 dai-tdm-slot-num = <2>; 76 dai-tdm-slot-width = <32>; 77 }; 78 79 simple-audio-card,codec { 80 sound-dai = <&wm8524>; 81 clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; 82 }; 83 }; 84}; 85 86&A53_0 { 87 cpu-supply = <&buck2_reg>; 88}; 89 90&A53_1 { 91 cpu-supply = <&buck2_reg>; 92}; 93 94&A53_2 { 95 cpu-supply = <&buck2_reg>; 96}; 97 98&A53_3 { 99 cpu-supply = <&buck2_reg>; 100}; 101 102&fec1 { 103 pinctrl-names = "default"; 104 pinctrl-0 = <&pinctrl_fec1>; 105 phy-mode = "rgmii-id"; 106 phy-handle = <ðphy0>; 107 fsl,magic-packet; 108 status = "okay"; 109 110 mdio { 111 #address-cells = <1>; 112 #size-cells = <0>; 113 114 ethphy0: ethernet-phy@0 { 115 compatible = "ethernet-phy-ieee802.3-c22"; 116 reg = <0>; 117 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; 118 reset-assert-us = <10000>; 119 qca,disable-smarteee; 120 vddio-supply = <&vddio>; 121 122 vddio: vddio-regulator { 123 regulator-min-microvolt = <1800000>; 124 regulator-max-microvolt = <1800000>; 125 }; 126 }; 127 }; 128}; 129 130&i2c1 { 131 clock-frequency = <400000>; 132 pinctrl-names = "default"; 133 pinctrl-0 = <&pinctrl_i2c1>; 134 status = "okay"; 135 136 pmic@4b { 137 compatible = "rohm,bd71847"; 138 reg = <0x4b>; 139 pinctrl-names = "default"; 140 pinctrl-0 = <&pinctrl_pmic>; 141 interrupt-parent = <&gpio1>; 142 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 143 rohm,reset-snvs-powered; 144 145 #clock-cells = <0>; 146 clocks = <&osc_32k 0>; 147 clock-output-names = "clk-32k-out"; 148 149 regulators { 150 buck1_reg: BUCK1 { 151 regulator-name = "buck1"; 152 regulator-min-microvolt = <700000>; 153 regulator-max-microvolt = <1300000>; 154 regulator-boot-on; 155 regulator-always-on; 156 regulator-ramp-delay = <1250>; 157 }; 158 159 buck2_reg: BUCK2 { 160 regulator-name = "buck2"; 161 regulator-min-microvolt = <700000>; 162 regulator-max-microvolt = <1300000>; 163 regulator-boot-on; 164 regulator-always-on; 165 regulator-ramp-delay = <1250>; 166 rohm,dvs-run-voltage = <1000000>; 167 rohm,dvs-idle-voltage = <900000>; 168 }; 169 170 buck3_reg: BUCK3 { 171 // BUCK5 in datasheet 172 regulator-name = "buck3"; 173 regulator-min-microvolt = <700000>; 174 regulator-max-microvolt = <1350000>; 175 regulator-boot-on; 176 regulator-always-on; 177 }; 178 179 buck4_reg: BUCK4 { 180 // BUCK6 in datasheet 181 regulator-name = "buck4"; 182 regulator-min-microvolt = <3000000>; 183 regulator-max-microvolt = <3300000>; 184 regulator-boot-on; 185 regulator-always-on; 186 }; 187 188 buck5_reg: BUCK5 { 189 // BUCK7 in datasheet 190 regulator-name = "buck5"; 191 regulator-min-microvolt = <1605000>; 192 regulator-max-microvolt = <1995000>; 193 regulator-boot-on; 194 regulator-always-on; 195 }; 196 197 buck6_reg: BUCK6 { 198 // BUCK8 in datasheet 199 regulator-name = "buck6"; 200 regulator-min-microvolt = <800000>; 201 regulator-max-microvolt = <1400000>; 202 regulator-boot-on; 203 regulator-always-on; 204 }; 205 206 ldo1_reg: LDO1 { 207 regulator-name = "ldo1"; 208 regulator-min-microvolt = <1600000>; 209 regulator-max-microvolt = <3300000>; 210 regulator-boot-on; 211 regulator-always-on; 212 }; 213 214 ldo2_reg: LDO2 { 215 regulator-name = "ldo2"; 216 regulator-min-microvolt = <800000>; 217 regulator-max-microvolt = <900000>; 218 regulator-boot-on; 219 regulator-always-on; 220 }; 221 222 ldo3_reg: LDO3 { 223 regulator-name = "ldo3"; 224 regulator-min-microvolt = <1800000>; 225 regulator-max-microvolt = <3300000>; 226 regulator-boot-on; 227 regulator-always-on; 228 }; 229 230 ldo4_reg: LDO4 { 231 regulator-name = "ldo4"; 232 regulator-min-microvolt = <900000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-boot-on; 235 regulator-always-on; 236 }; 237 238 ldo6_reg: LDO6 { 239 regulator-name = "ldo6"; 240 regulator-min-microvolt = <900000>; 241 regulator-max-microvolt = <1800000>; 242 regulator-boot-on; 243 regulator-always-on; 244 }; 245 }; 246 }; 247}; 248 249&i2c2 { 250 clock-frequency = <400000>; 251 pinctrl-names = "default"; 252 pinctrl-0 = <&pinctrl_i2c2>; 253 status = "okay"; 254 255 ptn5110: tcpc@50 { 256 compatible = "nxp,ptn5110"; 257 pinctrl-names = "default"; 258 pinctrl-0 = <&pinctrl_typec1>; 259 reg = <0x50>; 260 interrupt-parent = <&gpio2>; 261 interrupts = <11 8>; 262 status = "okay"; 263 264 port { 265 typec1_dr_sw: endpoint { 266 remote-endpoint = <&usb1_drd_sw>; 267 }; 268 }; 269 270 typec1_con: connector { 271 compatible = "usb-c-connector"; 272 label = "USB-C"; 273 power-role = "dual"; 274 data-role = "dual"; 275 try-power-role = "sink"; 276 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 277 sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) 278 PDO_VAR(5000, 20000, 3000)>; 279 op-sink-microwatt = <15000000>; 280 self-powered; 281 }; 282 }; 283}; 284 285&i2c3 { 286 clock-frequency = <400000>; 287 pinctrl-names = "default"; 288 pinctrl-0 = <&pinctrl_i2c3>; 289 status = "okay"; 290 291 pca6416: gpio@20 { 292 compatible = "ti,tca6416"; 293 reg = <0x20>; 294 gpio-controller; 295 #gpio-cells = <2>; 296 }; 297}; 298 299&sai3 { 300 pinctrl-names = "default"; 301 pinctrl-0 = <&pinctrl_sai3>; 302 assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 303 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 304 assigned-clock-rates = <24576000>; 305 status = "okay"; 306}; 307 308&snvs_pwrkey { 309 status = "okay"; 310}; 311 312&uart2 { /* console */ 313 pinctrl-names = "default"; 314 pinctrl-0 = <&pinctrl_uart2>; 315 status = "okay"; 316}; 317 318&usbotg1 { 319 dr_mode = "otg"; 320 hnp-disable; 321 srp-disable; 322 adp-disable; 323 usb-role-switch; 324 disable-over-current; 325 samsung,picophy-pre-emp-curr-control = <3>; 326 samsung,picophy-dc-vol-level-adjust = <7>; 327 status = "okay"; 328 329 port { 330 usb1_drd_sw: endpoint { 331 remote-endpoint = <&typec1_dr_sw>; 332 }; 333 }; 334}; 335 336&usdhc2 { 337 assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; 338 assigned-clock-rates = <200000000>; 339 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 340 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 341 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 342 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 343 cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; 344 bus-width = <4>; 345 vmmc-supply = <®_usdhc2_vmmc>; 346 status = "okay"; 347}; 348 349&wdog1 { 350 pinctrl-names = "default"; 351 pinctrl-0 = <&pinctrl_wdog>; 352 fsl,ext-reset-output; 353 status = "okay"; 354}; 355 356&iomuxc { 357 pinctrl_fec1: fec1grp { 358 fsl,pins = < 359 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 360 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 361 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 362 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 363 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 364 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 365 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 366 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 367 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 368 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 369 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 370 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 371 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 372 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 373 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 374 >; 375 }; 376 377 pinctrl_gpio_led: gpioledgrp { 378 fsl,pins = < 379 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 380 >; 381 }; 382 383 pinctrl_ir: irgrp { 384 fsl,pins = < 385 MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f 386 >; 387 }; 388 389 pinctrl_gpio_wlf: gpiowlfgrp { 390 fsl,pins = < 391 MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6 392 >; 393 }; 394 395 pinctrl_i2c1: i2c1grp { 396 fsl,pins = < 397 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 398 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 399 >; 400 }; 401 402 pinctrl_i2c2: i2c2grp { 403 fsl,pins = < 404 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 405 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 406 >; 407 }; 408 409 pinctrl_i2c3: i2c3grp { 410 fsl,pins = < 411 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 412 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 413 >; 414 }; 415 416 pinctrl_pmic: pmicirqgrp { 417 fsl,pins = < 418 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141 419 >; 420 }; 421 422 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { 423 fsl,pins = < 424 MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 425 >; 426 }; 427 428 pinctrl_sai3: sai3grp { 429 fsl,pins = < 430 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 431 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 432 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 433 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 434 >; 435 }; 436 437 pinctrl_typec1: typec1grp { 438 fsl,pins = < 439 MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159 440 >; 441 }; 442 443 pinctrl_uart2: uart2grp { 444 fsl,pins = < 445 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 446 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 447 >; 448 }; 449 450 pinctrl_usdhc2_gpio: usdhc2grpgpiogrp { 451 fsl,pins = < 452 MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4 453 >; 454 }; 455 456 pinctrl_usdhc2: usdhc2grp { 457 fsl,pins = < 458 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 459 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 460 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 461 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 462 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 463 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 464 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 465 >; 466 }; 467 468 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 469 fsl,pins = < 470 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 471 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 472 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 473 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 474 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 475 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 476 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 477 >; 478 }; 479 480 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 481 fsl,pins = < 482 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 483 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 484 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 485 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 486 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 487 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 488 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 489 >; 490 }; 491 492 pinctrl_wdog: wdoggrp { 493 fsl,pins = < 494 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166 495 >; 496 }; 497}; 498