1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2019~2020, 2022 NXP 4 */ 5 6&audio_ipg_clk { 7 clock-frequency = <160000000>; 8}; 9 10&dma_ipg_clk { 11 clock-frequency = <160000000>; 12}; 13 14&adc0 { 15 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 16}; 17 18&i2c0 { 19 compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 20 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 21}; 22 23&i2c1 { 24 compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 25 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; 26}; 27 28&i2c2 { 29 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 30 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 31}; 32 33&i2c3 { 34 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; 35 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 36}; 37 38&lpuart0 { 39 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 40 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>; 41}; 42 43&lpuart1 { 44 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 45 interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 46}; 47 48&lpuart2 { 49 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 50 interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; 51}; 52 53&lpuart3 { 54 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; 55 interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; 56}; 57