1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4 *
5 * Copyright 2016 Freescale Semiconductor, Inc.
6 *
7 * Shaohui Xie <Shaohui.Xie@nxp.com>
8 */
9
10/dts-v1/;
11
12#include "fsl-ls1046a.dtsi"
13
14/ {
15	model = "LS1046A QDS Board";
16	compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
17
18	aliases {
19		gpio0 = &gpio0;
20		gpio1 = &gpio1;
21		gpio2 = &gpio2;
22		gpio3 = &gpio3;
23		serial0 = &duart0;
24		serial1 = &duart1;
25		serial2 = &duart2;
26		serial3 = &duart3;
27	};
28
29	chosen {
30		stdout-path = "serial0:115200n8";
31	};
32};
33
34&dspi {
35	bus-num = <0>;
36	status = "okay";
37
38	flash@0 {
39		#address-cells = <1>;
40		#size-cells = <1>;
41		compatible = "n25q128a11", "jedec,spi-nor";
42		reg = <0>;
43		spi-max-frequency = <10000000>;
44	};
45
46	flash@1 {
47		#address-cells = <1>;
48		#size-cells = <1>;
49		compatible = "sst25wf040b", "jedec,spi-nor";
50		spi-cpol;
51		spi-cpha;
52		reg = <1>;
53		spi-max-frequency = <10000000>;
54	};
55
56	flash@2 {
57		#address-cells = <1>;
58		#size-cells = <1>;
59		compatible = "en25s64", "jedec,spi-nor";
60		spi-cpol;
61		spi-cpha;
62		reg = <2>;
63		spi-max-frequency = <10000000>;
64	};
65};
66
67&duart0 {
68	status = "okay";
69};
70
71&duart1 {
72	status = "okay";
73};
74
75&i2c0 {
76	status = "okay";
77
78	pca9547@77 {
79		compatible = "nxp,pca9547";
80		reg = <0x77>;
81		#address-cells = <1>;
82		#size-cells = <0>;
83
84		i2c@2 {
85			#address-cells = <1>;
86			#size-cells = <0>;
87			reg = <0x2>;
88
89			ina220@40 {
90				compatible = "ti,ina220";
91				reg = <0x40>;
92				shunt-resistor = <1000>;
93			};
94
95			ina220@41 {
96				compatible = "ti,ina220";
97				reg = <0x41>;
98				shunt-resistor = <1000>;
99			};
100		};
101
102		i2c@3 {
103			#address-cells = <1>;
104			#size-cells = <0>;
105			reg = <0x3>;
106
107			rtc@51 {
108				compatible = "nxp,pcf2129";
109				reg = <0x51>;
110				/* IRQ10_B */
111				interrupts = <0 150 0x4>;
112			};
113
114			eeprom@56 {
115				compatible = "atmel,24c512";
116				reg = <0x56>;
117			};
118
119			eeprom@57 {
120				compatible = "atmel,24c512";
121				reg = <0x57>;
122			};
123
124			temp-sensor@4c {
125				compatible = "adi,adt7461a";
126				reg = <0x4c>;
127			};
128		};
129	};
130};
131
132&ifc {
133	#address-cells = <2>;
134	#size-cells = <1>;
135	/* NOR, NAND Flashes and FPGA on board */
136	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
137		  0x1 0x0 0x0 0x7e800000 0x00010000
138		  0x2 0x0 0x0 0x7fb00000 0x00000100>;
139	status = "okay";
140
141	nor@0,0 {
142		compatible = "cfi-flash";
143		reg = <0x0 0x0 0x8000000>;
144		bank-width = <2>;
145		device-width = <1>;
146	};
147
148	nand@1,0 {
149		compatible = "fsl,ifc-nand";
150		reg = <0x1 0x0 0x10000>;
151	};
152
153	fpga: board-control@2,0 {
154		compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis";
155		reg = <0x2 0x0 0x0000100>;
156	};
157};
158
159&lpuart0 {
160	status = "okay";
161};
162
163&qspi {
164	num-cs = <2>;
165	bus-num = <0>;
166	status = "okay";
167
168	qflash0: s25fl128s@0 {
169		compatible = "spansion,m25p80";
170		#address-cells = <1>;
171		#size-cells = <1>;
172		spi-max-frequency = <20000000>;
173		reg = <0>;
174	};
175};
176
177#include "fsl-ls1046-post.dtsi"
178