1/* 2 * Device Tree Include file for Freescale Layerscape-1046A family SoC. 3 * 4 * Copyright 2016, Freescale Semiconductor, Inc. 5 * 6 * Shaohui Xie <Shaohui.Xie@nxp.com> 7 * 8 * This file is dual-licensed: you can use it either under the terms 9 * of the GPLv2 or the X11 license, at your option. Note that this dual 10 * licensing only applies to this file, and not this project as a 11 * whole. 12 * 13 * a) This library is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of the 16 * License, or (at your option) any later version. 17 * 18 * This library is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * Or, alternatively, 24 * 25 * b) Permission is hereby granted, free of charge, to any person 26 * obtaining a copy of this software and associated documentation 27 * files (the "Software"), to deal in the Software without 28 * restriction, including without limitation the rights to use, 29 * copy, modify, merge, publish, distribute, sublicense, and/or 30 * sell copies of the Software, and to permit persons to whom the 31 * Software is furnished to do so, subject to the following 32 * conditions: 33 * 34 * The above copyright notice and this permission notice shall be 35 * included in all copies or substantial portions of the Software. 36 * 37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 44 * OTHER DEALINGS IN THE SOFTWARE. 45 */ 46 47/dts-v1/; 48 49#include "fsl-ls1046a.dtsi" 50 51/ { 52 model = "LS1046A QDS Board"; 53 compatible = "fsl,ls1046a-qds", "fsl,ls1046a"; 54 55 aliases { 56 gpio0 = &gpio0; 57 gpio1 = &gpio1; 58 gpio2 = &gpio2; 59 gpio3 = &gpio3; 60 serial0 = &duart0; 61 serial1 = &duart1; 62 serial2 = &duart2; 63 serial3 = &duart3; 64 }; 65 66 chosen { 67 stdout-path = "serial0:115200n8"; 68 }; 69}; 70 71&dspi { 72 bus-num = <0>; 73 status = "okay"; 74 75 flash@0 { 76 #address-cells = <1>; 77 #size-cells = <1>; 78 compatible = "n25q128a11", "jedec,spi-nor"; 79 reg = <0>; 80 spi-max-frequency = <10000000>; 81 }; 82 83 flash@1 { 84 #address-cells = <1>; 85 #size-cells = <1>; 86 compatible = "sst25wf040b", "jedec,spi-nor"; 87 spi-cpol; 88 spi-cpha; 89 reg = <1>; 90 spi-max-frequency = <10000000>; 91 }; 92 93 flash@2 { 94 #address-cells = <1>; 95 #size-cells = <1>; 96 compatible = "en25s64", "jedec,spi-nor"; 97 spi-cpol; 98 spi-cpha; 99 reg = <2>; 100 spi-max-frequency = <10000000>; 101 }; 102}; 103 104&duart0 { 105 status = "okay"; 106}; 107 108&duart1 { 109 status = "okay"; 110}; 111 112&i2c0 { 113 status = "okay"; 114 115 pca9547@77 { 116 compatible = "nxp,pca9547"; 117 reg = <0x77>; 118 #address-cells = <1>; 119 #size-cells = <0>; 120 121 i2c@2 { 122 #address-cells = <1>; 123 #size-cells = <0>; 124 reg = <0x2>; 125 126 ina220@40 { 127 compatible = "ti,ina220"; 128 reg = <0x40>; 129 shunt-resistor = <1000>; 130 }; 131 132 ina220@41 { 133 compatible = "ti,ina220"; 134 reg = <0x41>; 135 shunt-resistor = <1000>; 136 }; 137 }; 138 139 i2c@3 { 140 #address-cells = <1>; 141 #size-cells = <0>; 142 reg = <0x3>; 143 144 rtc@51 { 145 compatible = "nxp,pcf2129"; 146 reg = <0x51>; 147 /* IRQ10_B */ 148 interrupts = <0 150 0x4>; 149 }; 150 151 eeprom@56 { 152 compatible = "atmel,24c512"; 153 reg = <0x56>; 154 }; 155 156 eeprom@57 { 157 compatible = "atmel,24c512"; 158 reg = <0x57>; 159 }; 160 161 temp-sensor@4c { 162 compatible = "adi,adt7461a"; 163 reg = <0x4c>; 164 }; 165 }; 166 }; 167}; 168 169&ifc { 170 #address-cells = <2>; 171 #size-cells = <1>; 172 /* NOR, NAND Flashes and FPGA on board */ 173 ranges = <0x0 0x0 0x0 0x60000000 0x08000000 174 0x1 0x0 0x0 0x7e800000 0x00010000 175 0x2 0x0 0x0 0x7fb00000 0x00000100>; 176 status = "okay"; 177 178 nor@0,0 { 179 compatible = "cfi-flash"; 180 reg = <0x0 0x0 0x8000000>; 181 bank-width = <2>; 182 device-width = <1>; 183 }; 184 185 nand@1,0 { 186 compatible = "fsl,ifc-nand"; 187 reg = <0x1 0x0 0x10000>; 188 }; 189 190 fpga: board-control@2,0 { 191 compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis"; 192 reg = <0x2 0x0 0x0000100>; 193 }; 194}; 195 196&lpuart0 { 197 status = "okay"; 198}; 199 200&qspi { 201 num-cs = <2>; 202 bus-num = <0>; 203 status = "okay"; 204 205 qflash0: s25fl128s@0 { 206 compatible = "spansion,m25p80"; 207 #address-cells = <1>; 208 #size-cells = <1>; 209 spi-max-frequency = <20000000>; 210 reg = <0>; 211 }; 212}; 213