1/* 2 * Device Tree Include file for Freescale Layerscape-1012A family SoC. 3 * 4 * Copyright 2016, Freescale Semiconductor 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPLv2 or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This library is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of the 14 * License, or (at your option) any later version. 15 * 16 * This library is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 * OTHER DEALINGS IN THE SOFTWARE. 43 */ 44 45#include <dt-bindings/interrupt-controller/irq.h> 46 47/ { 48 compatible = "fsl,ls1012a"; 49 interrupt-parent = <&gic>; 50 #address-cells = <2>; 51 #size-cells = <2>; 52 53 cpus { 54 #address-cells = <1>; 55 #size-cells = <0>; 56 57 cpu0: cpu@0 { 58 device_type = "cpu"; 59 compatible = "arm,cortex-a53"; 60 reg = <0x0>; 61 clocks = <&clockgen 1 0>; 62 #cooling-cells = <2>; 63 }; 64 }; 65 66 sysclk: sysclk { 67 compatible = "fixed-clock"; 68 #clock-cells = <0>; 69 clock-frequency = <100000000>; 70 clock-output-names = "sysclk"; 71 }; 72 73 timer { 74 compatible = "arm,armv8-timer"; 75 interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */ 76 <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */ 77 <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */ 78 <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */ 79 }; 80 81 pmu { 82 compatible = "arm,armv8-pmuv3"; 83 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; 84 }; 85 86 gic: interrupt-controller@1400000 { 87 compatible = "arm,gic-400"; 88 #interrupt-cells = <3>; 89 interrupt-controller; 90 reg = <0x0 0x1401000 0 0x1000>, /* GICD */ 91 <0x0 0x1402000 0 0x2000>, /* GICC */ 92 <0x0 0x1404000 0 0x2000>, /* GICH */ 93 <0x0 0x1406000 0 0x2000>; /* GICV */ 94 interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>; 95 }; 96 97 reboot { 98 compatible = "syscon-reboot"; 99 regmap = <&dcfg>; 100 offset = <0xb0>; 101 mask = <0x02>; 102 }; 103 104 soc { 105 compatible = "simple-bus"; 106 #address-cells = <2>; 107 #size-cells = <2>; 108 ranges; 109 110 scfg: scfg@1570000 { 111 compatible = "fsl,ls1012a-scfg", "syscon"; 112 reg = <0x0 0x1570000 0x0 0x10000>; 113 big-endian; 114 }; 115 116 dcfg: dcfg@1ee0000 { 117 compatible = "fsl,ls1012a-dcfg", 118 "syscon"; 119 reg = <0x0 0x1ee0000 0x0 0x10000>; 120 big-endian; 121 }; 122 123 clockgen: clocking@1ee1000 { 124 compatible = "fsl,ls1012a-clockgen"; 125 reg = <0x0 0x1ee1000 0x0 0x1000>; 126 #clock-cells = <2>; 127 clocks = <&sysclk>; 128 }; 129 130 i2c0: i2c@2180000 { 131 compatible = "fsl,vf610-i2c"; 132 #address-cells = <1>; 133 #size-cells = <0>; 134 reg = <0x0 0x2180000 0x0 0x10000>; 135 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; 136 clocks = <&clockgen 4 0>; 137 status = "disabled"; 138 }; 139 140 i2c1: i2c@2190000 { 141 compatible = "fsl,vf610-i2c"; 142 #address-cells = <1>; 143 #size-cells = <0>; 144 reg = <0x0 0x2190000 0x0 0x10000>; 145 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; 146 clocks = <&clockgen 4 0>; 147 status = "disabled"; 148 }; 149 150 duart0: serial@21c0500 { 151 compatible = "fsl,ns16550", "ns16550a"; 152 reg = <0x00 0x21c0500 0x0 0x100>; 153 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; 154 clocks = <&clockgen 4 0>; 155 status = "disabled"; 156 }; 157 158 duart1: serial@21c0600 { 159 compatible = "fsl,ns16550", "ns16550a"; 160 reg = <0x00 0x21c0600 0x0 0x100>; 161 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; 162 clocks = <&clockgen 4 0>; 163 status = "disabled"; 164 }; 165 166 gpio0: gpio@2300000 { 167 compatible = "fsl,qoriq-gpio"; 168 reg = <0x0 0x2300000 0x0 0x10000>; 169 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>; 170 gpio-controller; 171 #gpio-cells = <2>; 172 interrupt-controller; 173 #interrupt-cells = <2>; 174 }; 175 176 gpio1: gpio@2310000 { 177 compatible = "fsl,qoriq-gpio"; 178 reg = <0x0 0x2310000 0x0 0x10000>; 179 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; 180 gpio-controller; 181 #gpio-cells = <2>; 182 interrupt-controller; 183 #interrupt-cells = <2>; 184 }; 185 186 wdog0: wdog@2ad0000 { 187 compatible = "fsl,ls1012a-wdt", 188 "fsl,imx21-wdt"; 189 reg = <0x0 0x2ad0000 0x0 0x10000>; 190 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; 191 clocks = <&clockgen 4 0>; 192 big-endian; 193 }; 194 195 sai1: sai@2b50000 { 196 #sound-dai-cells = <0>; 197 compatible = "fsl,vf610-sai"; 198 reg = <0x0 0x2b50000 0x0 0x10000>; 199 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; 200 clocks = <&clockgen 4 3>, <&clockgen 4 3>, 201 <&clockgen 4 3>, <&clockgen 4 3>; 202 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 203 dma-names = "tx", "rx"; 204 dmas = <&edma0 1 47>, 205 <&edma0 1 46>; 206 status = "disabled"; 207 }; 208 209 sai2: sai@2b60000 { 210 #sound-dai-cells = <0>; 211 compatible = "fsl,vf610-sai"; 212 reg = <0x0 0x2b60000 0x0 0x10000>; 213 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; 214 clocks = <&clockgen 4 3>, <&clockgen 4 3>, 215 <&clockgen 4 3>, <&clockgen 4 3>; 216 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 217 dma-names = "tx", "rx"; 218 dmas = <&edma0 1 45>, 219 <&edma0 1 44>; 220 status = "disabled"; 221 }; 222 223 edma0: edma@2c00000 { 224 #dma-cells = <2>; 225 compatible = "fsl,vf610-edma"; 226 reg = <0x0 0x2c00000 0x0 0x10000>, 227 <0x0 0x2c10000 0x0 0x10000>, 228 <0x0 0x2c20000 0x0 0x10000>; 229 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>, 230 <0 103 IRQ_TYPE_LEVEL_HIGH>; 231 interrupt-names = "edma-tx", "edma-err"; 232 dma-channels = <32>; 233 big-endian; 234 clock-names = "dmamux0", "dmamux1"; 235 clocks = <&clockgen 4 3>, 236 <&clockgen 4 3>; 237 }; 238 239 sata: sata@3200000 { 240 compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci"; 241 reg = <0x0 0x3200000 0x0 0x10000>; 242 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; 243 clocks = <&clockgen 4 0>; 244 status = "disabled"; 245 }; 246 }; 247}; 248